docs: mic: convert docs to ReST and rename to *.rst
Convert Intel Many Integrated Core architecture docs to ReST. The conversion is trivial: just add title and literal block markups, and adjust some identation. At its new index.rst, let's add a :orphan: while this is not linked to the main index.rst file, in order to avoid build warnings. Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org> Signed-off-by: Jonathan Corbet <corbet@lwn.net>
This commit is contained in:
parent
d67297ad34
commit
09bbf055c3
|
@ -0,0 +1,18 @@
|
||||||
|
:orphan:
|
||||||
|
|
||||||
|
=============================================
|
||||||
|
Intel Many Integrated Core (MIC) architecture
|
||||||
|
=============================================
|
||||||
|
|
||||||
|
.. toctree::
|
||||||
|
:maxdepth: 1
|
||||||
|
|
||||||
|
mic_overview
|
||||||
|
scif_overview
|
||||||
|
|
||||||
|
.. only:: subproject and html
|
||||||
|
|
||||||
|
Indices
|
||||||
|
=======
|
||||||
|
|
||||||
|
* :ref:`genindex`
|
|
@ -1,3 +1,7 @@
|
||||||
|
======================================================
|
||||||
|
Intel Many Integrated Core (MIC) architecture overview
|
||||||
|
======================================================
|
||||||
|
|
||||||
An Intel MIC X100 device is a PCIe form factor add-in coprocessor
|
An Intel MIC X100 device is a PCIe form factor add-in coprocessor
|
||||||
card based on the Intel Many Integrated Core (MIC) architecture
|
card based on the Intel Many Integrated Core (MIC) architecture
|
||||||
that runs a Linux OS. It is a PCIe endpoint in a platform and therefore
|
that runs a Linux OS. It is a PCIe endpoint in a platform and therefore
|
||||||
|
@ -45,7 +49,7 @@ Here is a block diagram of the various components described above. The
|
||||||
virtio backends are situated on the host rather than the card given better
|
virtio backends are situated on the host rather than the card given better
|
||||||
single threaded performance for the host compared to MIC, the ability of
|
single threaded performance for the host compared to MIC, the ability of
|
||||||
the host to initiate DMA's to/from the card using the MIC DMA engine and
|
the host to initiate DMA's to/from the card using the MIC DMA engine and
|
||||||
the fact that the virtio block storage backend can only be on the host.
|
the fact that the virtio block storage backend can only be on the host::
|
||||||
|
|
||||||
+----------+ | +----------+
|
+----------+ | +----------+
|
||||||
| Card OS | | | Host OS |
|
| Card OS | | | Host OS |
|
|
@ -1,3 +1,7 @@
|
||||||
|
========================================
|
||||||
|
Symmetric Communication Interface (SCIF)
|
||||||
|
========================================
|
||||||
|
|
||||||
The Symmetric Communication Interface (SCIF (pronounced as skiff)) is a low
|
The Symmetric Communication Interface (SCIF (pronounced as skiff)) is a low
|
||||||
level communications API across PCIe currently implemented for MIC. Currently
|
level communications API across PCIe currently implemented for MIC. Currently
|
||||||
SCIF provides inter-node communication within a single host platform, where a
|
SCIF provides inter-node communication within a single host platform, where a
|
||||||
|
@ -8,8 +12,11 @@ is to deliver the maximum possible performance given the communication
|
||||||
abilities of the hardware. SCIF has been used to implement an offload compiler
|
abilities of the hardware. SCIF has been used to implement an offload compiler
|
||||||
runtime and OFED support for MPI implementations for MIC coprocessors.
|
runtime and OFED support for MPI implementations for MIC coprocessors.
|
||||||
|
|
||||||
==== SCIF API Components ====
|
SCIF API Components
|
||||||
|
===================
|
||||||
|
|
||||||
The SCIF API has the following parts:
|
The SCIF API has the following parts:
|
||||||
|
|
||||||
1. Connection establishment using a client server model
|
1. Connection establishment using a client server model
|
||||||
2. Byte stream messaging intended for short messages
|
2. Byte stream messaging intended for short messages
|
||||||
3. Node enumeration to determine online nodes
|
3. Node enumeration to determine online nodes
|
||||||
|
@ -28,9 +35,12 @@ can also register local memory which is followed by data transfer using either
|
||||||
DMA, CPU copies or remote memory mapping via mmap. SCIF supports both user and
|
DMA, CPU copies or remote memory mapping via mmap. SCIF supports both user and
|
||||||
kernel mode clients which are functionally equivalent.
|
kernel mode clients which are functionally equivalent.
|
||||||
|
|
||||||
==== SCIF Performance for MIC ====
|
SCIF Performance for MIC
|
||||||
|
========================
|
||||||
|
|
||||||
DMA bandwidth comparison between the TCP (over ethernet over PCIe) stack versus
|
DMA bandwidth comparison between the TCP (over ethernet over PCIe) stack versus
|
||||||
SCIF shows the performance advantages of SCIF for HPC applications and runtimes.
|
SCIF shows the performance advantages of SCIF for HPC applications and
|
||||||
|
runtimes::
|
||||||
|
|
||||||
Comparison of TCP and SCIF based BW
|
Comparison of TCP and SCIF based BW
|
||||||
|
|
||||||
|
@ -66,33 +76,33 @@ space API similar to the kernel API in scif.h. The SCIF user space library
|
||||||
is distributed @ https://software.intel.com/en-us/mic-developer
|
is distributed @ https://software.intel.com/en-us/mic-developer
|
||||||
|
|
||||||
Here is some pseudo code for an example of how two applications on two PCIe
|
Here is some pseudo code for an example of how two applications on two PCIe
|
||||||
nodes would typically use the SCIF API:
|
nodes would typically use the SCIF API::
|
||||||
|
|
||||||
Process A (on node A) Process B (on node B)
|
Process A (on node A) Process B (on node B)
|
||||||
|
|
||||||
/* get online node information */
|
/* get online node information */
|
||||||
scif_get_node_ids(..) scif_get_node_ids(..)
|
scif_get_node_ids(..) scif_get_node_ids(..)
|
||||||
scif_open(..) scif_open(..)
|
scif_open(..) scif_open(..)
|
||||||
scif_bind(..) scif_bind(..)
|
scif_bind(..) scif_bind(..)
|
||||||
scif_listen(..)
|
scif_listen(..)
|
||||||
scif_accept(..) scif_connect(..)
|
scif_accept(..) scif_connect(..)
|
||||||
/* SCIF connection established */
|
/* SCIF connection established */
|
||||||
|
|
||||||
/* Send and receive short messages */
|
/* Send and receive short messages */
|
||||||
scif_send(..)/scif_recv(..) scif_send(..)/scif_recv(..)
|
scif_send(..)/scif_recv(..) scif_send(..)/scif_recv(..)
|
||||||
|
|
||||||
/* Register memory */
|
/* Register memory */
|
||||||
scif_register(..) scif_register(..)
|
scif_register(..) scif_register(..)
|
||||||
|
|
||||||
/* RDMA */
|
/* RDMA */
|
||||||
scif_readfrom(..)/scif_writeto(..) scif_readfrom(..)/scif_writeto(..)
|
scif_readfrom(..)/scif_writeto(..) scif_readfrom(..)/scif_writeto(..)
|
||||||
|
|
||||||
/* Fence DMAs */
|
/* Fence DMAs */
|
||||||
scif_fence_signal(..) scif_fence_signal(..)
|
scif_fence_signal(..) scif_fence_signal(..)
|
||||||
|
|
||||||
mmap(..) mmap(..)
|
mmap(..) mmap(..)
|
||||||
|
|
||||||
/* Access remote registered memory */
|
/* Access remote registered memory */
|
||||||
|
|
||||||
/* Close the endpoints */
|
/* Close the endpoints */
|
||||||
scif_close(..) scif_close(..)
|
scif_close(..) scif_close(..)
|
Loading…
Reference in New Issue