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shpchp: remove unnecessary struct php_ctlr 

The struct php_ctlr seems to be only for complicating codes. This
patch removes struct php_ctlr and related codes.

Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>
Signed-off-by: Kristen Carlson Accardi <kristen.c.accardi@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This commit is contained in:
Kenji Kaneshige 2006-12-16 15:25:34 -08:00 committed by Greg Kroah-Hartman
parent ab17443a3d
commit 0abe68ce24
4 changed files with 73 additions and 249 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

42
drivers/pci/hotplug/shpchp.h
View File

@ -83,7 +83,6 @@ struct event_info {
struct controller { struct controller {
struct mutex crit_sect; /* critical section mutex */ struct mutex crit_sect; /* critical section mutex */
struct mutex cmd_lock; /* command lock */ struct mutex cmd_lock; /* command lock */
struct php_ctlr_state_s *hpc_ctlr_handle; /* HPC controller handle */
int num_slots; /* Number of slots on ctlr */ int num_slots; /* Number of slots on ctlr */
int slot_num_inc; /* 1 or -1 */ int slot_num_inc; /* 1 or -1 */
struct pci_dev *pci_dev; struct pci_dev *pci_dev;
@ -102,6 +101,8 @@ struct controller {
u32 cap_offset; u32 cap_offset;
unsigned long mmio_base; unsigned long mmio_base;
unsigned long mmio_size; unsigned long mmio_size;
void __iomem *creg;
struct timer_list poll_timer;
}; };
@ -176,10 +177,10 @@ extern int __must_check shpchp_create_ctrl_files(struct controller *ctrl);
extern int shpchp_sysfs_enable_slot(struct slot *slot); extern int shpchp_sysfs_enable_slot(struct slot *slot);
extern int shpchp_sysfs_disable_slot(struct slot *slot); extern int shpchp_sysfs_disable_slot(struct slot *slot);
extern u8 shpchp_handle_attention_button(u8 hp_slot, void *inst_id); extern u8 shpchp_handle_attention_button(u8 hp_slot, struct controller *ctrl);
extern u8 shpchp_handle_switch_change(u8 hp_slot, void *inst_id); extern u8 shpchp_handle_switch_change(u8 hp_slot, struct controller *ctrl);
extern u8 shpchp_handle_presence_change(u8 hp_slot, void *inst_id); extern u8 shpchp_handle_presence_change(u8 hp_slot, struct controller *ctrl);
extern u8 shpchp_handle_power_fault(u8 hp_slot, void *inst_id); extern u8 shpchp_handle_power_fault(u8 hp_slot, struct controller *ctrl);
/* pci functions */ /* pci functions */
extern int shpchp_save_config(struct controller *ctrl, int busnumber, int num_ctlr_slots, int first_device_num); extern int shpchp_save_config(struct controller *ctrl, int busnumber, int num_ctlr_slots, int first_device_num);
@ -262,24 +263,6 @@ enum ctrl_offsets {
SLOT11 = offsetof(struct ctrl_reg, slot11), SLOT11 = offsetof(struct ctrl_reg, slot11),
SLOT12 = offsetof(struct ctrl_reg, slot12), SLOT12 = offsetof(struct ctrl_reg, slot12),
}; };
typedef u8(*php_intr_callback_t) (u8 hp_slot, void *instance_id);
struct php_ctlr_state_s {
struct php_ctlr_state_s *pnext;
struct pci_dev *pci_dev;
unsigned int irq;
unsigned long flags; /* spinlock's */
u32 slot_device_offset;
u32 num_slots;
struct timer_list int_poll_timer; /* Added for poll event */
php_intr_callback_t attention_button_callback;
php_intr_callback_t switch_change_callback;
php_intr_callback_t presence_change_callback;
php_intr_callback_t power_fault_callback;
void *callback_instance_id;
void __iomem *creg; /* Ptr to controller register space */
};
/* Inline functions */
/* Inline functions to check the sanity of a pointer that is passed to us */ /* Inline functions to check the sanity of a pointer that is passed to us */
static inline int slot_paranoia_check (struct slot *slot, const char *function) static inline int slot_paranoia_check (struct slot *slot, const char *function)
@ -400,21 +383,8 @@ static inline void amd_pogo_errata_restore_misc_reg(struct slot *p_slot)
pci_write_config_dword(p_slot->ctrl->pci_dev, PCIX_MISCII_OFFSET, pcix_misc2_temp); pci_write_config_dword(p_slot->ctrl->pci_dev, PCIX_MISCII_OFFSET, pcix_misc2_temp);
} }
enum php_ctlr_type {
PCI,
ISA,
ACPI
};
int shpc_init( struct controller *ctrl, struct pci_dev *pdev); int shpc_init( struct controller *ctrl, struct pci_dev *pdev);
int shpc_get_ctlr_slot_config( struct controller *ctrl,
int *num_ctlr_slots,
int *first_device_num,
int *physical_slot_num,
int *updown,
int *flags);
struct hpc_ops { struct hpc_ops {
int (*power_on_slot ) (struct slot *slot); int (*power_on_slot ) (struct slot *slot);
int (*slot_enable ) (struct slot *slot); int (*slot_enable ) (struct slot *slot);

45
drivers/pci/hotplug/shpchp_core.c
View File

@ -211,36 +211,6 @@ void cleanup_slots(struct controller *ctrl)
} }
} }
static int get_ctlr_slot_config(struct controller *ctrl)
{
int num_ctlr_slots;
int first_device_num;
int physical_slot_num;
int updown;
int rc;
int flags;
rc = shpc_get_ctlr_slot_config(ctrl, &num_ctlr_slots,
&first_device_num, &physical_slot_num,
&updown, &flags);
if (rc) {
err("%s: get_ctlr_slot_config fail for b:d (%x:%x)\n",
__FUNCTION__, ctrl->bus, ctrl->device);
return -1;
}
ctrl->num_slots = num_ctlr_slots;
ctrl->slot_device_offset = first_device_num;
ctrl->first_slot = physical_slot_num;
ctrl->slot_num_inc = updown; /* either -1 or 1 */
dbg("%s: num_slot(0x%x) 1st_dev(0x%x) psn(0x%x) updown(%d) for b:d "
"(%x:%x)\n", __FUNCTION__, num_ctlr_slots, first_device_num,
physical_slot_num, updown, ctrl->bus, ctrl->device);
return 0;
}
/* /*
* set_attention_status - Turns the Amber LED for a slot on, off or blink * set_attention_status - Turns the Amber LED for a slot on, off or blink
*/ */
@ -386,8 +356,6 @@ static int shpc_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
int rc; int rc;
struct controller *ctrl; struct controller *ctrl;
struct slot *t_slot; struct slot *t_slot;
int first_device_num; /* first PCI device number */
int num_ctlr_slots; /* number of slots implemented */
if (!is_shpc_capable(pdev)) if (!is_shpc_capable(pdev))
return -ENODEV; return -ENODEV;
@ -416,17 +384,6 @@ static int shpc_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
dbg("ctrl bus=0x%x, device=%x, function=%x, irq=%x\n", dbg("ctrl bus=0x%x, device=%x, function=%x, irq=%x\n",
ctrl->bus, ctrl->device, ctrl->function, pdev->irq); ctrl->bus, ctrl->device, ctrl->function, pdev->irq);
/*
* Save configuration headers for this and subordinate PCI buses
*/
rc = get_ctlr_slot_config(ctrl);
if (rc) {
err(msg_initialization_err, rc);
goto err_out_release_ctlr;
}
first_device_num = ctrl->slot_device_offset;
num_ctlr_slots = ctrl->num_slots;
ctrl->add_support = 1; ctrl->add_support = 1;
/* Setup the slot information structures */ /* Setup the slot information structures */
@ -437,7 +394,7 @@ static int shpc_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
} }
/* Now hpc_functions (slot->hpc_ops->functions) are ready */ /* Now hpc_functions (slot->hpc_ops->functions) are ready */
t_slot = shpchp_find_slot(ctrl, first_device_num); t_slot = shpchp_find_slot(ctrl, ctrl->slot_device_offset);
/* Check for operation bus speed */ /* Check for operation bus speed */
rc = t_slot->hpc_ops->get_cur_bus_speed(t_slot, &ctrl->speed); rc = t_slot->hpc_ops->get_cur_bus_speed(t_slot, &ctrl->speed);

12
drivers/pci/hotplug/shpchp_ctrl.c
View File

@ -57,9 +57,8 @@ static int queue_interrupt_event(struct slot *p_slot, u32 event_type)
return 0; return 0;
} }
u8 shpchp_handle_attention_button(u8 hp_slot, void *inst_id) u8 shpchp_handle_attention_button(u8 hp_slot, struct controller *ctrl)
{ {
struct controller *ctrl = (struct controller *) inst_id;
struct slot *p_slot; struct slot *p_slot;
u32 event_type; u32 event_type;
@ -81,9 +80,8 @@ u8 shpchp_handle_attention_button(u8 hp_slot, void *inst_id)
} }
u8 shpchp_handle_switch_change(u8 hp_slot, void *inst_id) u8 shpchp_handle_switch_change(u8 hp_slot, struct controller *ctrl)
{ {
struct controller *ctrl = (struct controller *) inst_id;
struct slot *p_slot; struct slot *p_slot;
u8 getstatus; u8 getstatus;
u32 event_type; u32 event_type;
@ -120,9 +118,8 @@ u8 shpchp_handle_switch_change(u8 hp_slot, void *inst_id)
return 1; return 1;
} }
u8 shpchp_handle_presence_change(u8 hp_slot, void *inst_id) u8 shpchp_handle_presence_change(u8 hp_slot, struct controller *ctrl)
{ {
struct controller *ctrl = (struct controller *) inst_id;
struct slot *p_slot; struct slot *p_slot;
u32 event_type; u32 event_type;
@ -154,9 +151,8 @@ u8 shpchp_handle_presence_change(u8 hp_slot, void *inst_id)
return 1; return 1;
} }
u8 shpchp_handle_power_fault(u8 hp_slot, void *inst_id) u8 shpchp_handle_power_fault(u8 hp_slot, struct controller *ctrl)
{ {
struct controller *ctrl = (struct controller *) inst_id;
struct slot *p_slot; struct slot *p_slot;
u32 event_type; u32 event_type;

223
drivers/pci/hotplug/shpchp_hpc.c
View File

@ -212,44 +212,40 @@
#define SLOT_SERR_INT_MASK 0x3 #define SLOT_SERR_INT_MASK 0x3
DEFINE_DBG_BUFFER /* Debug string buffer for entire HPC defined here */ DEFINE_DBG_BUFFER /* Debug string buffer for entire HPC defined here */
static struct php_ctlr_state_s *php_ctlr_list_head; /* HPC state linked list */
static int ctlr_seq_num = 0; /* Controller sequenc # */
static spinlock_t list_lock;
static atomic_t shpchp_num_controllers = ATOMIC_INIT(0); static atomic_t shpchp_num_controllers = ATOMIC_INIT(0);
static irqreturn_t shpc_isr(int irq, void *dev_id); static irqreturn_t shpc_isr(int irq, void *dev_id);
static void start_int_poll_timer(struct php_ctlr_state_s *php_ctlr, int sec); static void start_int_poll_timer(struct controller *ctrl, int sec);
static int hpc_check_cmd_status(struct controller *ctrl); static int hpc_check_cmd_status(struct controller *ctrl);
static inline u8 shpc_readb(struct controller *ctrl, int reg) static inline u8 shpc_readb(struct controller *ctrl, int reg)
{ {
return readb(ctrl->hpc_ctlr_handle->creg + reg); return readb(ctrl->creg + reg);
} }
static inline void shpc_writeb(struct controller *ctrl, int reg, u8 val) static inline void shpc_writeb(struct controller *ctrl, int reg, u8 val)
{ {
writeb(val, ctrl->hpc_ctlr_handle->creg + reg); writeb(val, ctrl->creg + reg);
} }
static inline u16 shpc_readw(struct controller *ctrl, int reg) static inline u16 shpc_readw(struct controller *ctrl, int reg)
{ {
return readw(ctrl->hpc_ctlr_handle->creg + reg); return readw(ctrl->creg + reg);
} }
static inline void shpc_writew(struct controller *ctrl, int reg, u16 val) static inline void shpc_writew(struct controller *ctrl, int reg, u16 val)
{ {
writew(val, ctrl->hpc_ctlr_handle->creg + reg); writew(val, ctrl->creg + reg);
} }
static inline u32 shpc_readl(struct controller *ctrl, int reg) static inline u32 shpc_readl(struct controller *ctrl, int reg)
{ {
return readl(ctrl->hpc_ctlr_handle->creg + reg); return readl(ctrl->creg + reg);
} }
static inline void shpc_writel(struct controller *ctrl, int reg, u32 val) static inline void shpc_writel(struct controller *ctrl, int reg, u32 val)
{ {
writel(val, ctrl->hpc_ctlr_handle->creg + reg); writel(val, ctrl->creg + reg);
} }
static inline int shpc_indirect_read(struct controller *ctrl, int index, static inline int shpc_indirect_read(struct controller *ctrl, int index,
@ -268,21 +264,20 @@ static inline int shpc_indirect_read(struct controller *ctrl, int index,
/* /*
* This is the interrupt polling timeout function. * This is the interrupt polling timeout function.
*/ */
static void int_poll_timeout(unsigned long lphp_ctlr) static void int_poll_timeout(unsigned long data)
{ {
struct php_ctlr_state_s *php_ctlr = struct controller *ctrl = (struct controller *)data;
(struct php_ctlr_state_s *)lphp_ctlr;
DBG_ENTER_ROUTINE DBG_ENTER_ROUTINE
/* Poll for interrupt events. regs == NULL => polling */ /* Poll for interrupt events. regs == NULL => polling */
shpc_isr(0, php_ctlr->callback_instance_id); shpc_isr(0, ctrl);
init_timer(&php_ctlr->int_poll_timer); init_timer(&ctrl->poll_timer);
if (!shpchp_poll_time) if (!shpchp_poll_time)
shpchp_poll_time = 2; /* default polling interval is 2 sec */ shpchp_poll_time = 2; /* default polling interval is 2 sec */
start_int_poll_timer(php_ctlr, shpchp_poll_time); start_int_poll_timer(ctrl, shpchp_poll_time);
DBG_LEAVE_ROUTINE DBG_LEAVE_ROUTINE
} }
@ -290,16 +285,16 @@ static void int_poll_timeout(unsigned long lphp_ctlr)
/* /*
* This function starts the interrupt polling timer. * This function starts the interrupt polling timer.
*/ */
static void start_int_poll_timer(struct php_ctlr_state_s *php_ctlr, int sec) static void start_int_poll_timer(struct controller *ctrl, int sec)
{ {
/* Clamp to sane value */ /* Clamp to sane value */
if ((sec <= 0) || (sec > 60)) if ((sec <= 0) || (sec > 60))
sec = 2; sec = 2;
php_ctlr->int_poll_timer.function = &int_poll_timeout; ctrl->poll_timer.function = &int_poll_timeout;
php_ctlr->int_poll_timer.data = (unsigned long)php_ctlr; ctrl->poll_timer.data = (unsigned long)ctrl;
php_ctlr->int_poll_timer.expires = jiffies + sec * HZ; ctrl->poll_timer.expires = jiffies + sec * HZ;
add_timer(&php_ctlr->int_poll_timer); add_timer(&ctrl->poll_timer);
} }
static inline int is_ctrl_busy(struct controller *ctrl) static inline int is_ctrl_busy(struct controller *ctrl)
@ -666,33 +661,8 @@ static void hpc_set_green_led_blink(struct slot *slot)
shpc_write_cmd(slot, slot->hp_slot, SET_PWR_BLINK); shpc_write_cmd(slot, slot->hp_slot, SET_PWR_BLINK);
} }
int shpc_get_ctlr_slot_config(struct controller *ctrl,
int *num_ctlr_slots, /* number of slots in this HPC */
int *first_device_num, /* PCI dev num of the first slot in this SHPC */
int *physical_slot_num, /* phy slot num of the first slot in this SHPC */
int *updown, /* physical_slot_num increament: 1 or -1 */
int *flags)
{
u32 slot_config;
DBG_ENTER_ROUTINE
slot_config = shpc_readl(ctrl, SLOT_CONFIG);
*first_device_num = (slot_config & FIRST_DEV_NUM) >> 8;
*num_ctlr_slots = slot_config & SLOT_NUM;
*physical_slot_num = (slot_config & PSN) >> 16;
*updown = ((slot_config & UPDOWN) >> 29) ? 1 : -1;
dbg("%s: physical_slot_num = %x\n", __FUNCTION__, *physical_slot_num);
DBG_LEAVE_ROUTINE
return 0;
}
static void hpc_release_ctlr(struct controller *ctrl) static void hpc_release_ctlr(struct controller *ctrl)
{ {
struct php_ctlr_state_s *php_ctlr = ctrl->hpc_ctlr_handle;
struct php_ctlr_state_s *p, *p_prev;
int i; int i;
u32 slot_reg, serr_int; u32 slot_reg, serr_int;
@ -722,40 +692,15 @@ static void hpc_release_ctlr(struct controller *ctrl)
serr_int &= ~SERR_INTR_RSVDZ_MASK; serr_int &= ~SERR_INTR_RSVDZ_MASK;
shpc_writel(ctrl, SERR_INTR_ENABLE, serr_int); shpc_writel(ctrl, SERR_INTR_ENABLE, serr_int);
if (shpchp_poll_mode) { if (shpchp_poll_mode)
del_timer(&php_ctlr->int_poll_timer); del_timer(&ctrl->poll_timer);
} else { else {
if (php_ctlr->irq) { free_irq(ctrl->pci_dev->irq, ctrl);
free_irq(php_ctlr->irq, ctrl); pci_disable_msi(ctrl->pci_dev);
php_ctlr->irq = 0;
pci_disable_msi(php_ctlr->pci_dev);
}
} }
if (php_ctlr->pci_dev) { iounmap(ctrl->creg);
iounmap(php_ctlr->creg); release_mem_region(ctrl->mmio_base, ctrl->mmio_size);
release_mem_region(ctrl->mmio_base, ctrl->mmio_size);
php_ctlr->pci_dev = NULL;
}
spin_lock(&list_lock);
p = php_ctlr_list_head;
p_prev = NULL;
while (p) {
if (p == php_ctlr) {
if (p_prev)
p_prev->pnext = p->pnext;
else
php_ctlr_list_head = p->pnext;
break;
} else {
p_prev = p;
p = p->pnext;
}
}
spin_unlock(&list_lock);
kfree(php_ctlr);
/* /*
* If this is the last controller to be released, destroy the * If this is the last controller to be released, destroy the
@ -764,8 +709,7 @@ static void hpc_release_ctlr(struct controller *ctrl)
if (atomic_dec_and_test(&shpchp_num_controllers)) if (atomic_dec_and_test(&shpchp_num_controllers))
destroy_workqueue(shpchp_wq); destroy_workqueue(shpchp_wq);
DBG_LEAVE_ROUTINE DBG_LEAVE_ROUTINE
} }
static int hpc_power_on_slot(struct slot * slot) static int hpc_power_on_slot(struct slot * slot)
@ -891,7 +835,6 @@ static int hpc_set_bus_speed_mode(struct slot * slot, enum pci_bus_speed value)
static irqreturn_t shpc_isr(int irq, void *dev_id) static irqreturn_t shpc_isr(int irq, void *dev_id)
{ {
struct controller *ctrl = (struct controller *)dev_id; struct controller *ctrl = (struct controller *)dev_id;
struct php_ctlr_state_s *php_ctlr = ctrl->hpc_ctlr_handle;
u32 serr_int, slot_reg, intr_loc, intr_loc2; u32 serr_int, slot_reg, intr_loc, intr_loc2;
int hp_slot; int hp_slot;
@ -942,20 +885,16 @@ static irqreturn_t shpc_isr(int irq, void *dev_id)
__FUNCTION__, hp_slot, slot_reg); __FUNCTION__, hp_slot, slot_reg);
if (slot_reg & MRL_CHANGE_DETECTED) if (slot_reg & MRL_CHANGE_DETECTED)
php_ctlr->switch_change_callback( shpchp_handle_switch_change(hp_slot, ctrl);
hp_slot, php_ctlr->callback_instance_id);
if (slot_reg & BUTTON_PRESS_DETECTED) if (slot_reg & BUTTON_PRESS_DETECTED)
php_ctlr->attention_button_callback( shpchp_handle_attention_button(hp_slot, ctrl);
hp_slot, php_ctlr->callback_instance_id);
if (slot_reg & PRSNT_CHANGE_DETECTED) if (slot_reg & PRSNT_CHANGE_DETECTED)
php_ctlr->presence_change_callback( shpchp_handle_presence_change(hp_slot, ctrl);
hp_slot , php_ctlr->callback_instance_id);
if (slot_reg & (ISO_PFAULT_DETECTED | CON_PFAULT_DETECTED)) if (slot_reg & (ISO_PFAULT_DETECTED | CON_PFAULT_DETECTED))
php_ctlr->power_fault_callback( shpchp_handle_power_fault(hp_slot, ctrl);
hp_slot, php_ctlr->callback_instance_id);
/* Clear all slot events */ /* Clear all slot events */
slot_reg &= ~SLOT_REG_RSVDZ_MASK; slot_reg &= ~SLOT_REG_RSVDZ_MASK;
@ -1114,10 +1053,8 @@ static struct hpc_ops shpchp_hpc_ops = {
.release_ctlr = hpc_release_ctlr, .release_ctlr = hpc_release_ctlr,
}; };
int shpc_init(struct controller * ctrl, struct pci_dev * pdev) int shpc_init(struct controller *ctrl, struct pci_dev *pdev)
{ {
struct php_ctlr_state_s *php_ctlr, *p;
void *instance_id = ctrl;
int rc = -1, num_slots = 0; int rc = -1, num_slots = 0;
u8 hp_slot; u8 hp_slot;
u32 shpc_base_offset; u32 shpc_base_offset;
@ -1128,16 +1065,6 @@ int shpc_init(struct controller * ctrl, struct pci_dev * pdev)
ctrl->pci_dev = pdev; /* pci_dev of the P2P bridge */ ctrl->pci_dev = pdev; /* pci_dev of the P2P bridge */
spin_lock_init(&list_lock);
php_ctlr = kzalloc(sizeof(*php_ctlr), GFP_KERNEL);
if (!php_ctlr) { /* allocate controller state data */
err("%s: HPC controller memory allocation error!\n", __FUNCTION__);
goto abort;
}
php_ctlr->pci_dev = pdev; /* save pci_dev in context */
if ((pdev->vendor == PCI_VENDOR_ID_AMD) || (pdev->device == if ((pdev->vendor == PCI_VENDOR_ID_AMD) || (pdev->device ==
PCI_DEVICE_ID_AMD_GOLAM_7450)) { PCI_DEVICE_ID_AMD_GOLAM_7450)) {
/* amd shpc driver doesn't use Base Offset; assume 0 */ /* amd shpc driver doesn't use Base Offset; assume 0 */
@ -1147,20 +1074,20 @@ int shpc_init(struct controller * ctrl, struct pci_dev * pdev)
ctrl->cap_offset = pci_find_capability(pdev, PCI_CAP_ID_SHPC); ctrl->cap_offset = pci_find_capability(pdev, PCI_CAP_ID_SHPC);
if (!ctrl->cap_offset) { if (!ctrl->cap_offset) {
err("%s : cap_offset == 0\n", __FUNCTION__); err("%s : cap_offset == 0\n", __FUNCTION__);
goto abort_free_ctlr; goto abort;
} }
dbg("%s: cap_offset = %x\n", __FUNCTION__, ctrl->cap_offset); dbg("%s: cap_offset = %x\n", __FUNCTION__, ctrl->cap_offset);
rc = shpc_indirect_read(ctrl, 0, &shpc_base_offset); rc = shpc_indirect_read(ctrl, 0, &shpc_base_offset);
if (rc) { if (rc) {
err("%s: cannot read base_offset\n", __FUNCTION__); err("%s: cannot read base_offset\n", __FUNCTION__);
goto abort_free_ctlr; goto abort;
} }
rc = shpc_indirect_read(ctrl, 3, &tempdword); rc = shpc_indirect_read(ctrl, 3, &tempdword);
if (rc) { if (rc) {
err("%s: cannot read slot config\n", __FUNCTION__); err("%s: cannot read slot config\n", __FUNCTION__);
goto abort_free_ctlr; goto abort;
} }
num_slots = tempdword & SLOT_NUM; num_slots = tempdword & SLOT_NUM;
dbg("%s: num_slots (indirect) %x\n", __FUNCTION__, num_slots); dbg("%s: num_slots (indirect) %x\n", __FUNCTION__, num_slots);
@ -1170,7 +1097,7 @@ int shpc_init(struct controller * ctrl, struct pci_dev * pdev)
if (rc) { if (rc) {
err("%s: cannot read creg (index = %d)\n", err("%s: cannot read creg (index = %d)\n",
__FUNCTION__, i); __FUNCTION__, i);
goto abort_free_ctlr; goto abort;
} }
dbg("%s: offset %d: value %x\n", __FUNCTION__,i, dbg("%s: offset %d: value %x\n", __FUNCTION__,i,
tempdword); tempdword);
@ -1187,24 +1114,24 @@ int shpc_init(struct controller * ctrl, struct pci_dev * pdev)
rc = pci_enable_device(pdev); rc = pci_enable_device(pdev);
if (rc) { if (rc) {
err("%s: pci_enable_device failed\n", __FUNCTION__); err("%s: pci_enable_device failed\n", __FUNCTION__);
goto abort_free_ctlr; goto abort;
} }
if (!request_mem_region(ctrl->mmio_base, ctrl->mmio_size, MY_NAME)) { if (!request_mem_region(ctrl->mmio_base, ctrl->mmio_size, MY_NAME)) {
err("%s: cannot reserve MMIO region\n", __FUNCTION__); err("%s: cannot reserve MMIO region\n", __FUNCTION__);
rc = -1; rc = -1;
goto abort_free_ctlr; goto abort;
} }
php_ctlr->creg = ioremap(ctrl->mmio_base, ctrl->mmio_size); ctrl->creg = ioremap(ctrl->mmio_base, ctrl->mmio_size);
if (!php_ctlr->creg) { if (!ctrl->creg) {
err("%s: cannot remap MMIO region %lx @ %lx\n", __FUNCTION__, err("%s: cannot remap MMIO region %lx @ %lx\n", __FUNCTION__,
ctrl->mmio_size, ctrl->mmio_base); ctrl->mmio_size, ctrl->mmio_base);
release_mem_region(ctrl->mmio_base, ctrl->mmio_size); release_mem_region(ctrl->mmio_base, ctrl->mmio_size);
rc = -1; rc = -1;
goto abort_free_ctlr; goto abort;
} }
dbg("%s: php_ctlr->creg %p\n", __FUNCTION__, php_ctlr->creg); dbg("%s: ctrl->creg %p\n", __FUNCTION__, ctrl->creg);
mutex_init(&ctrl->crit_sect); mutex_init(&ctrl->crit_sect);
mutex_init(&ctrl->cmd_lock); mutex_init(&ctrl->cmd_lock);
@ -1212,23 +1139,14 @@ int shpc_init(struct controller * ctrl, struct pci_dev * pdev)
/* Setup wait queue */ /* Setup wait queue */
init_waitqueue_head(&ctrl->queue); init_waitqueue_head(&ctrl->queue);
/* Find the IRQ */
php_ctlr->irq = pdev->irq;
php_ctlr->attention_button_callback = shpchp_handle_attention_button,
php_ctlr->switch_change_callback = shpchp_handle_switch_change;
php_ctlr->presence_change_callback = shpchp_handle_presence_change;
php_ctlr->power_fault_callback = shpchp_handle_power_fault;
php_ctlr->callback_instance_id = instance_id;
ctrl->hpc_ctlr_handle = php_ctlr;
ctrl->hpc_ops = &shpchp_hpc_ops; ctrl->hpc_ops = &shpchp_hpc_ops;
/* Return PCI Controller Info */ /* Return PCI Controller Info */
slot_config = shpc_readl(ctrl, SLOT_CONFIG); slot_config = shpc_readl(ctrl, SLOT_CONFIG);
php_ctlr->slot_device_offset = (slot_config & FIRST_DEV_NUM) >> 8; ctrl->slot_device_offset = (slot_config & FIRST_DEV_NUM) >> 8;
php_ctlr->num_slots = slot_config & SLOT_NUM; ctrl->num_slots = slot_config & SLOT_NUM;
dbg("%s: slot_device_offset %x\n", __FUNCTION__, php_ctlr->slot_device_offset); ctrl->first_slot = (slot_config & PSN) >> 16;
dbg("%s: num_slots %x\n", __FUNCTION__, php_ctlr->num_slots); ctrl->slot_num_inc = ((slot_config & UPDOWN) >> 29) ? 1 : -1;
/* Mask Global Interrupt Mask & Command Complete Interrupt Mask */ /* Mask Global Interrupt Mask & Command Complete Interrupt Mask */
tempdword = shpc_readl(ctrl, SERR_INTR_ENABLE); tempdword = shpc_readl(ctrl, SERR_INTR_ENABLE);
@ -1243,7 +1161,7 @@ int shpc_init(struct controller * ctrl, struct pci_dev * pdev)
/* Mask the MRL sensor SERR Mask of individual slot in /* Mask the MRL sensor SERR Mask of individual slot in
* Slot SERR-INT Mask & clear all the existing event if any * Slot SERR-INT Mask & clear all the existing event if any
*/ */
for (hp_slot = 0; hp_slot < php_ctlr->num_slots; hp_slot++) { for (hp_slot = 0; hp_slot < ctrl->num_slots; hp_slot++) {
slot_reg = shpc_readl(ctrl, SLOT_REG(hp_slot)); slot_reg = shpc_readl(ctrl, SLOT_REG(hp_slot));
dbg("%s: Default Logical Slot Register %d value %x\n", __FUNCTION__, dbg("%s: Default Logical Slot Register %d value %x\n", __FUNCTION__,
hp_slot, slot_reg); hp_slot, slot_reg);
@ -1255,24 +1173,27 @@ int shpc_init(struct controller * ctrl, struct pci_dev * pdev)
shpc_writel(ctrl, SLOT_REG(hp_slot), slot_reg); shpc_writel(ctrl, SLOT_REG(hp_slot), slot_reg);
} }
if (shpchp_poll_mode) {/* Install interrupt polling code */ if (shpchp_poll_mode) {
/* Install and start the interrupt polling timer */ /* Install interrupt polling timer. Start with 10 sec delay */
init_timer(&php_ctlr->int_poll_timer); init_timer(&ctrl->poll_timer);
start_int_poll_timer( php_ctlr, 10 ); /* start with 10 second delay */ start_int_poll_timer(ctrl, 10);
} else { } else {
/* Installs the interrupt handler */ /* Installs the interrupt handler */
rc = pci_enable_msi(pdev); rc = pci_enable_msi(pdev);
if (rc) { if (rc) {
info("Can't get msi for the hotplug controller\n"); info("Can't get msi for the hotplug controller\n");
info("Use INTx for the hotplug controller\n"); info("Use INTx for the hotplug controller\n");
} else }
php_ctlr->irq = pdev->irq;
rc = request_irq(php_ctlr->irq, shpc_isr, IRQF_SHARED, MY_NAME, (void *) ctrl); rc = request_irq(ctrl->pci_dev->irq, shpc_isr, IRQF_SHARED,
dbg("%s: request_irq %d for hpc%d (returns %d)\n", __FUNCTION__, php_ctlr->irq, ctlr_seq_num, rc); MY_NAME, (void *)ctrl);
dbg("%s: request_irq %d for hpc%d (returns %d)\n",
__FUNCTION__, ctrl->pci_dev->irq,
atomic_read(&shpchp_num_controllers), rc);
if (rc) { if (rc) {
err("Can't get irq %d for the hotplug controller\n", php_ctlr->irq); err("Can't get irq %d for the hotplug controller\n",
goto abort_free_ctlr; ctrl->pci_dev->irq);
goto abort_iounmap;
} }
} }
dbg("%s: HPC at b:d:f:irq=0x%x:%x:%x:%x\n", __FUNCTION__, dbg("%s: HPC at b:d:f:irq=0x%x:%x:%x:%x\n", __FUNCTION__,
@ -1280,24 +1201,6 @@ int shpc_init(struct controller * ctrl, struct pci_dev * pdev)
PCI_FUNC(pdev->devfn), pdev->irq); PCI_FUNC(pdev->devfn), pdev->irq);
get_hp_hw_control_from_firmware(pdev); get_hp_hw_control_from_firmware(pdev);
/* Add this HPC instance into the HPC list */
spin_lock(&list_lock);
if (php_ctlr_list_head == 0) {
php_ctlr_list_head = php_ctlr;
p = php_ctlr_list_head;
p->pnext = NULL;
} else {
p = php_ctlr_list_head;
while (p->pnext)
p = p->pnext;
p->pnext = php_ctlr;
}
spin_unlock(&list_lock);
ctlr_seq_num++;
/* /*
* If this is the first controller to be initialized, * If this is the first controller to be initialized,
* initialize the shpchpd work queue * initialize the shpchpd work queue
@ -1306,14 +1209,14 @@ int shpc_init(struct controller * ctrl, struct pci_dev * pdev)
shpchp_wq = create_singlethread_workqueue("shpchpd"); shpchp_wq = create_singlethread_workqueue("shpchpd");
if (!shpchp_wq) { if (!shpchp_wq) {
rc = -ENOMEM; rc = -ENOMEM;
goto abort_free_ctlr; goto abort_iounmap;
} }
} }
/* /*
* Unmask all event interrupts of all slots * Unmask all event interrupts of all slots
*/ */
for (hp_slot = 0; hp_slot < php_ctlr->num_slots; hp_slot++) { for (hp_slot = 0; hp_slot < ctrl->num_slots; hp_slot++) {
slot_reg = shpc_readl(ctrl, SLOT_REG(hp_slot)); slot_reg = shpc_readl(ctrl, SLOT_REG(hp_slot));
dbg("%s: Default Logical Slot Register %d value %x\n", __FUNCTION__, dbg("%s: Default Logical Slot Register %d value %x\n", __FUNCTION__,
hp_slot, slot_reg); hp_slot, slot_reg);
@ -1336,10 +1239,8 @@ int shpc_init(struct controller * ctrl, struct pci_dev * pdev)
return 0; return 0;
/* We end up here for the many possible ways to fail this API. */ /* We end up here for the many possible ways to fail this API. */
abort_free_ctlr: abort_iounmap:
if (php_ctlr->creg) iounmap(ctrl->creg);
iounmap(php_ctlr->creg);
kfree(php_ctlr);
abort: abort:
DBG_LEAVE_ROUTINE DBG_LEAVE_ROUTINE
return rc; return rc;