* skx_edac: Address translation for NVDIMMs (Tony Luck and Qiuxu Zhuo)
* ACPI_ADXL build fix -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEzv7L6UO9uDPlPSfHEsHwGGHeVUoFAlvcKnEACgkQEsHwGGHe VUr45g/9E67lU84Dz41ly6zFDTmQdYBNPRayz9QgIGHfIMwIN8aAVoezC8B4NCqc 8rQ3W48REkewLmPO2GoEVld4UnHbvVlZYZ4bGcxhYzWL5dcleoJIFVupF4Ifo6/Y SPbVUyihtw4FFr+Ft8x/bOJQ6QQ4CIiVX3mJBdwdqQ6Lm9yoEz6AlSbTJiyyzr8I gGfcKD5TcmJWpsDzRXJ/xWddfA+hfUpKxkuJqPIRZvmKnJpy79af8MlQAZwXuXVS 361wj5SzP0LzktT5JQn73V04NzSSDTbFSycnWXUex3lxIsE6KolsEwfglccdhvIy Nz/Du4kJn1Ye/zbsO27qtkGCXSz0qYKsdfUg1RY+MnZPe4mFmmAm0izTKH3EltQx +OQWtcBz5vvNf3Odwnfw1nNvYrbnzaDNIsjHspopVrsmD2oRefmpsYsOEzGyAGDw PtUC3l70u7i4e2NtF7Doo23g1yIyXWQZtrEDDFmQZGUo7YKxE7AkGPzINxpNSQME z11ny9GyISaUc/Zf5zUHYmIFcYtiCngecl4F8hCXvfyp4MbxYgTI+5YY185NfLSU pQHwyMGKLifI6ndhWd3sO9KSCqFzSZKaVF/DdKScSqB+v1NqflMyjzfulR625/5U cSWWQP8Zu6H7os/X3+o5KCC/Pzbs5Nx/QPLwCabrOwcI3kdmQ2E= =JQUK -----END PGP SIGNATURE----- Merge tag 'edac_for_4.20_2' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp Pull more EDAC updates from Borislav Petkov: "The second part of the EDAC pile which contains the ADXL user and a build fix which addresses a not-so-sensical .config but fixes randconfig builds people do: - skx_edac: Address translation for NVDIMMs (Tony Luck and Qiuxu Zhuo) - ACPI_ADXL build fix" [ I don't think "sensical" is a word, particularly when used in the context of actually meaning "nonsensical", but I like it - Linus ] * tag 'edac_for_4.20_2' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp: EDAC, skx: Fix randconfig builds EDAC, skx_edac: Add address translation for non-volatile DIMMs
This commit is contained in:
commit
0b21f21ae0
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@ -234,6 +234,7 @@ config EDAC_SKX
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depends on PCI && X86_64 && X86_MCE_INTEL && PCI_MMCONFIG
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depends on ACPI_NFIT || !ACPI_NFIT # if ACPI_NFIT=m, EDAC_SKX can't be y
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select DMI
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select ACPI_ADXL if ACPI
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help
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Support for error detection and correction the Intel
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Skylake server Integrated Memory Controllers. If your
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@ -26,6 +26,7 @@
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#include <linux/bitmap.h>
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#include <linux/math64.h>
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#include <linux/mod_devicetable.h>
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#include <linux/adxl.h>
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#include <acpi/nfit.h>
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#include <asm/cpu_device_id.h>
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#include <asm/intel-family.h>
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@ -35,6 +36,7 @@
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#include "edac_module.h"
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#define EDAC_MOD_STR "skx_edac"
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#define MSG_SIZE 1024
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/*
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* Debug macros
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@ -54,6 +56,29 @@
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static LIST_HEAD(skx_edac_list);
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static u64 skx_tolm, skx_tohm;
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static char *skx_msg;
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static unsigned int nvdimm_count;
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enum {
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INDEX_SOCKET,
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INDEX_MEMCTRL,
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INDEX_CHANNEL,
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INDEX_DIMM,
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INDEX_MAX
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};
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static const char * const component_names[] = {
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[INDEX_SOCKET] = "ProcessorSocketId",
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[INDEX_MEMCTRL] = "MemoryControllerId",
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[INDEX_CHANNEL] = "ChannelId",
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[INDEX_DIMM] = "DimmSlotId",
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};
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static int component_indices[ARRAY_SIZE(component_names)];
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static int adxl_component_count;
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static const char * const *adxl_component_names;
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static u64 *adxl_values;
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static char *adxl_msg;
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#define NUM_IMC 2 /* memory controllers per socket */
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#define NUM_CHANNELS 3 /* channels per memory controller */
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@ -393,6 +418,8 @@ static int get_nvdimm_info(struct dimm_info *dimm, struct skx_imc *imc,
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u16 flags;
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u64 size = 0;
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nvdimm_count++;
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dev_handle = ACPI_NFIT_BUILD_DEVICE_HANDLE(dimmno, chan, imc->lmc,
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imc->src_id, 0);
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@ -941,12 +968,46 @@ static void teardown_skx_debug(void)
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}
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#endif /*CONFIG_EDAC_DEBUG*/
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static bool skx_adxl_decode(struct decoded_addr *res)
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{
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int i, len = 0;
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if (res->addr >= skx_tohm || (res->addr >= skx_tolm &&
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res->addr < BIT_ULL(32))) {
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edac_dbg(0, "Address 0x%llx out of range\n", res->addr);
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return false;
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}
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if (adxl_decode(res->addr, adxl_values)) {
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edac_dbg(0, "Failed to decode 0x%llx\n", res->addr);
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return false;
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}
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res->socket = (int)adxl_values[component_indices[INDEX_SOCKET]];
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res->imc = (int)adxl_values[component_indices[INDEX_MEMCTRL]];
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res->channel = (int)adxl_values[component_indices[INDEX_CHANNEL]];
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res->dimm = (int)adxl_values[component_indices[INDEX_DIMM]];
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for (i = 0; i < adxl_component_count; i++) {
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if (adxl_values[i] == ~0x0ull)
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continue;
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len += snprintf(adxl_msg + len, MSG_SIZE - len, " %s:0x%llx",
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adxl_component_names[i], adxl_values[i]);
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if (MSG_SIZE - len <= 0)
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break;
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}
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return true;
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}
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static void skx_mce_output_error(struct mem_ctl_info *mci,
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const struct mce *m,
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struct decoded_addr *res)
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{
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enum hw_event_mc_err_type tp_event;
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char *type, *optype, msg[256];
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char *type, *optype;
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bool ripv = GET_BITFIELD(m->mcgstatus, 0, 0);
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bool overflow = GET_BITFIELD(m->status, 62, 62);
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bool uncorrected_error = GET_BITFIELD(m->status, 61, 61);
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break;
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}
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}
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snprintf(msg, sizeof(msg),
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if (adxl_component_count) {
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snprintf(skx_msg, MSG_SIZE, "%s%s err_code:%04x:%04x %s",
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overflow ? " OVERFLOW" : "",
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(uncorrected_error && recoverable) ? " recoverable" : "",
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mscod, errcode, adxl_msg);
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} else {
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snprintf(skx_msg, MSG_SIZE,
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"%s%s err_code:%04x:%04x socket:%d imc:%d rank:%d bg:%d ba:%d row:%x col:%x",
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overflow ? " OVERFLOW" : "",
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(uncorrected_error && recoverable) ? " recoverable" : "",
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mscod, errcode,
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res->socket, res->imc, res->rank,
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res->bank_group, res->bank_address, res->row, res->column);
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}
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edac_dbg(0, "%s\n", msg);
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edac_dbg(0, "%s\n", skx_msg);
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/* Call the helper to output message */
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edac_mc_handle_error(tp_event, mci, core_err_cnt,
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m->addr >> PAGE_SHIFT, m->addr & ~PAGE_MASK, 0,
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res->channel, res->dimm, -1,
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optype, msg);
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optype, skx_msg);
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}
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static struct mem_ctl_info *get_mci(int src_id, int lmc)
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{
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struct skx_dev *d;
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if (lmc > NUM_IMC - 1) {
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skx_printk(KERN_ERR, "Bad lmc %d\n", lmc);
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return NULL;
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}
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list_for_each_entry(d, &skx_edac_list, list) {
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if (d->imc[0].src_id == src_id)
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return d->imc[lmc].mci;
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}
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skx_printk(KERN_ERR, "No mci for src_id %d lmc %d\n", src_id, lmc);
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return NULL;
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}
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static int skx_mce_check_error(struct notifier_block *nb, unsigned long val,
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if ((mce->status & 0xefff) >> 7 != 1 || !(mce->status & MCI_STATUS_ADDRV))
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return NOTIFY_DONE;
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memset(&res, 0, sizeof(res));
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res.addr = mce->addr;
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if (adxl_component_count) {
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if (!skx_adxl_decode(&res))
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return NOTIFY_DONE;
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mci = get_mci(res.socket, res.imc);
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} else {
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if (!skx_decode(&res))
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return NOTIFY_DONE;
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mci = res.dev->imc[res.imc].mci;
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}
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if (!mci)
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return NOTIFY_DONE;
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if (mce->mcgstatus & MCG_STATUS_MCIP)
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type = "Exception";
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}
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}
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static void __init skx_adxl_get(void)
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{
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const char * const *names;
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int i, j;
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names = adxl_get_component_names();
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if (!names) {
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skx_printk(KERN_NOTICE, "No firmware support for address translation.");
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skx_printk(KERN_CONT, " Only decoding DDR4 address!\n");
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return;
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}
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for (i = 0; i < INDEX_MAX; i++) {
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for (j = 0; names[j]; j++) {
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if (!strcmp(component_names[i], names[j])) {
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component_indices[i] = j;
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break;
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}
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}
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if (!names[j])
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goto err;
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}
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adxl_component_names = names;
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while (*names++)
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adxl_component_count++;
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adxl_values = kcalloc(adxl_component_count, sizeof(*adxl_values),
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GFP_KERNEL);
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if (!adxl_values) {
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adxl_component_count = 0;
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return;
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}
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adxl_msg = kzalloc(MSG_SIZE, GFP_KERNEL);
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if (!adxl_msg) {
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adxl_component_count = 0;
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kfree(adxl_values);
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}
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return;
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err:
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skx_printk(KERN_ERR, "'%s' is not matched from DSM parameters: ",
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component_names[i]);
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for (j = 0; names[j]; j++)
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skx_printk(KERN_CONT, "%s ", names[j]);
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skx_printk(KERN_CONT, "\n");
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}
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static void __exit skx_adxl_put(void)
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{
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kfree(adxl_values);
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kfree(adxl_msg);
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}
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/*
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* skx_init:
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* make sure we are running on the correct cpu model
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}
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}
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skx_msg = kzalloc(MSG_SIZE, GFP_KERNEL);
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if (!skx_msg) {
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rc = -ENOMEM;
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goto fail;
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}
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if (nvdimm_count)
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skx_adxl_get();
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/* Ensure that the OPSTATE is set correctly for POLL or NMI */
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opstate_init();
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edac_dbg(2, "\n");
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mce_unregister_decode_chain(&skx_mce_dec);
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skx_remove();
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if (nvdimm_count)
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skx_adxl_put();
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kfree(skx_msg);
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teardown_skx_debug();
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}
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@ -7,7 +7,12 @@
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#ifndef _LINUX_ADXL_H
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#define _LINUX_ADXL_H
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#ifdef CONFIG_ACPI_ADXL
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const char * const *adxl_get_component_names(void);
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int adxl_decode(u64 addr, u64 component_values[]);
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#else
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static inline const char * const *adxl_get_component_names(void) { return NULL; }
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static inline int adxl_decode(u64 addr, u64 component_values[]) { return -EOPNOTSUPP; }
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#endif
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#endif /* _LINUX_ADXL_H */
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