KVM: x86: expose AVX512_BF16 feature to guest
AVX512 BFLOAT16 instructions support 16-bit BFLOAT16 floating-point format (BF16) for deep learning optimization. Intel adds AVX512 BFLOAT16 feature in CooperLake, which is CPUID.7.1.EAX[5]. Detailed information of the CPUID bit can be found here, https://software.intel.com/sites/default/files/managed/c5/15/\ architecture-instruction-set-extensions-programming-reference.pdf. Signed-off-by: Jing Liu <jing2.liu@linux.intel.com> [Fix type mismatch in min, changing constant "1" to "1u". - Paolo] Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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@ -368,9 +368,13 @@ static inline void do_cpuid_7_mask(struct kvm_cpuid_entry2 *entry, int index)
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F(SPEC_CTRL_SSBD) | F(ARCH_CAPABILITIES) | F(INTEL_STIBP) |
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F(SPEC_CTRL_SSBD) | F(ARCH_CAPABILITIES) | F(INTEL_STIBP) |
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F(MD_CLEAR);
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F(MD_CLEAR);
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/* cpuid 7.1.eax */
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const u32 kvm_cpuid_7_1_eax_x86_features =
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F(AVX512_BF16);
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switch (index) {
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switch (index) {
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case 0:
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case 0:
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entry->eax = 0;
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entry->eax = min(entry->eax, 1u);
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entry->ebx &= kvm_cpuid_7_0_ebx_x86_features;
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entry->ebx &= kvm_cpuid_7_0_ebx_x86_features;
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cpuid_mask(&entry->ebx, CPUID_7_0_EBX);
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cpuid_mask(&entry->ebx, CPUID_7_0_EBX);
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/* TSC_ADJUST is emulated */
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/* TSC_ADJUST is emulated */
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@ -394,6 +398,12 @@ static inline void do_cpuid_7_mask(struct kvm_cpuid_entry2 *entry, int index)
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*/
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*/
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entry->edx |= F(ARCH_CAPABILITIES);
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entry->edx |= F(ARCH_CAPABILITIES);
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break;
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break;
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case 1:
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entry->eax &= kvm_cpuid_7_1_eax_x86_features;
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entry->ebx = 0;
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entry->ecx = 0;
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entry->edx = 0;
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break;
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default:
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default:
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WARN_ON_ONCE(1);
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WARN_ON_ONCE(1);
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entry->eax = 0;
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entry->eax = 0;
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