mailbox: Enable BCM2835 mailbox support
This mailbox driver provides a single mailbox channel to write 32-bit values to the VPU and get a 32-bit response. The Raspberry Pi firmware uses this mailbox channel to implement firmware calls, while Roku 2 (despite being derived from the same firmware tree) doesn't. The driver was originally submitted by Lubomir, based on the out-of-tree 2708 mailbox driver. Eric Anholt fixed it up for upstreaming, with the major functional change being that it now has no notion of multiple channels (since that is a firmware-dependent concept) and instead the raspberrypi-firmware driver will do that bit-twiddling in its own messages. [Jassi: made the 'mbox_chan_ops' struct as const and removed a redundant variable] Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Signed-off-by: Craig McGeachie <slapdau@yahoo.com.au> Signed-off-by: Eric Anholt <eric@anholt.net> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
This commit is contained in:
Lubomir Rintel
Jassi Brar
parent
d4b5c782b9
commit
0bae6af6d7
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@ -61,4 +61,13 @@ config ALTERA_MBOX
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An implementation of the Altera Mailbox soft core. It is used
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to send message between processors. Say Y here if you want to use the
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Altera mailbox support.
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config BCM2835_MBOX
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tristate "BCM2835 Mailbox"
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depends on ARCH_BCM2835
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help
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An implementation of the BCM2385 Mailbox. It is used to invoke
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the services of the Videocore. Say Y here if you want to use the
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BCM2835 Mailbox.
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endif
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@ -11,3 +11,5 @@ obj-$(CONFIG_OMAP2PLUS_MBOX) += omap-mailbox.o
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obj-$(CONFIG_PCC) += pcc.o
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obj-$(CONFIG_ALTERA_MBOX) += mailbox-altera.o
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obj-$(CONFIG_BCM2835_MBOX) += bcm2835-mailbox.o
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@ -0,0 +1,216 @@
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/*
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* Copyright (C) 2010,2015 Broadcom
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* Copyright (C) 2013-2014 Lubomir Rintel
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* Copyright (C) 2013 Craig McGeachie
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This device provides a mechanism for writing to the mailboxes,
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* that are shared between the ARM and the VideoCore processor
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*
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* Parts of the driver are based on:
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* - arch/arm/mach-bcm2708/vcio.c file written by Gray Girling that was
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* obtained from branch "rpi-3.6.y" of git://github.com/raspberrypi/
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* linux.git
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* - drivers/mailbox/bcm2835-ipc.c by Lubomir Rintel at
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* https://github.com/hackerspace/rpi-linux/blob/lr-raspberry-pi/drivers/
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* mailbox/bcm2835-ipc.c
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* - documentation available on the following web site:
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* https://github.com/raspberrypi/firmware/wiki/Mailbox-property-interface
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*/
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#include <linux/device.h>
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#include <linux/dma-mapping.h>
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#include <linux/err.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/kernel.h>
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#include <linux/mailbox_controller.h>
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#include <linux/module.h>
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#include <linux/of_address.h>
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#include <linux/of_irq.h>
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#include <linux/platform_device.h>
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#include <linux/spinlock.h>
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/* Mailboxes */
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#define ARM_0_MAIL0 0x00
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#define ARM_0_MAIL1 0x20
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/*
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* Mailbox registers. We basically only support mailbox 0 & 1. We
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* deliver to the VC in mailbox 1, it delivers to us in mailbox 0. See
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* BCM2835-ARM-Peripherals.pdf section 1.3 for an explanation about
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* the placement of memory barriers.
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*/
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#define MAIL0_RD (ARM_0_MAIL0 + 0x00)
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#define MAIL0_POL (ARM_0_MAIL0 + 0x10)
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#define MAIL0_STA (ARM_0_MAIL0 + 0x18)
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#define MAIL0_CNF (ARM_0_MAIL0 + 0x1C)
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#define MAIL1_WRT (ARM_0_MAIL1 + 0x00)
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/* Status register: FIFO state. */
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#define ARM_MS_FULL BIT(31)
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#define ARM_MS_EMPTY BIT(30)
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/* Configuration register: Enable interrupts. */
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#define ARM_MC_IHAVEDATAIRQEN BIT(0)
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struct bcm2835_mbox {
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void __iomem *regs;
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spinlock_t lock;
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struct mbox_controller controller;
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};
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static struct bcm2835_mbox *bcm2835_link_mbox(struct mbox_chan *link)
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{
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return container_of(link->mbox, struct bcm2835_mbox, controller);
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}
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static irqreturn_t bcm2835_mbox_irq(int irq, void *dev_id)
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{
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struct bcm2835_mbox *mbox = dev_id;
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struct device *dev = mbox->controller.dev;
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struct mbox_chan *link = &mbox->controller.chans[0];
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while (!(readl(mbox->regs + MAIL0_STA) & ARM_MS_EMPTY)) {
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u32 msg = readl(mbox->regs + MAIL0_RD);
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dev_dbg(dev, "Reply 0x%08X\n", msg);
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mbox_chan_received_data(link, &msg);
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}
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return IRQ_HANDLED;
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}
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static int bcm2835_send_data(struct mbox_chan *link, void *data)
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{
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struct bcm2835_mbox *mbox = bcm2835_link_mbox(link);
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u32 msg = *(u32 *)data;
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spin_lock(&mbox->lock);
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writel(msg, mbox->regs + MAIL1_WRT);
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dev_dbg(mbox->controller.dev, "Request 0x%08X\n", msg);
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spin_unlock(&mbox->lock);
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return 0;
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}
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static int bcm2835_startup(struct mbox_chan *link)
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{
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struct bcm2835_mbox *mbox = bcm2835_link_mbox(link);
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/* Enable the interrupt on data reception */
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writel(ARM_MC_IHAVEDATAIRQEN, mbox->regs + MAIL0_CNF);
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return 0;
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}
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static void bcm2835_shutdown(struct mbox_chan *link)
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{
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struct bcm2835_mbox *mbox = bcm2835_link_mbox(link);
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writel(0, mbox->regs + MAIL0_CNF);
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}
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static bool bcm2835_last_tx_done(struct mbox_chan *link)
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{
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struct bcm2835_mbox *mbox = bcm2835_link_mbox(link);
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bool ret;
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spin_lock(&mbox->lock);
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ret = !(readl(mbox->regs + MAIL0_STA) & ARM_MS_FULL);
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spin_unlock(&mbox->lock);
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return ret;
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}
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static const struct mbox_chan_ops bcm2835_mbox_chan_ops = {
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.send_data = bcm2835_send_data,
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.startup = bcm2835_startup,
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.shutdown = bcm2835_shutdown,
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.last_tx_done = bcm2835_last_tx_done
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};
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static struct mbox_chan *bcm2835_mbox_index_xlate(struct mbox_controller *mbox,
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const struct of_phandle_args *sp)
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{
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if (sp->args_count != 0)
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return NULL;
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return &mbox->chans[0];
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}
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static int bcm2835_mbox_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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int ret = 0;
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struct resource *iomem;
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struct bcm2835_mbox *mbox;
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mbox = devm_kzalloc(dev, sizeof(*mbox), GFP_KERNEL);
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if (mbox == NULL)
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return -ENOMEM;
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spin_lock_init(&mbox->lock);
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ret = devm_request_irq(dev, irq_of_parse_and_map(dev->of_node, 0),
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bcm2835_mbox_irq, 0, dev_name(dev), mbox);
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if (ret) {
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dev_err(dev, "Failed to register a mailbox IRQ handler: %d\n",
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ret);
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return -ENODEV;
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}
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iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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mbox->regs = devm_ioremap_resource(&pdev->dev, iomem);
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if (IS_ERR(mbox->regs)) {
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ret = PTR_ERR(mbox->regs);
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dev_err(&pdev->dev, "Failed to remap mailbox regs: %d\n", ret);
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return ret;
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}
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mbox->controller.txdone_poll = true;
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mbox->controller.txpoll_period = 5;
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mbox->controller.ops = &bcm2835_mbox_chan_ops;
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mbox->controller.of_xlate = &bcm2835_mbox_index_xlate;
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mbox->controller.dev = dev;
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mbox->controller.num_chans = 1;
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mbox->controller.chans = devm_kzalloc(dev,
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sizeof(*mbox->controller.chans), GFP_KERNEL);
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if (!mbox->controller.chans)
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return -ENOMEM;
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ret = mbox_controller_register(&mbox->controller);
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if (ret)
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return ret;
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platform_set_drvdata(pdev, mbox);
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dev_info(dev, "mailbox enabled\n");
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return ret;
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}
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static int bcm2835_mbox_remove(struct platform_device *pdev)
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{
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struct bcm2835_mbox *mbox = platform_get_drvdata(pdev);
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mbox_controller_unregister(&mbox->controller);
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return 0;
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}
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static const struct of_device_id bcm2835_mbox_of_match[] = {
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{ .compatible = "brcm,bcm2835-mbox", },
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{},
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};
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MODULE_DEVICE_TABLE(of, bcm2835_mbox_of_match);
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static struct platform_driver bcm2835_mbox_driver = {
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.driver = {
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.name = "bcm2835-mbox",
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.owner = THIS_MODULE,
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.of_match_table = bcm2835_mbox_of_match,
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},
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.probe = bcm2835_mbox_probe,
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.remove = bcm2835_mbox_remove,
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};
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module_platform_driver(bcm2835_mbox_driver);
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MODULE_AUTHOR("Lubomir Rintel <lkundrak@v3.sk>");
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MODULE_DESCRIPTION("BCM2835 mailbox IPC driver");
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MODULE_LICENSE("GPL v2");
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