[ALSA] hda-intel - Check validity of DMA position
HDA Intel driver Check the validity of the current DMA position when position_fix=0 (auto) is set. If the DMA position overcomes the threshold, the driver changes the fix behavior automatically to use POSBUF. Signed-off-by: Takashi Iwai <tiwai@suse.de>
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@ -62,7 +62,7 @@ MODULE_PARM_DESC(enable, "Enable Intel HD audio interface.");
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module_param_array(model, charp, NULL, 0444);
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MODULE_PARM_DESC(model, "Use the given board model.");
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module_param_array(position_fix, int, NULL, 0444);
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MODULE_PARM_DESC(position_fix, "Fix DMA pointer (0 = FIFO size, 1 = none, 2 = POSBUF).");
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MODULE_PARM_DESC(position_fix, "Fix DMA pointer (0 = auto, 1 = none, 2 = POSBUF, 3 = FIFO size).");
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MODULE_LICENSE("GPL");
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MODULE_SUPPORTED_DEVICE("{{Intel, ICH6},"
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@ -211,9 +211,10 @@ enum { SDI0, SDI1, SDI2, SDI3, SDO0, SDO1, SDO2, SDO3 };
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/* position fix mode */
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enum {
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POS_FIX_FIFO,
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POS_FIX_AUTO,
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POS_FIX_NONE,
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POS_FIX_POSBUF
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POS_FIX_POSBUF,
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POS_FIX_FIFO,
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};
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/* Defines for ATI HD Audio support in SB450 south bridge */
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@ -243,6 +244,7 @@ struct snd_azx_dev {
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unsigned int fragsize; /* size of each period in bytes */
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unsigned int frags; /* number for period in the play buffer */
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unsigned int fifo_size; /* FIFO size */
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unsigned int last_pos; /* last updated period position */
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void __iomem *sd_addr; /* stream descriptor pointer */
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@ -256,6 +258,7 @@ struct snd_azx_dev {
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unsigned int opened: 1;
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unsigned int running: 1;
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unsigned int period_updating: 1;
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};
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/* CORB/RIRB */
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@ -724,11 +727,9 @@ static void azx_init_chip(azx_t *chip)
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/* initialize the codec command I/O */
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azx_init_cmd_io(chip);
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if (chip->position_fix == POS_FIX_POSBUF) {
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/* program the position buffer */
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azx_writel(chip, DPLBASE, (u32)chip->posbuf.addr);
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azx_writel(chip, DPUBASE, upper_32bit(chip->posbuf.addr));
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}
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/* program the position buffer */
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azx_writel(chip, DPLBASE, (u32)chip->posbuf.addr);
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azx_writel(chip, DPUBASE, upper_32bit(chip->posbuf.addr));
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/* For ATI SB450 azalia HD audio, we need to enable snoop */
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if (chip->driver_type == AZX_DRIVER_ATI) {
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@ -763,9 +764,11 @@ static irqreturn_t azx_interrupt(int irq, void* dev_id, struct pt_regs *regs)
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if (status & azx_dev->sd_int_sta_mask) {
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azx_sd_writeb(azx_dev, SD_STS, SD_INT_MASK);
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if (azx_dev->substream && azx_dev->running) {
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azx_dev->period_updating = 1;
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spin_unlock(&chip->reg_lock);
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snd_pcm_period_elapsed(azx_dev->substream);
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spin_lock(&chip->reg_lock);
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azx_dev->period_updating = 0;
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}
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}
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}
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@ -866,11 +869,9 @@ static int azx_setup_controller(azx_t *chip, azx_dev_t *azx_dev)
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/* upper BDL address */
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azx_sd_writel(azx_dev, SD_BDLPU, upper_32bit(azx_dev->bdl_addr));
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if (chip->position_fix == POS_FIX_POSBUF) {
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/* enable the position buffer */
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if (! (azx_readl(chip, DPLBASE) & ICH6_DPLBASE_ENABLE))
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azx_writel(chip, DPLBASE, (u32)chip->posbuf.addr | ICH6_DPLBASE_ENABLE);
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}
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/* enable the position buffer */
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if (! (azx_readl(chip, DPLBASE) & ICH6_DPLBASE_ENABLE))
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azx_writel(chip, DPLBASE, (u32)chip->posbuf.addr | ICH6_DPLBASE_ENABLE);
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/* set the interrupt enable bits in the descriptor control register */
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azx_sd_writel(azx_dev, SD_CTL, azx_sd_readl(azx_dev, SD_CTL) | SD_INT_MASK);
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@ -1078,6 +1079,7 @@ static int azx_pcm_prepare(snd_pcm_substream_t *substream)
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azx_dev->fifo_size = azx_sd_readw(azx_dev, SD_FIFOSIZE) + 1;
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else
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azx_dev->fifo_size = 0;
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azx_dev->last_pos = 0;
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return hinfo->ops.prepare(hinfo, apcm->codec, azx_dev->stream_tag,
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azx_dev->format_val, substream);
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@ -1133,6 +1135,26 @@ static snd_pcm_uframes_t azx_pcm_pointer(snd_pcm_substream_t *substream)
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pos = azx_sd_readl(azx_dev, SD_LPIB);
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if (chip->position_fix == POS_FIX_FIFO)
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pos += azx_dev->fifo_size;
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else if (chip->position_fix == POS_FIX_AUTO && azx_dev->period_updating) {
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/* check the validity of DMA position */
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unsigned int diff = 0;
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azx_dev->last_pos += azx_dev->fragsize;
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if (azx_dev->last_pos > pos)
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diff = azx_dev->last_pos - pos;
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if (azx_dev->last_pos >= azx_dev->bufsize) {
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if (pos < azx_dev->fragsize)
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diff = 0;
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azx_dev->last_pos = 0;
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}
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if (diff > 0 && diff <= azx_dev->fifo_size)
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pos += azx_dev->fifo_size;
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else {
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snd_printdd(KERN_INFO "hda_intel: DMA position fix %d, switching to posbuf\n", diff);
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chip->position_fix = POS_FIX_POSBUF;
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pos = *azx_dev->posbuf;
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}
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azx_dev->period_updating = 0;
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}
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}
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if (pos >= azx_dev->bufsize)
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pos = 0;
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@ -1244,8 +1266,7 @@ static int __devinit azx_init_stream(azx_t *chip)
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azx_dev_t *azx_dev = &chip->azx_dev[i];
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azx_dev->bdl = (u32 *)(chip->bdl.area + off);
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azx_dev->bdl_addr = chip->bdl.addr + off;
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if (chip->position_fix == POS_FIX_POSBUF)
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azx_dev->posbuf = (volatile u32 *)(chip->posbuf.area + i * 8);
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azx_dev->posbuf = (volatile u32 *)(chip->posbuf.area + i * 8);
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/* offset: SDI0=0x80, SDI1=0xa0, ... SDO3=0x160 */
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azx_dev->sd_addr = chip->remap_addr + (0x20 * i + 0x80);
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/* int mask: SDI0=0x01, SDI1=0x02, ... SDO3=0x80 */
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@ -1437,13 +1458,11 @@ static int __devinit azx_create(snd_card_t *card, struct pci_dev *pci,
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snd_printk(KERN_ERR SFX "cannot allocate BDL\n");
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goto errout;
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}
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if (chip->position_fix == POS_FIX_POSBUF) {
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/* allocate memory for the position buffer */
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if ((err = snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci),
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chip->num_streams * 8, &chip->posbuf)) < 0) {
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snd_printk(KERN_ERR SFX "cannot allocate posbuf\n");
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goto errout;
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}
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/* allocate memory for the position buffer */
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if ((err = snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci),
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chip->num_streams * 8, &chip->posbuf)) < 0) {
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snd_printk(KERN_ERR SFX "cannot allocate posbuf\n");
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goto errout;
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}
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/* allocate CORB/RIRB */
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if ((err = azx_alloc_cmd_io(chip)) < 0)
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