[PATCH] synclink_gt remove unnecessary page alignment
Remove unnecessary and incorrectly implemented page alignment of register base address before calling ioremap() Signed-off-by: Paul Fulghum <paulkf@microgate.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
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@ -1,5 +1,5 @@
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/*
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* $Id: synclink_gt.c,v 4.20 2005/11/08 19:51:55 paulkf Exp $
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* $Id: synclink_gt.c,v 4.22 2006/01/09 20:16:06 paulkf Exp $
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*
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* Device driver for Microgate SyncLink GT serial adapters.
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*
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@ -92,7 +92,7 @@
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* module identification
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*/
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static char *driver_name = "SyncLink GT";
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static char *driver_version = "$Revision: 4.20 $";
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static char *driver_version = "$Revision: 4.22 $";
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static char *tty_driver_name = "synclink_gt";
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static char *tty_dev_prefix = "ttySLG";
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MODULE_LICENSE("GPL");
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@ -288,7 +288,6 @@ struct slgt_info {
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unsigned char __iomem * reg_addr; /* memory mapped registers address */
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u32 phys_reg_addr;
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u32 reg_offset;
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int reg_addr_requested;
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MGSL_PARAMS params; /* communications parameters */
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@ -2976,14 +2975,13 @@ static int claim_resources(struct slgt_info *info)
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else
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info->reg_addr_requested = 1;
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info->reg_addr = ioremap(info->phys_reg_addr, PAGE_SIZE);
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info->reg_addr = ioremap(info->phys_reg_addr, SLGT_REG_SIZE);
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if (!info->reg_addr) {
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DBGERR(("%s cant map device registers, addr=%08X\n",
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info->device_name, info->phys_reg_addr));
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info->init_error = DiagStatus_CantAssignPciResources;
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goto errout;
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}
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info->reg_addr += info->reg_offset;
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return 0;
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errout:
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@ -3004,7 +3002,7 @@ static void release_resources(struct slgt_info *info)
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}
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if (info->reg_addr) {
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iounmap(info->reg_addr - info->reg_offset);
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iounmap(info->reg_addr);
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info->reg_addr = NULL;
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}
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}
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@ -3108,12 +3106,6 @@ static struct slgt_info *alloc_dev(int adapter_num, int port_num, struct pci_dev
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info->irq_level = pdev->irq;
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info->phys_reg_addr = pci_resource_start(pdev,0);
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/* veremap works on page boundaries
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* map full page starting at the page boundary
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*/
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info->reg_offset = info->phys_reg_addr & (PAGE_SIZE-1);
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info->phys_reg_addr &= ~(PAGE_SIZE-1);
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info->bus_type = MGSL_BUS_TYPE_PCI;
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info->irq_flags = SA_SHIRQ;
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