[ARM] 3851/1: iop3xx: add io-data glantank support

Add support for the IO-Data GLAN Tank, from Martin Michlmayr.

Signed-off-by: Martin Michlmayr <tbm@cyrius.com>
Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Lennert Buytenhek 2006-09-21 02:46:03 +01:00 committed by Russell King
parent e60d07b6cd
commit 0c92e830bd
7 changed files with 220 additions and 1 deletions

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@ -126,6 +126,7 @@ CONFIG_ARCH_IOP32X=y
#
# IOP32x Platform Types
#
CONFIG_MACH_GLANTANK=y
CONFIG_ARCH_IQ80321=y
CONFIG_ARCH_IQ31244=y
CONFIG_MACH_N2100=y

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@ -4,6 +4,13 @@ menu "IOP32x Implementation Options"
comment "IOP32x Platform Types"
config MACH_GLANTANK
bool "Enable support for the IO-Data GLAN Tank"
help
Say Y here if you want to run your kernel on the GLAN Tank
NAS appliance or machines from IO-Data's HDL-Gxxx, HDL-GWxxx
and HDL-GZxxx series.
config ARCH_IQ80321
bool "Enable support for IQ80321"
help

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@ -7,6 +7,7 @@ obj-m :=
obj-n :=
obj- :=
obj-$(CONFIG_MACH_GLANTANK) += glantank.o
obj-$(CONFIG_ARCH_IQ80321) += iq80321.o
obj-$(CONFIG_ARCH_IQ31244) += iq31244.o
obj-$(CONFIG_MACH_N2100) += n2100.o

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@ -0,0 +1,195 @@
/*
* arch/arm/mach-iop32x/glantank.c
*
* Board support code for the GLAN Tank.
*
* Copyright (C) 2006 Martin Michlmayr <tbm@cyrius.com>
* Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
#include <linux/mm.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/pci.h>
#include <linux/string.h>
#include <linux/slab.h>
#include <linux/serial_core.h>
#include <linux/serial_8250.h>
#include <linux/mtd/physmap.h>
#include <linux/platform_device.h>
#include <asm/hardware.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/mach/pci.h>
#include <asm/mach/time.h>
#include <asm/mach-types.h>
#include <asm/page.h>
/*
* GLAN Tank timer tick configuration.
*/
static void __init glantank_timer_init(void)
{
/* 33.333 MHz crystal. */
iop3xx_init_time(200000000);
}
static struct sys_timer glantank_timer = {
.init = glantank_timer_init,
.offset = iop3xx_gettimeoffset,
};
/*
* GLAN Tank I/O.
*/
static struct map_desc glantank_io_desc[] __initdata = {
{ /* on-board devices */
.virtual = GLANTANK_UART,
.pfn = __phys_to_pfn(GLANTANK_UART),
.length = 0x00100000,
.type = MT_DEVICE
},
};
void __init glantank_map_io(void)
{
iop3xx_map_io();
iotable_init(glantank_io_desc, ARRAY_SIZE(glantank_io_desc));
}
/*
* GLAN Tank PCI.
*/
#define INTA IRQ_IOP32X_XINT0
#define INTB IRQ_IOP32X_XINT1
#define INTC IRQ_IOP32X_XINT2
#define INTD IRQ_IOP32X_XINT3
static inline int __init
glantank_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
{
static int pci_irq_table[][4] = {
/*
* PCI IDSEL/INTPIN->INTLINE
* A B C D
*/
{INTD, INTD, INTD, INTD}, /* UART (8250) */
{INTA, INTA, INTA, INTA}, /* Ethernet (E1000) */
{INTB, INTB, INTB, INTB}, /* IDE (AEC6280R) */
{INTC, INTC, INTC, INTC}, /* USB (NEC) */
};
BUG_ON(pin < 1 || pin > 4);
return pci_irq_table[slot % 4][pin - 1];
}
static struct hw_pci glantank_pci __initdata = {
.swizzle = pci_std_swizzle,
.nr_controllers = 1,
.setup = iop3xx_pci_setup,
.preinit = iop3xx_pci_preinit,
.scan = iop3xx_pci_scan_bus,
.map_irq = glantank_pci_map_irq,
};
static int __init glantank_pci_init(void)
{
if (machine_is_glantank())
pci_common_init(&glantank_pci);
return 0;
}
subsys_initcall(glantank_pci_init);
/*
* GLAN Tank machine initialization.
*/
static struct physmap_flash_data glantank_flash_data = {
.width = 1,
};
static struct resource glantank_flash_resource = {
.start = 0xf0000000,
.end = 0xf007ffff,
.flags = IORESOURCE_MEM,
};
static struct platform_device glantank_flash_device = {
.name = "physmap-flash",
.id = 0,
.dev = {
.platform_data = &glantank_flash_data,
},
.num_resources = 1,
.resource = &glantank_flash_resource,
};
static struct plat_serial8250_port glantank_serial_port[] = {
{
.mapbase = GLANTANK_UART,
.membase = (char *)GLANTANK_UART,
.irq = IRQ_IOP32X_XINT3,
.flags = UPF_SKIP_TEST,
.iotype = UPIO_MEM,
.regshift = 0,
.uartclk = 1843200,
},
{ },
};
static struct resource glantank_uart_resource = {
.start = GLANTANK_UART,
.end = GLANTANK_UART + 7,
.flags = IORESOURCE_MEM,
};
static struct platform_device glantank_serial_device = {
.name = "serial8250",
.id = PLAT8250_DEV_PLATFORM,
.dev = {
.platform_data = glantank_serial_port,
},
.num_resources = 1,
.resource = &glantank_uart_resource,
};
static void glantank_power_off(void)
{
__raw_writeb(0x01, 0xfe8d0004);
while (1)
;
}
static void __init glantank_init_machine(void)
{
platform_device_register(&iop3xx_i2c0_device);
platform_device_register(&iop3xx_i2c1_device);
platform_device_register(&glantank_flash_device);
platform_device_register(&glantank_serial_device);
pm_power_off = glantank_power_off;
}
MACHINE_START(GLANTANK, "GLAN Tank")
/* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */
.phys_io = GLANTANK_UART,
.io_pg_offst = ((GLANTANK_UART) >> 18) & 0xfffc,
.boot_params = 0xa0000100,
.map_io = glantank_map_io,
.init_irq = iop32x_init_irq,
.timer = &glantank_timer,
.init_machine = glantank_init_machine,
MACHINE_END

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@ -62,7 +62,8 @@ void __init iop32x_init_irq(void)
intctl_write(0);
intstr_write(0);
if (machine_is_iq80321() ||
if (machine_is_glantank() ||
machine_is_iq80321() ||
machine_is_iq31244() ||
machine_is_n2100())
*IOP3XX_PCIIRSR = 0x0f;

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@ -0,0 +1,13 @@
/*
* include/asm/arch-iop32x/glantank.h
*
* IO-Data GLAN Tank board registers
*/
#ifndef __GLANTANK_H
#define __GLANTANK_H
#define GLANTANK_UART 0xfe800000 /* UART */
#endif

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@ -35,6 +35,7 @@ void iop32x_init_irq(void);
/*
* Board specific bits
*/
#include "glantank.h"
#include "iq80321.h"
#include "iq31244.h"
#include "n2100.h"