Merge branch 'parisc-4.10-1' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux
Pull parisc updates from Helge Deller: - add Kernel address space layout randomization support - re-enable interrupts earlier now that we have a working IRQ stack - optimize the timer interrupt function to better cope with missed timer irqs - fix error return code in parisc perf code (by Dan Carpenter) - fix PAT debug code * 'parisc-4.10-1' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux: parisc: Optimize timer interrupt function parisc: perf: return -EFAULT on error parisc: Enhance CPU detection code on PAT machines parisc: Re-enable interrupts early parisc: Enable KASLR
This commit is contained in:
Linus Torvalds
commit
0c961c5511
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@ -7,6 +7,7 @@ config PARISC
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select HAVE_FUNCTION_GRAPH_TRACER
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select HAVE_SYSCALL_TRACEPOINTS
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select ARCH_WANT_FRAME_POINTERS
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select ARCH_HAS_ELF_RANDOMIZE
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select RTC_CLASS
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select RTC_DRV_GENERIC
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select INIT_ALL_POSSIBLE
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@ -348,9 +348,10 @@ struct pt_regs; /* forward declaration... */
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#define ELF_HWCAP 0
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#define STACK_RND_MASK (is_32bit_task() ? \
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0x7ff >> (PAGE_SHIFT - 12) : \
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0x3ffff >> (PAGE_SHIFT - 12))
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/* Masks for stack and mmap randomization */
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#define BRK_RND_MASK (is_32bit_task() ? 0x07ffUL : 0x3ffffUL)
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#define MMAP_RND_MASK (is_32bit_task() ? 0x1fffUL : 0x3ffffUL)
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#define STACK_RND_MASK MMAP_RND_MASK
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struct mm_struct;
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extern unsigned long arch_randomize_brk(struct mm_struct *);
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@ -289,7 +289,7 @@ extern int pdc_pat_cell_get_number(struct pdc_pat_cell_num *cell_info);
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extern int pdc_pat_cell_module(unsigned long *actcnt, unsigned long ploc, unsigned long mod, unsigned long view_type, void *mem_addr);
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extern int pdc_pat_cell_num_to_loc(void *, unsigned long);
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extern int pdc_pat_cpu_get_number(struct pdc_pat_cpu_num *cpu_info, void *hpa);
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extern int pdc_pat_cpu_get_number(struct pdc_pat_cpu_num *cpu_info, unsigned long hpa);
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extern int pdc_pat_pd_get_addr_map(unsigned long *actual_len, void *mem_addr, unsigned long count, unsigned long offset);
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@ -93,9 +93,7 @@ struct system_cpuinfo_parisc {
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/* Per CPU data structure - ie varies per CPU. */
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struct cpuinfo_parisc {
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unsigned long it_value; /* Interval Timer at last timer Intr */
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unsigned long it_delta; /* Interval delta (tic_10ms / HZ * 100) */
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unsigned long irq_count; /* number of IRQ's since boot */
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unsigned long irq_max_cr16; /* longest time to handle a single IRQ */
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unsigned long cpuid; /* aka slot_number or set to NO_PROC_ID */
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unsigned long hpa; /* Host Physical address */
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unsigned long txn_addr; /* MMIO addr of EIR or id_eid */
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@ -103,8 +101,6 @@ struct cpuinfo_parisc {
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unsigned long pending_ipi; /* bitmap of type ipi_message_type */
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#endif
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unsigned long bh_count; /* number of times bh was invoked */
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unsigned long prof_counter; /* per CPU profiling support */
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unsigned long prof_multiplier; /* per CPU profiling support */
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unsigned long fp_rev;
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unsigned long fp_model;
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unsigned int state;
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@ -878,6 +878,9 @@ ENTRY_CFI(syscall_exit_rfi)
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STREG %r19,PT_SR7(%r16)
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intr_return:
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/* NOTE: Need to enable interrupts incase we schedule. */
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ssm PSW_SM_I, %r0
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/* check for reschedule */
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mfctl %cr30,%r1
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LDREG TI_FLAGS(%r1),%r19 /* sched.h: TIF_NEED_RESCHED */
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@ -904,11 +907,6 @@ intr_check_sig:
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LDREG PT_IASQ1(%r16), %r20
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cmpib,COND(=),n 0,%r20,intr_restore /* backward */
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/* NOTE: We need to enable interrupts if we have to deliver
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* signals. We used to do this earlier but it caused kernel
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* stack overflows. */
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ssm PSW_SM_I, %r0
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copy %r0, %r25 /* long in_syscall = 0 */
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#ifdef CONFIG_64BIT
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ldo -16(%r30),%r29 /* Reference param save area */
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@ -960,10 +958,6 @@ intr_do_resched:
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cmpib,COND(=) 0, %r20, intr_do_preempt
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nop
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/* NOTE: We need to enable interrupts if we schedule. We used
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* to do this earlier but it caused kernel stack overflows. */
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ssm PSW_SM_I, %r0
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#ifdef CONFIG_64BIT
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ldo -16(%r30),%r29 /* Reference param save area */
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#endif
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@ -1258,7 +1258,7 @@ int pdc_pat_cell_module(unsigned long *actcnt, unsigned long ploc, unsigned long
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*
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* Retrieve the cpu number for the cpu at the specified HPA.
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*/
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int pdc_pat_cpu_get_number(struct pdc_pat_cpu_num *cpu_info, void *hpa)
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int pdc_pat_cpu_get_number(struct pdc_pat_cpu_num *cpu_info, unsigned long hpa)
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{
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int retval;
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unsigned long flags;
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@ -216,9 +216,9 @@ pat_query_module(ulong pcell_loc, ulong mod_index)
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register_parisc_device(dev); /* advertise device */
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#ifdef DEBUG_PAT
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pdc_pat_cell_mod_maddr_block_t io_pdc_cell;
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/* dump what we see so far... */
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switch (PAT_GET_ENTITY(dev->mod_info)) {
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pdc_pat_cell_mod_maddr_block_t io_pdc_cell;
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unsigned long i;
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case PAT_ENTITY_PROC:
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@ -259,9 +259,9 @@ pat_query_module(ulong pcell_loc, ulong mod_index)
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pa_pdc_cell->mod[4 + i * 3]); /* finish (ie end) */
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printk(KERN_DEBUG
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" IO_VIEW %ld: 0x%016lx 0x%016lx 0x%016lx\n",
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i, io_pdc_cell->mod[2 + i * 3], /* type */
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io_pdc_cell->mod[3 + i * 3], /* start */
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io_pdc_cell->mod[4 + i * 3]); /* finish (ie end) */
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i, io_pdc_cell.mod[2 + i * 3], /* type */
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io_pdc_cell.mod[3 + i * 3], /* start */
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io_pdc_cell.mod[4 + i * 3]); /* finish (ie end) */
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}
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printk(KERN_DEBUG "\n");
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break;
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@ -301,7 +301,6 @@ static ssize_t perf_read(struct file *file, char __user *buf, size_t cnt, loff_t
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static ssize_t perf_write(struct file *file, const char __user *buf, size_t count,
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loff_t *ppos)
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{
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int err;
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size_t image_size;
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uint32_t image_type;
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uint32_t interface_type;
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@ -320,8 +319,8 @@ static ssize_t perf_write(struct file *file, const char __user *buf, size_t coun
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if (count != sizeof(uint32_t))
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return -EIO;
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if ((err = copy_from_user(&image_type, buf, sizeof(uint32_t))) != 0)
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return err;
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if (copy_from_user(&image_type, buf, sizeof(uint32_t)))
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return -EFAULT;
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/* Get the interface type and test type */
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interface_type = (image_type >> 16) & 0xffff;
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@ -276,11 +276,7 @@ void *dereference_function_descriptor(void *ptr)
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static inline unsigned long brk_rnd(void)
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{
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/* 8MB for 32bit, 1GB for 64bit */
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if (is_32bit_task())
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return (get_random_int() & 0x7ffUL) << PAGE_SHIFT;
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else
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return (get_random_int() & 0x3ffffUL) << PAGE_SHIFT;
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return (get_random_int() & BRK_RND_MASK) << PAGE_SHIFT;
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}
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unsigned long arch_randomize_brk(struct mm_struct *mm)
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@ -78,11 +78,6 @@ DEFINE_PER_CPU(struct cpuinfo_parisc, cpu_data);
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static void
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init_percpu_prof(unsigned long cpunum)
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{
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struct cpuinfo_parisc *p;
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p = &per_cpu(cpu_data, cpunum);
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p->prof_counter = 1;
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p->prof_multiplier = 1;
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}
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@ -99,6 +94,7 @@ static int processor_probe(struct parisc_device *dev)
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unsigned long txn_addr;
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unsigned long cpuid;
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struct cpuinfo_parisc *p;
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struct pdc_pat_cpu_num cpu_info __maybe_unused;
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#ifdef CONFIG_SMP
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if (num_online_cpus() >= nr_cpu_ids) {
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@ -123,10 +119,6 @@ static int processor_probe(struct parisc_device *dev)
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ulong status;
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unsigned long bytecnt;
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pdc_pat_cell_mod_maddr_block_t *pa_pdc_cell;
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#undef USE_PAT_CPUID
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#ifdef USE_PAT_CPUID
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struct pdc_pat_cpu_num cpu_info;
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#endif
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pa_pdc_cell = kmalloc(sizeof (*pa_pdc_cell), GFP_KERNEL);
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if (!pa_pdc_cell)
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@ -145,22 +137,27 @@ static int processor_probe(struct parisc_device *dev)
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kfree(pa_pdc_cell);
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/* get the cpu number */
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status = pdc_pat_cpu_get_number(&cpu_info, dev->hpa.start);
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BUG_ON(PDC_OK != status);
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pr_info("Logical CPU #%lu is physical cpu #%lu at location "
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"0x%lx with hpa %pa\n",
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cpuid, cpu_info.cpu_num, cpu_info.cpu_loc,
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&dev->hpa.start);
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#undef USE_PAT_CPUID
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#ifdef USE_PAT_CPUID
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/* We need contiguous numbers for cpuid. Firmware's notion
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* of cpuid is for physical CPUs and we just don't care yet.
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* We'll care when we need to query PAT PDC about a CPU *after*
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* boot time (ie shutdown a CPU from an OS perspective).
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*/
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/* get the cpu number */
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status = pdc_pat_cpu_get_number(&cpu_info, dev->hpa.start);
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BUG_ON(PDC_OK != status);
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if (cpu_info.cpu_num >= NR_CPUS) {
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printk(KERN_WARNING "IGNORING CPU at 0x%x,"
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printk(KERN_WARNING "IGNORING CPU at %pa,"
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" cpu_slot_id > NR_CPUS"
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" (%ld > %d)\n",
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dev->hpa.start, cpu_info.cpu_num, NR_CPUS);
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&dev->hpa.start, cpu_info.cpu_num, NR_CPUS);
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/* Ignore CPU since it will only crash */
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boot_cpu_data.cpu_count--;
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return 1;
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@ -225,19 +225,17 @@ static unsigned long mmap_rnd(void)
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{
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unsigned long rnd = 0;
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/*
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* 8 bits of randomness in 32bit mmaps, 20 address space bits
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* 28 bits of randomness in 64bit mmaps, 40 address space bits
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*/
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if (current->flags & PF_RANDOMIZE) {
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if (is_32bit_task())
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rnd = get_random_int() % (1<<8);
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else
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rnd = get_random_int() % (1<<28);
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}
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if (current->flags & PF_RANDOMIZE)
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rnd = get_random_int() & MMAP_RND_MASK;
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return rnd << PAGE_SHIFT;
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}
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unsigned long arch_mmap_rnd(void)
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{
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return (get_random_int() & MMAP_RND_MASK) << PAGE_SHIFT;
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}
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static unsigned long mmap_legacy_base(void)
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{
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return TASK_UNMAPPED_BASE + mmap_rnd();
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@ -59,10 +59,9 @@ static unsigned long clocktick __read_mostly; /* timer cycles per tick */
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*/
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irqreturn_t __irq_entry timer_interrupt(int irq, void *dev_id)
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{
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unsigned long now, now2;
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unsigned long now;
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unsigned long next_tick;
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unsigned long cycles_elapsed, ticks_elapsed = 1;
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unsigned long cycles_remainder;
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unsigned long ticks_elapsed = 0;
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unsigned int cpu = smp_processor_id();
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struct cpuinfo_parisc *cpuinfo = &per_cpu(cpu_data, cpu);
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@ -71,102 +70,49 @@ irqreturn_t __irq_entry timer_interrupt(int irq, void *dev_id)
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profile_tick(CPU_PROFILING);
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/* Initialize next_tick to the expected tick time. */
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/* Initialize next_tick to the old expected tick time. */
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next_tick = cpuinfo->it_value;
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/* Get current cycle counter (Control Register 16). */
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/* Calculate how many ticks have elapsed. */
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do {
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++ticks_elapsed;
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next_tick += cpt;
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now = mfctl(16);
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} while (next_tick - now > cpt);
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cycles_elapsed = now - next_tick;
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if ((cycles_elapsed >> 6) < cpt) {
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/* use "cheap" math (add/subtract) instead
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* of the more expensive div/mul method
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*/
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cycles_remainder = cycles_elapsed;
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while (cycles_remainder > cpt) {
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cycles_remainder -= cpt;
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ticks_elapsed++;
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}
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} else {
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/* TODO: Reduce this to one fdiv op */
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cycles_remainder = cycles_elapsed % cpt;
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ticks_elapsed += cycles_elapsed / cpt;
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}
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/* convert from "division remainder" to "remainder of clock tick" */
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cycles_remainder = cpt - cycles_remainder;
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/* Determine when (in CR16 cycles) next IT interrupt will fire.
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* We want IT to fire modulo clocktick even if we miss/skip some.
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* But those interrupts don't in fact get delivered that regularly.
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*/
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next_tick = now + cycles_remainder;
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/* Store (in CR16 cycles) up to when we are accounting right now. */
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cpuinfo->it_value = next_tick;
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/* Program the IT when to deliver the next interrupt.
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* Only bottom 32-bits of next_tick are writable in CR16!
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*/
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mtctl(next_tick, 16);
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/* Go do system house keeping. */
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if (cpu == 0)
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xtime_update(ticks_elapsed);
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/* Skip one clocktick on purpose if we missed next_tick.
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update_process_times(user_mode(get_irq_regs()));
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/* Skip clockticks on purpose if we know we would miss those.
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* The new CR16 must be "later" than current CR16 otherwise
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* itimer would not fire until CR16 wrapped - e.g 4 seconds
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* later on a 1Ghz processor. We'll account for the missed
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* tick on the next timer interrupt.
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* ticks on the next timer interrupt.
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* We want IT to fire modulo clocktick even if we miss/skip some.
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* But those interrupts don't in fact get delivered that regularly.
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*
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* "next_tick - now" will always give the difference regardless
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* if one or the other wrapped. If "now" is "bigger" we'll end up
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* with a very large unsigned number.
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*/
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now2 = mfctl(16);
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if (next_tick - now2 > cpt)
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mtctl(next_tick+cpt, 16);
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while (next_tick - mfctl(16) > cpt)
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next_tick += cpt;
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#if 1
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/*
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* GGG: DEBUG code for how many cycles programming CR16 used.
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/* Program the IT when to deliver the next interrupt.
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* Only bottom 32-bits of next_tick are writable in CR16!
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* Timer interrupt will be delivered at least a few hundred cycles
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* after the IT fires, so if we are too close (<= 500 cycles) to the
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* next cycle, simply skip it.
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*/
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if (unlikely(now2 - now > 0x3000)) /* 12K cycles */
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printk (KERN_CRIT "timer_interrupt(CPU %d): SLOW! 0x%lx cycles!"
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" cyc %lX rem %lX "
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" next/now %lX/%lX\n",
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cpu, now2 - now, cycles_elapsed, cycles_remainder,
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next_tick, now );
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#endif
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/* Can we differentiate between "early CR16" (aka Scenario 1) and
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* "long delay" (aka Scenario 3)? I don't think so.
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*
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* Timer_interrupt will be delivered at least a few hundred cycles
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* after the IT fires. But it's arbitrary how much time passes
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* before we call it "late". I've picked one second.
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*
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* It's important NO printk's are between reading CR16 and
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* setting up the next value. May introduce huge variance.
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*/
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if (unlikely(ticks_elapsed > HZ)) {
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/* Scenario 3: very long delay? bad in any case */
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printk (KERN_CRIT "timer_interrupt(CPU %d): delayed!"
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" cycles %lX rem %lX "
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" next/now %lX/%lX\n",
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cpu,
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cycles_elapsed, cycles_remainder,
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next_tick, now );
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}
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/* Done mucking with unreliable delivery of interrupts.
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* Go do system house keeping.
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*/
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if (!--cpuinfo->prof_counter) {
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cpuinfo->prof_counter = cpuinfo->prof_multiplier;
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update_process_times(user_mode(get_irq_regs()));
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}
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if (cpu == 0)
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xtime_update(ticks_elapsed);
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if (next_tick - mfctl(16) <= 500)
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next_tick += cpt;
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mtctl(next_tick, 16);
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return IRQ_HANDLED;
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}
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