diff --git a/arch/mips/include/asm/mips-boards/generic.h b/arch/mips/include/asm/mips-boards/generic.h index 48616816bcbc..b969491aa98d 100644 --- a/arch/mips/include/asm/mips-boards/generic.h +++ b/arch/mips/include/asm/mips-boards/generic.h @@ -67,9 +67,7 @@ extern int mips_revision_sconid; -#ifdef CONFIG_OF -extern struct boot_param_header __dtb_start; -#endif +extern char __dtb_start[]; #ifdef CONFIG_PCI extern void mips_pcibios_init(void); diff --git a/arch/mips/include/asm/prom.h b/arch/mips/include/asm/prom.h index ccd2b75f152c..a9494c0141fb 100644 --- a/arch/mips/include/asm/prom.h +++ b/arch/mips/include/asm/prom.h @@ -21,13 +21,13 @@ extern void device_tree_init(void); struct boot_param_header; -extern void __dt_setup_arch(struct boot_param_header *bph); +extern void __dt_setup_arch(void *bph); #define dt_setup_arch(sym) \ ({ \ - extern struct boot_param_header __dtb_##sym##_begin; \ + extern char __dtb_##sym##_begin[]; \ \ - __dt_setup_arch(&__dtb_##sym##_begin); \ + __dt_setup_arch(__dtb_##sym##_begin); \ }) #else /* CONFIG_OF */ diff --git a/arch/mips/kernel/prom.c b/arch/mips/kernel/prom.c index 3c3b0df8f48d..5d39bb85bf35 100644 --- a/arch/mips/kernel/prom.c +++ b/arch/mips/kernel/prom.c @@ -47,7 +47,7 @@ void * __init early_init_dt_alloc_memory_arch(u64 size, u64 align) return __alloc_bootmem(size, align, __pa(MAX_DMA_ADDRESS)); } -void __init __dt_setup_arch(struct boot_param_header *bph) +void __init __dt_setup_arch(void *bph) { if (!early_init_dt_scan(bph)) return; diff --git a/arch/mips/lantiq/prom.c b/arch/mips/lantiq/prom.c index cdea687ad490..7447d322d14e 100644 --- a/arch/mips/lantiq/prom.c +++ b/arch/mips/lantiq/prom.c @@ -71,7 +71,7 @@ void __init plat_mem_setup(void) * Load the builtin devicetree. This causes the chosen node to be * parsed resulting in our memory appearing */ - __dt_setup_arch(&__dtb_start); + __dt_setup_arch(__dtb_start); } void __init device_tree_init(void) diff --git a/arch/mips/lantiq/prom.h b/arch/mips/lantiq/prom.h index 8e07b5f28ef1..69a4c582338d 100644 --- a/arch/mips/lantiq/prom.h +++ b/arch/mips/lantiq/prom.h @@ -26,6 +26,6 @@ struct ltq_soc_info { extern void ltq_soc_detect(struct ltq_soc_info *i); extern void ltq_soc_init(void); -extern struct boot_param_header __dtb_start; +extern char __dtb_start[]; #endif diff --git a/arch/mips/mti-sead3/sead3-setup.c b/arch/mips/mti-sead3/sead3-setup.c index bf7fe48bf2f9..e43f4801a245 100644 --- a/arch/mips/mti-sead3/sead3-setup.c +++ b/arch/mips/mti-sead3/sead3-setup.c @@ -69,17 +69,17 @@ static void __init parse_memsize_param(void) if (!memsize) return; - offset = fdt_path_offset(&__dtb_start, "/memory"); + offset = fdt_path_offset(__dtb_start, "/memory"); if (offset > 0) { uint64_t new_value; /* * reg contains 2 32-bits BE values, offset and size. We just * want to replace the size value without affecting the offset */ - prop_value = fdt_getprop(&__dtb_start, offset, "reg", &prop_len); + prop_value = fdt_getprop(__dtb_start, offset, "reg", &prop_len); new_value = be64_to_cpu(*prop_value); new_value = (new_value & ~0xffffffffllu) | memsize; - fdt_setprop_inplace_u64(&__dtb_start, offset, "reg", new_value); + fdt_setprop_inplace_u64(__dtb_start, offset, "reg", new_value); } } @@ -92,7 +92,7 @@ void __init plat_mem_setup(void) * Load the builtin devicetree. This causes the chosen node to be * parsed resulting in our memory appearing */ - __dt_setup_arch(&__dtb_start); + __dt_setup_arch(__dtb_start); } void __init device_tree_init(void) diff --git a/arch/mips/ralink/of.c b/arch/mips/ralink/of.c index 0170d829d073..91d7060d5aea 100644 --- a/arch/mips/ralink/of.c +++ b/arch/mips/ralink/of.c @@ -28,7 +28,7 @@ __iomem void *rt_sysc_membase; __iomem void *rt_memc_membase; -extern struct boot_param_header __dtb_start; +extern char __dtb_start[]; __iomem void *plat_of_remap_node(const char *node) { @@ -63,7 +63,7 @@ void __init plat_mem_setup(void) * Load the builtin devicetree. This causes the chosen node to be * parsed resulting in our memory appearing */ - __dt_setup_arch(&__dtb_start); + __dt_setup_arch(__dtb_start); if (soc_info.mem_size) add_memory_region(soc_info.mem_base, soc_info.mem_size * SZ_1M,