diff --git a/drivers/net/sky2.c b/drivers/net/sky2.c
index c7c0a5b7b53a..ba5180a23264 100644
--- a/drivers/net/sky2.c
+++ b/drivers/net/sky2.c
@@ -256,6 +256,9 @@ static void sky2_power_on(struct sky2_hw *hw)
 
 		sky2_read32(hw, B2_GP_IO);
 	}
+
+	/* Turn on "driver loaded" LED */
+	sky2_write16(hw, B0_CTST, Y2_LED_STAT_ON);
 }
 
 static void sky2_power_aux(struct sky2_hw *hw)
@@ -274,6 +277,9 @@ static void sky2_power_aux(struct sky2_hw *hw)
 		sky2_write8(hw, B0_POWER_CTRL,
 			    (PC_VAUX_ENA | PC_VCC_ENA |
 			     PC_VAUX_ON | PC_VCC_OFF));
+
+	/* turn off "driver loaded LED" */
+	sky2_write16(hw, B0_CTST, Y2_LED_STAT_OFF);
 }
 
 static void sky2_gmac_reset(struct sky2_hw *hw, unsigned port)
@@ -1867,9 +1873,6 @@ static int sky2_down(struct net_device *dev)
 	sky2_phy_power_down(hw, port);
 	spin_unlock_bh(&sky2->phy_lock);
 
-	/* turn off LED's */
-	sky2_write16(hw, B0_Y2LED, LED_STAT_OFF);
-
 	sky2_tx_reset(hw, port);
 
 	/* Free any pending frames stuck in HW queue */
@@ -2983,8 +2986,6 @@ static void sky2_reset(struct sky2_hw *hw)
 	sky2_write8(hw, B2_TI_CTRL, TIM_STOP);
 	sky2_write8(hw, B2_TI_CTRL, TIM_CLR_IRQ);
 
-	sky2_write8(hw, B0_Y2LED, LED_STAT_ON);
-
 	/* Turn off descriptor polling */
 	sky2_write32(hw, B28_DPT_CTRL, DPT_STOP);
 
@@ -4601,7 +4602,6 @@ static void __devexit sky2_remove(struct pci_dev *pdev)
 
 	sky2_power_aux(hw);
 
-	sky2_write16(hw, B0_Y2LED, LED_STAT_OFF);
 	sky2_write8(hw, B0_CTST, CS_RST_SET);
 	sky2_read8(hw, B0_CTST);
 
diff --git a/drivers/net/sky2.h b/drivers/net/sky2.h
index 73c954712467..34042ff7c121 100644
--- a/drivers/net/sky2.h
+++ b/drivers/net/sky2.h
@@ -155,7 +155,7 @@ enum pci_cfg_reg1 {
 enum csr_regs {
 	B0_RAP		= 0x0000,
 	B0_CTST		= 0x0004,
-	B0_Y2LED	= 0x0005,
+
 	B0_POWER_CTRL	= 0x0007,
 	B0_ISRC		= 0x0008,
 	B0_IMSK		= 0x000c,
@@ -283,13 +283,6 @@ enum {
 	CS_RST_SET	= 1,	/* Set   Software reset	*/
 };
 
-/*	B0_LED			 8 Bit	LED register */
-enum {
-/* Bit  7.. 2:	reserved */
-	LED_STAT_ON	= 1<<1,	/* Status LED on	*/
-	LED_STAT_OFF	= 1,	/* Status LED off	*/
-};
-
 /*	B0_POWER_CTRL	 8 Bit	Power Control reg (YUKON only) */
 enum {
 	PC_VAUX_ENA	= 1<<7,	/* Switch VAUX Enable  */