cxgb4vf: Update to 128 byte mailbox size for T6 adapter
Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -54,6 +54,7 @@
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#define T4VF_MPS_BASE_ADDR 0x0100
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#define T4VF_PL_BASE_ADDR 0x0200
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#define T4VF_MBDATA_BASE_ADDR 0x0240
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#define T6VF_MBDATA_BASE_ADDR 0x0280
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#define T4VF_CIM_BASE_ADDR 0x0300
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#define T4VF_REGMAP_START 0x0000
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@ -120,12 +120,19 @@ int t4vf_wr_mbox_core(struct adapter *adapter, const void *cmd, int size,
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1, 1, 3, 5, 10, 10, 20, 50, 100
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};
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u32 v;
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u32 v, mbox_data;
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int i, ms, delay_idx;
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const __be64 *p;
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u32 mbox_data = T4VF_MBDATA_BASE_ADDR;
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u32 mbox_ctl = T4VF_CIM_BASE_ADDR + CIM_VF_EXT_MAILBOX_CTRL;
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/* In T6, mailbox size is changed to 128 bytes to avoid
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* invalidating the entire prefetch buffer.
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*/
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if (CHELSIO_CHIP_VERSION(adapter->params.chip) <= CHELSIO_T5)
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mbox_data = T4VF_MBDATA_BASE_ADDR;
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else
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mbox_data = T6VF_MBDATA_BASE_ADDR;
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/*
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* Commands must be multiples of 16 bytes in length and may not be
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* larger than the size of the Mailbox Data register array.
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