Pin control fixes for v4.19:
- Two fixes for the Intel pin controllers than cause problems on laptops. -----BEGIN PGP SIGNATURE----- iQIcBAABAgAGBQJbpSNBAAoJEEEQszewGV1zhIEQAJmn3wGuCSnycJghe0oCNtGz fk2YcWmg1TmzaXsq1zhtL7Nx3wKHrNrvVOw091Wm1nP+XO9REglu+03mXIxpmb8i wGSBDApsux+5Pit+SxKKbryDHlOeXmhMA3dBPQTdM7phaiLSkH36BucKYNjAesqu qYa2AXrxy4akb8ot6lLZQNWaBNWRsFZ07X6y9Rf9H4cBEaFf2XSzf4EmbCdMNjtN agJQURc8pTaJ7Z4ovtx0fs9E4jzvI+4Ln+sT6JlxCv/NL36pI71YaiRSaBI9LphV jL1nW5cjE6gMdSNZ0LVuR4bD5M+P7mAFx98rVQ/MlSADfn2uxpOLW8CiJHkXCCuI WG6lRmatJgWfw2be/01GGr9UA9J25QdLragMtz+lIp0SUrI+PTcnir2TksmuEJ0/ xZWHMaTDeFsnmBVhEe22jimnJsTf8tbupDYIp3eYq6TSAxZbFY5YlhxksE8UGJ0t kgjrapBpQul6hC5KXbYXCOPqbibp6auyu/wThAS3KKU0XrfZOpkPjLvp9gW1306Q C+wlg7BViQNQzYt9B4/G6jcXB3TDV/AbCQYaMYSRFJ01OW0LA/49HHLt1bfM6h4E Ve/wwu5FHLoaR1uSK6n68wcONjcU7O2J5lVNxwzJ4KP147piB01NwzxRQqgyGtun yYHKoEx/hM8eEw2BNYW/ =NdkN -----END PGP SIGNATURE----- Merge tag 'pinctrl-v4.19-3' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Linus writes: "Pin control fixes for v4.19: - Two fixes for the Intel pin controllers than cause problems on laptops." * tag 'pinctrl-v4.19-3' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: pinctrl: intel: Do pin translation in other GPIO operations as well pinctrl: cannonlake: Fix gpio base for GPP-E
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commit
10dc890d42
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@ -379,7 +379,7 @@ static const struct intel_padgroup cnlh_community1_gpps[] = {
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static const struct intel_padgroup cnlh_community3_gpps[] = {
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CNL_GPP(0, 155, 178, 192), /* GPP_K */
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CNL_GPP(1, 179, 202, 224), /* GPP_H */
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CNL_GPP(2, 203, 215, 258), /* GPP_E */
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CNL_GPP(2, 203, 215, 256), /* GPP_E */
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CNL_GPP(3, 216, 239, 288), /* GPP_F */
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CNL_GPP(4, 240, 248, CNL_NO_GPIO), /* SPI */
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};
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@ -747,86 +747,6 @@ static const struct pinctrl_desc intel_pinctrl_desc = {
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.owner = THIS_MODULE,
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};
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static int intel_gpio_get(struct gpio_chip *chip, unsigned offset)
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{
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struct intel_pinctrl *pctrl = gpiochip_get_data(chip);
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void __iomem *reg;
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u32 padcfg0;
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reg = intel_get_padcfg(pctrl, offset, PADCFG0);
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if (!reg)
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return -EINVAL;
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padcfg0 = readl(reg);
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if (!(padcfg0 & PADCFG0_GPIOTXDIS))
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return !!(padcfg0 & PADCFG0_GPIOTXSTATE);
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return !!(padcfg0 & PADCFG0_GPIORXSTATE);
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}
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static void intel_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
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{
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struct intel_pinctrl *pctrl = gpiochip_get_data(chip);
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unsigned long flags;
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void __iomem *reg;
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u32 padcfg0;
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reg = intel_get_padcfg(pctrl, offset, PADCFG0);
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if (!reg)
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return;
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raw_spin_lock_irqsave(&pctrl->lock, flags);
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padcfg0 = readl(reg);
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if (value)
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padcfg0 |= PADCFG0_GPIOTXSTATE;
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else
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padcfg0 &= ~PADCFG0_GPIOTXSTATE;
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writel(padcfg0, reg);
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raw_spin_unlock_irqrestore(&pctrl->lock, flags);
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}
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static int intel_gpio_get_direction(struct gpio_chip *chip, unsigned int offset)
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{
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struct intel_pinctrl *pctrl = gpiochip_get_data(chip);
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void __iomem *reg;
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u32 padcfg0;
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reg = intel_get_padcfg(pctrl, offset, PADCFG0);
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if (!reg)
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return -EINVAL;
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padcfg0 = readl(reg);
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if (padcfg0 & PADCFG0_PMODE_MASK)
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return -EINVAL;
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return !!(padcfg0 & PADCFG0_GPIOTXDIS);
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}
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static int intel_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
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{
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return pinctrl_gpio_direction_input(chip->base + offset);
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}
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static int intel_gpio_direction_output(struct gpio_chip *chip, unsigned offset,
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int value)
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{
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intel_gpio_set(chip, offset, value);
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return pinctrl_gpio_direction_output(chip->base + offset);
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}
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static const struct gpio_chip intel_gpio_chip = {
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.owner = THIS_MODULE,
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.request = gpiochip_generic_request,
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.free = gpiochip_generic_free,
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.get_direction = intel_gpio_get_direction,
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.direction_input = intel_gpio_direction_input,
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.direction_output = intel_gpio_direction_output,
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.get = intel_gpio_get,
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.set = intel_gpio_set,
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.set_config = gpiochip_generic_config,
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};
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/**
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* intel_gpio_to_pin() - Translate from GPIO offset to pin number
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* @pctrl: Pinctrl structure
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@ -872,6 +792,101 @@ static int intel_gpio_to_pin(struct intel_pinctrl *pctrl, unsigned offset,
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return -EINVAL;
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}
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static int intel_gpio_get(struct gpio_chip *chip, unsigned offset)
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{
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struct intel_pinctrl *pctrl = gpiochip_get_data(chip);
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void __iomem *reg;
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u32 padcfg0;
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int pin;
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pin = intel_gpio_to_pin(pctrl, offset, NULL, NULL);
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if (pin < 0)
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return -EINVAL;
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reg = intel_get_padcfg(pctrl, pin, PADCFG0);
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if (!reg)
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return -EINVAL;
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padcfg0 = readl(reg);
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if (!(padcfg0 & PADCFG0_GPIOTXDIS))
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return !!(padcfg0 & PADCFG0_GPIOTXSTATE);
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return !!(padcfg0 & PADCFG0_GPIORXSTATE);
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}
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static void intel_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
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{
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struct intel_pinctrl *pctrl = gpiochip_get_data(chip);
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unsigned long flags;
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void __iomem *reg;
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u32 padcfg0;
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int pin;
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pin = intel_gpio_to_pin(pctrl, offset, NULL, NULL);
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if (pin < 0)
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return;
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reg = intel_get_padcfg(pctrl, pin, PADCFG0);
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if (!reg)
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return;
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raw_spin_lock_irqsave(&pctrl->lock, flags);
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padcfg0 = readl(reg);
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if (value)
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padcfg0 |= PADCFG0_GPIOTXSTATE;
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else
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padcfg0 &= ~PADCFG0_GPIOTXSTATE;
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writel(padcfg0, reg);
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raw_spin_unlock_irqrestore(&pctrl->lock, flags);
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}
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static int intel_gpio_get_direction(struct gpio_chip *chip, unsigned int offset)
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{
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struct intel_pinctrl *pctrl = gpiochip_get_data(chip);
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void __iomem *reg;
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u32 padcfg0;
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int pin;
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pin = intel_gpio_to_pin(pctrl, offset, NULL, NULL);
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if (pin < 0)
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return -EINVAL;
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reg = intel_get_padcfg(pctrl, pin, PADCFG0);
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if (!reg)
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return -EINVAL;
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padcfg0 = readl(reg);
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if (padcfg0 & PADCFG0_PMODE_MASK)
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return -EINVAL;
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return !!(padcfg0 & PADCFG0_GPIOTXDIS);
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}
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static int intel_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
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{
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return pinctrl_gpio_direction_input(chip->base + offset);
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}
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static int intel_gpio_direction_output(struct gpio_chip *chip, unsigned offset,
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int value)
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{
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intel_gpio_set(chip, offset, value);
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return pinctrl_gpio_direction_output(chip->base + offset);
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}
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static const struct gpio_chip intel_gpio_chip = {
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.owner = THIS_MODULE,
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.request = gpiochip_generic_request,
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.free = gpiochip_generic_free,
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.get_direction = intel_gpio_get_direction,
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.direction_input = intel_gpio_direction_input,
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.direction_output = intel_gpio_direction_output,
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.get = intel_gpio_get,
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.set = intel_gpio_set,
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.set_config = gpiochip_generic_config,
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};
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static int intel_gpio_irq_reqres(struct irq_data *d)
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{
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struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
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