KVM: Unify the delivery of IOAPIC and MSI interrupts
Signed-off-by: Sheng Yang <sheng@linux.intel.com> Signed-off-by: Avi Kivity <avi@redhat.com>
This commit is contained in:
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cf9e4e15e8
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116191b69b
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@ -352,6 +352,9 @@ void kvm_unregister_irq_mask_notifier(struct kvm *kvm, int irq,
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struct kvm_irq_mask_notifier *kimn);
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struct kvm_irq_mask_notifier *kimn);
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void kvm_fire_mask_notifiers(struct kvm *kvm, int irq, bool mask);
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void kvm_fire_mask_notifiers(struct kvm *kvm, int irq, bool mask);
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void kvm_get_intr_delivery_bitmask(struct kvm_ioapic *ioapic,
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union kvm_ioapic_redirect_entry *entry,
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unsigned long *deliver_bitmask);
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int kvm_set_irq(struct kvm *kvm, int irq_source_id, int irq, int level);
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int kvm_set_irq(struct kvm *kvm, int irq_source_id, int irq, int level);
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void kvm_notify_acked_irq(struct kvm *kvm, unsigned irqchip, unsigned pin);
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void kvm_notify_acked_irq(struct kvm *kvm, unsigned irqchip, unsigned pin);
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void kvm_register_irq_ack_notifier(struct kvm *kvm,
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void kvm_register_irq_ack_notifier(struct kvm *kvm,
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@ -203,79 +203,56 @@ u32 kvm_ioapic_get_delivery_bitmask(struct kvm_ioapic *ioapic, u8 dest,
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static int ioapic_deliver(struct kvm_ioapic *ioapic, int irq)
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static int ioapic_deliver(struct kvm_ioapic *ioapic, int irq)
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{
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{
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u8 dest = ioapic->redirtbl[irq].fields.dest_id;
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union kvm_ioapic_redirect_entry entry = ioapic->redirtbl[irq];
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u8 dest_mode = ioapic->redirtbl[irq].fields.dest_mode;
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unsigned long deliver_bitmask;
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u8 delivery_mode = ioapic->redirtbl[irq].fields.delivery_mode;
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u8 vector = ioapic->redirtbl[irq].fields.vector;
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u8 trig_mode = ioapic->redirtbl[irq].fields.trig_mode;
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u32 deliver_bitmask;
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struct kvm_vcpu *vcpu;
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struct kvm_vcpu *vcpu;
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int vcpu_id, r = -1;
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int vcpu_id, r = -1;
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ioapic_debug("dest=%x dest_mode=%x delivery_mode=%x "
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ioapic_debug("dest=%x dest_mode=%x delivery_mode=%x "
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"vector=%x trig_mode=%x\n",
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"vector=%x trig_mode=%x\n",
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dest, dest_mode, delivery_mode, vector, trig_mode);
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entry.fields.dest, entry.fields.dest_mode,
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entry.fields.delivery_mode, entry.fields.vector,
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entry.fields.trig_mode);
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deliver_bitmask = kvm_ioapic_get_delivery_bitmask(ioapic, dest,
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kvm_get_intr_delivery_bitmask(ioapic, &entry, &deliver_bitmask);
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dest_mode);
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if (!deliver_bitmask) {
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if (!deliver_bitmask) {
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ioapic_debug("no target on destination\n");
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ioapic_debug("no target on destination\n");
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return 0;
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return 0;
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}
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}
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switch (delivery_mode) {
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/* Always delivery PIT interrupt to vcpu 0 */
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case IOAPIC_LOWEST_PRIORITY:
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vcpu = kvm_get_lowest_prio_vcpu(ioapic->kvm, vector,
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deliver_bitmask);
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#ifdef CONFIG_X86
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if (irq == 0)
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vcpu = ioapic->kvm->vcpus[0];
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#endif
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if (vcpu != NULL)
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r = ioapic_inj_irq(ioapic, vcpu, vector,
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trig_mode, delivery_mode);
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else
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ioapic_debug("null lowest prio vcpu: "
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"mask=%x vector=%x delivery_mode=%x\n",
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deliver_bitmask, vector, IOAPIC_LOWEST_PRIORITY);
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break;
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case IOAPIC_FIXED:
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#ifdef CONFIG_X86
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#ifdef CONFIG_X86
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if (irq == 0)
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if (irq == 0)
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deliver_bitmask = 1;
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deliver_bitmask = 1;
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#endif
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#endif
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for (vcpu_id = 0; deliver_bitmask != 0; vcpu_id++) {
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for (vcpu_id = 0; deliver_bitmask != 0; vcpu_id++) {
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if (!(deliver_bitmask & (1 << vcpu_id)))
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if (!(deliver_bitmask & (1 << vcpu_id)))
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continue;
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continue;
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deliver_bitmask &= ~(1 << vcpu_id);
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deliver_bitmask &= ~(1 << vcpu_id);
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vcpu = ioapic->kvm->vcpus[vcpu_id];
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vcpu = ioapic->kvm->vcpus[vcpu_id];
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if (vcpu) {
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if (vcpu) {
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if (entry.fields.delivery_mode ==
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IOAPIC_LOWEST_PRIORITY ||
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entry.fields.delivery_mode == IOAPIC_FIXED) {
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if (r < 0)
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if (r < 0)
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r = 0;
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r = 0;
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r += ioapic_inj_irq(ioapic, vcpu, vector,
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r += ioapic_inj_irq(ioapic, vcpu,
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trig_mode, delivery_mode);
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entry.fields.vector,
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}
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entry.fields.trig_mode,
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}
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entry.fields.delivery_mode);
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break;
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} else if (entry.fields.delivery_mode == IOAPIC_NMI) {
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case IOAPIC_NMI:
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for (vcpu_id = 0; deliver_bitmask != 0; vcpu_id++) {
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if (!(deliver_bitmask & (1 << vcpu_id)))
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continue;
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deliver_bitmask &= ~(1 << vcpu_id);
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vcpu = ioapic->kvm->vcpus[vcpu_id];
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if (vcpu) {
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ioapic_inj_nmi(vcpu);
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r = 1;
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r = 1;
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}
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ioapic_inj_nmi(vcpu);
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else
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} else
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ioapic_debug("NMI to vcpu %d failed\n",
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ioapic_debug("unsupported delivery mode %x!\n",
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vcpu->vcpu_id);
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entry.fields.delivery_mode);
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}
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} else
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break;
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ioapic_debug("null destination vcpu: "
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default:
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"mask=%x vector=%x delivery_mode=%x\n",
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printk(KERN_WARNING "Unsupported delivery mode %d\n",
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entry.fields.deliver_bitmask,
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delivery_mode);
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entry.fields.vector,
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break;
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entry.fields.delivery_mode);
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}
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}
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return r;
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return r;
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}
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}
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@ -43,39 +43,63 @@ static int kvm_set_ioapic_irq(struct kvm_kernel_irq_routing_entry *e,
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return kvm_ioapic_set_irq(kvm->arch.vioapic, e->irqchip.pin, level);
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return kvm_ioapic_set_irq(kvm->arch.vioapic, e->irqchip.pin, level);
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}
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}
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void kvm_get_intr_delivery_bitmask(struct kvm_ioapic *ioapic,
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union kvm_ioapic_redirect_entry *entry,
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unsigned long *deliver_bitmask)
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{
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struct kvm_vcpu *vcpu;
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*deliver_bitmask = kvm_ioapic_get_delivery_bitmask(ioapic,
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entry->fields.dest_id, entry->fields.dest_mode);
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switch (entry->fields.delivery_mode) {
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case IOAPIC_LOWEST_PRIORITY:
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vcpu = kvm_get_lowest_prio_vcpu(ioapic->kvm,
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entry->fields.vector, *deliver_bitmask);
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*deliver_bitmask = 1 << vcpu->vcpu_id;
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break;
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case IOAPIC_FIXED:
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case IOAPIC_NMI:
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break;
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default:
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if (printk_ratelimit())
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printk(KERN_INFO "kvm: unsupported delivery mode %d\n",
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entry->fields.delivery_mode);
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*deliver_bitmask = 0;
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}
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}
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static int kvm_set_msi(struct kvm_kernel_irq_routing_entry *e,
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static int kvm_set_msi(struct kvm_kernel_irq_routing_entry *e,
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struct kvm *kvm, int level)
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struct kvm *kvm, int level)
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{
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{
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int vcpu_id, r = -1;
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int vcpu_id, r = -1;
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struct kvm_vcpu *vcpu;
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struct kvm_vcpu *vcpu;
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struct kvm_ioapic *ioapic = ioapic_irqchip(kvm);
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struct kvm_ioapic *ioapic = ioapic_irqchip(kvm);
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int dest_id = (e->msi.address_lo & MSI_ADDR_DEST_ID_MASK)
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union kvm_ioapic_redirect_entry entry;
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>> MSI_ADDR_DEST_ID_SHIFT;
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unsigned long deliver_bitmask;
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int vector = (e->msi.data & MSI_DATA_VECTOR_MASK)
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>> MSI_DATA_VECTOR_SHIFT;
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int dest_mode = test_bit(MSI_ADDR_DEST_MODE_SHIFT,
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(unsigned long *)&e->msi.address_lo);
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int trig_mode = test_bit(MSI_DATA_TRIGGER_SHIFT,
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(unsigned long *)&e->msi.data);
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int delivery_mode = test_bit(MSI_DATA_DELIVERY_MODE_SHIFT,
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(unsigned long *)&e->msi.data);
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u32 deliver_bitmask;
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BUG_ON(!ioapic);
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BUG_ON(!ioapic);
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deliver_bitmask = kvm_ioapic_get_delivery_bitmask(ioapic,
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entry.bits = 0;
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dest_id, dest_mode);
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entry.fields.dest_id = (e->msi.address_lo &
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/* IOAPIC delivery mode value is the same as MSI here */
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MSI_ADDR_DEST_ID_MASK) >> MSI_ADDR_DEST_ID_SHIFT;
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switch (delivery_mode) {
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entry.fields.vector = (e->msi.data &
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case IOAPIC_LOWEST_PRIORITY:
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MSI_DATA_VECTOR_MASK) >> MSI_DATA_VECTOR_SHIFT;
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vcpu = kvm_get_lowest_prio_vcpu(ioapic->kvm, vector,
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entry.fields.dest_mode = test_bit(MSI_ADDR_DEST_MODE_SHIFT,
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deliver_bitmask);
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(unsigned long *)&e->msi.address_lo);
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if (vcpu != NULL)
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entry.fields.trig_mode = test_bit(MSI_DATA_TRIGGER_SHIFT,
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r = kvm_apic_set_irq(vcpu, vector, trig_mode);
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(unsigned long *)&e->msi.data);
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else
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entry.fields.delivery_mode = test_bit(
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printk(KERN_INFO "kvm: null lowest priority vcpu!\n");
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MSI_DATA_DELIVERY_MODE_SHIFT,
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break;
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(unsigned long *)&e->msi.data);
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case IOAPIC_FIXED:
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/* TODO Deal with RH bit of MSI message address */
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kvm_get_intr_delivery_bitmask(ioapic, &entry, &deliver_bitmask);
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if (!deliver_bitmask) {
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printk(KERN_WARNING "kvm: no destination for MSI delivery!");
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return -1;
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}
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for (vcpu_id = 0; deliver_bitmask != 0; vcpu_id++) {
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for (vcpu_id = 0; deliver_bitmask != 0; vcpu_id++) {
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if (!(deliver_bitmask & (1 << vcpu_id)))
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if (!(deliver_bitmask & (1 << vcpu_id)))
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continue;
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continue;
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@ -84,13 +108,10 @@ static int kvm_set_msi(struct kvm_kernel_irq_routing_entry *e,
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if (vcpu) {
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if (vcpu) {
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if (r < 0)
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if (r < 0)
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r = 0;
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r = 0;
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r += kvm_apic_set_irq(vcpu, vector, trig_mode);
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r += kvm_apic_set_irq(vcpu, entry.fields.vector,
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entry.fields.trig_mode);
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}
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}
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}
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}
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break;
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default:
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break;
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}
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return r;
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return r;
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}
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}
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