ARM: OMAP4+: Remove static iotable mappings for SRAM
In order to handle errata I688, a page of sram was reserved by doing a static iotable map. Now that we use gen_pool to manage sram, we can completely remove all of these static mappings and use gen_pool_alloc() to get the one page of sram space needed to implement errata I688. omap_bus_sync will be NOP until SRAM initialization happens. Suggested-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Dave Gerlach <d-gerlach@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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@ -10,6 +10,9 @@ Required properties:
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Should be "ti,omap5-mpu" for OMAP5
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Should be "ti,omap5-mpu" for OMAP5
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- ti,hwmods: "mpu"
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- ti,hwmods: "mpu"
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Optional properties:
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- sram: Phandle to the ocmcram node
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Examples:
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Examples:
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- For an OMAP5 SMP system:
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- For an OMAP5 SMP system:
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@ -81,6 +81,7 @@
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mpu {
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mpu {
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compatible = "ti,omap4-mpu";
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compatible = "ti,omap4-mpu";
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ti,hwmods = "mpu";
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ti,hwmods = "mpu";
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sram = <&ocmcram>;
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};
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};
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dsp {
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dsp {
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@ -104,8 +104,9 @@
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soc {
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soc {
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compatible = "ti,omap-infra";
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compatible = "ti,omap-infra";
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mpu {
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mpu {
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compatible = "ti,omap5-mpu";
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compatible = "ti,omap4-mpu";
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ti,hwmods = "mpu";
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ti,hwmods = "mpu";
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sram = <&ocmcram>;
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};
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};
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};
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};
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@ -231,15 +231,6 @@ static struct map_desc omap44xx_io_desc[] __initdata = {
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.length = L4_PER_44XX_SIZE,
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.length = L4_PER_44XX_SIZE,
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.type = MT_DEVICE,
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.type = MT_DEVICE,
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},
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},
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#ifdef CONFIG_OMAP4_ERRATA_I688
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{
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.virtual = OMAP4_SRAM_VA,
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.pfn = __phys_to_pfn(OMAP4_SRAM_PA),
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.length = PAGE_SIZE,
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.type = MT_MEMORY_RW_SO,
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},
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#endif
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};
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};
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#endif
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#endif
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@ -269,14 +260,6 @@ static struct map_desc omap54xx_io_desc[] __initdata = {
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.length = L4_PER_54XX_SIZE,
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.length = L4_PER_54XX_SIZE,
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.type = MT_DEVICE,
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.type = MT_DEVICE,
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},
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},
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#ifdef CONFIG_OMAP4_ERRATA_I688
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{
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.virtual = OMAP4_SRAM_VA,
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.pfn = __phys_to_pfn(OMAP4_SRAM_PA),
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.length = PAGE_SIZE,
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.type = MT_MEMORY_RW_SO,
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},
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#endif
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};
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};
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#endif
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#endif
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@ -25,6 +25,7 @@
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#include <linux/irqchip/irq-crossbar.h>
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#include <linux/irqchip/irq-crossbar.h>
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#include <linux/of_address.h>
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#include <linux/of_address.h>
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#include <linux/reboot.h>
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#include <linux/reboot.h>
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#include <linux/genalloc.h>
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#include <asm/hardware/cache-l2x0.h>
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#include <asm/hardware/cache-l2x0.h>
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#include <asm/mach/map.h>
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#include <asm/mach/map.h>
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@ -71,6 +72,26 @@ void omap_bus_sync(void)
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}
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}
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EXPORT_SYMBOL(omap_bus_sync);
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EXPORT_SYMBOL(omap_bus_sync);
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static int __init omap4_sram_init(void)
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{
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struct device_node *np;
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struct gen_pool *sram_pool;
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np = of_find_compatible_node(NULL, NULL, "ti,omap4-mpu");
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if (!np)
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pr_warn("%s:Unable to allocate sram needed to handle errata I688\n",
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__func__);
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sram_pool = of_get_named_gen_pool(np, "sram", 0);
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if (!sram_pool)
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pr_warn("%s:Unable to get sram pool needed to handle errata I688\n",
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__func__);
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else
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sram_sync = (void *)gen_pool_alloc(sram_pool, PAGE_SIZE);
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return 0;
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}
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omap_arch_initcall(omap4_sram_init);
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/* Steal one page physical memory for barrier implementation */
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/* Steal one page physical memory for barrier implementation */
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int __init omap_barrier_reserve_memblock(void)
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int __init omap_barrier_reserve_memblock(void)
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{
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{
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@ -91,7 +112,6 @@ void __init omap_barriers_init(void)
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dram_io_desc[0].type = MT_MEMORY_RW_SO;
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dram_io_desc[0].type = MT_MEMORY_RW_SO;
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iotable_init(dram_io_desc, ARRAY_SIZE(dram_io_desc));
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iotable_init(dram_io_desc, ARRAY_SIZE(dram_io_desc));
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dram_sync = (void __iomem *) dram_io_desc[0].virtual;
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dram_sync = (void __iomem *) dram_io_desc[0].virtual;
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sram_sync = (void __iomem *) OMAP4_SRAM_VA;
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pr_info("OMAP4: Map 0x%08llx to 0x%08lx for dram barrier\n",
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pr_info("OMAP4: Map 0x%08llx to 0x%08lx for dram barrier\n",
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(long long) paddr, dram_io_desc[0].virtual);
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(long long) paddr, dram_io_desc[0].virtual);
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@ -124,12 +124,6 @@ static void __init omap2_map_sram(void)
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{
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{
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int cached = 1;
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int cached = 1;
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#ifdef CONFIG_OMAP4_ERRATA_I688
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if (cpu_is_omap44xx()) {
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omap_sram_start += PAGE_SIZE;
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omap_sram_size -= SZ_16K;
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}
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#endif
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if (cpu_is_omap34xx()) {
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if (cpu_is_omap34xx()) {
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/*
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/*
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* SRAM must be marked as non-cached on OMAP3 since the
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* SRAM must be marked as non-cached on OMAP3 since the
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@ -74,9 +74,3 @@ static inline void omap_push_sram_idle(void) {}
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*/
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*/
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#define OMAP2_SRAM_PA 0x40200000
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#define OMAP2_SRAM_PA 0x40200000
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#define OMAP3_SRAM_PA 0x40200000
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#define OMAP3_SRAM_PA 0x40200000
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#ifdef CONFIG_OMAP4_ERRATA_I688
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#define OMAP4_SRAM_PA 0x40304000
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#define OMAP4_SRAM_VA 0xfe404000
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#else
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#define OMAP4_SRAM_PA 0x40300000
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#endif
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