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KVM: SVM: remove selective CR0 comment 

There is not selective cr0 intercept bug. The code in the comment sets the
CR0.PG bit. But KVM sets the CR4.PG bit for SVM always to implement the paged
real mode. So the 'mov %eax,%cr0' instruction does not change the CR0.PG bit.
Selective CR0 intercepts only occur when a bit is actually changed. So its the
right behavior that there is no intercept on this instruction.

Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
Signed-off-by: Avi Kivity <avi@qumranet.com>
This commit is contained in:
Joerg Roedel 2008-04-16 17:01:05 +02:00 committed by Avi Kivity
parent aaf697e4e0
commit 1336028b9a
1 changed files with 0 additions and 11 deletions
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11
arch/x86/kvm/svm.c
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@ -513,17 +513,6 @@ static void init_vmcb(struct vcpu_svm *svm)
control->intercept = (1ULL << INTERCEPT_INTR) |
(1ULL << INTERCEPT_NMI) |
(1ULL << INTERCEPT_SMI) |
/*
* selective cr0 intercept bug?
* 0: 0f 22 d8 mov %eax,%cr3
* 3: 0f 20 c0 mov %cr0,%eax
* 6: 0d 00 00 00 80 or $0x80000000,%eax
* b: 0f 22 c0 mov %eax,%cr0
* set cr3 ->interception
* get cr0 ->interception
* set cr0 -> no interception
*/
/* (1ULL << INTERCEPT_SELECTIVE_CR0) | */
(1ULL << INTERCEPT_CPUID) |
(1ULL << INTERCEPT_INVD) |
(1ULL << INTERCEPT_HLT) |