rtc: m41t80: add clock provider support
Some devices supported by the m41t80 driver have a programmable square-wave output signal (see M41T80_FEATURE_SQ). This enables to use this feature as a clock provider of common clock framework. Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
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17e296eb35
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1373e77b4f
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@ -16,6 +16,7 @@
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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#include <linux/bcd.h>
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#include <linux/bcd.h>
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#include <linux/clk-provider.h>
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#include <linux/i2c.h>
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#include <linux/i2c.h>
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#include <linux/init.h>
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/kernel.h>
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@ -53,6 +54,8 @@
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#define M41T80_ALARM_REG_SIZE \
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#define M41T80_ALARM_REG_SIZE \
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(M41T80_REG_ALARM_SEC + 1 - M41T80_REG_ALARM_MON)
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(M41T80_REG_ALARM_SEC + 1 - M41T80_REG_ALARM_MON)
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#define M41T80_SQW_MAX_FREQ 32768
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#define M41T80_SEC_ST BIT(7) /* ST: Stop Bit */
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#define M41T80_SEC_ST BIT(7) /* ST: Stop Bit */
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#define M41T80_ALMON_AFE BIT(7) /* AFE: AF Enable Bit */
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#define M41T80_ALMON_AFE BIT(7) /* AFE: AF Enable Bit */
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#define M41T80_ALMON_SQWE BIT(6) /* SQWE: SQW Enable Bit */
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#define M41T80_ALMON_SQWE BIT(6) /* SQWE: SQW Enable Bit */
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@ -147,7 +150,11 @@ MODULE_DEVICE_TABLE(of, m41t80_of_match);
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struct m41t80_data {
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struct m41t80_data {
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unsigned long features;
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unsigned long features;
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struct i2c_client *client;
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struct rtc_device *rtc;
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struct rtc_device *rtc;
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#ifdef CONFIG_COMMON_CLK
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struct clk_hw sqw;
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#endif
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};
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};
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static irqreturn_t m41t80_handle_irq(int irq, void *dev_id)
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static irqreturn_t m41t80_handle_irq(int irq, void *dev_id)
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@ -455,6 +462,166 @@ static struct attribute_group attr_group = {
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.attrs = attrs,
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.attrs = attrs,
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};
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};
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#ifdef CONFIG_COMMON_CLK
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#define sqw_to_m41t80_data(_hw) container_of(_hw, struct m41t80_data, sqw)
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static unsigned long m41t80_sqw_recalc_rate(struct clk_hw *hw,
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unsigned long parent_rate)
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{
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struct m41t80_data *m41t80 = sqw_to_m41t80_data(hw);
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struct i2c_client *client = m41t80->client;
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int reg_sqw = (m41t80->features & M41T80_FEATURE_SQ_ALT) ?
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M41T80_REG_WDAY : M41T80_REG_SQW;
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int ret = i2c_smbus_read_byte_data(client, reg_sqw);
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unsigned long val = M41T80_SQW_MAX_FREQ;
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if (ret < 0)
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return 0;
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ret >>= 4;
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if (ret == 0)
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val = 0;
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else if (ret > 1)
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val = val / (1 << ret);
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return val;
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}
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static long m41t80_sqw_round_rate(struct clk_hw *hw, unsigned long rate,
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unsigned long *prate)
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{
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int i, freq = M41T80_SQW_MAX_FREQ;
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if (freq <= rate)
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return freq;
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for (i = 2; i <= ilog2(M41T80_SQW_MAX_FREQ); i++) {
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freq /= 1 << i;
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if (freq <= rate)
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return freq;
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}
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return 0;
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}
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static int m41t80_sqw_set_rate(struct clk_hw *hw, unsigned long rate,
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unsigned long parent_rate)
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{
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struct m41t80_data *m41t80 = sqw_to_m41t80_data(hw);
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struct i2c_client *client = m41t80->client;
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int reg_sqw = (m41t80->features & M41T80_FEATURE_SQ_ALT) ?
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M41T80_REG_WDAY : M41T80_REG_SQW;
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int reg, ret, val = 0;
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if (rate) {
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if (!is_power_of_2(rate))
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return -EINVAL;
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val = ilog2(rate);
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if (val == ilog2(M41T80_SQW_MAX_FREQ))
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val = 1;
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else if (val < (ilog2(M41T80_SQW_MAX_FREQ) - 1))
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val = ilog2(M41T80_SQW_MAX_FREQ) - val;
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else
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return -EINVAL;
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}
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reg = i2c_smbus_read_byte_data(client, reg_sqw);
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if (reg < 0)
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return reg;
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reg = (reg & 0x0f) | (val << 4);
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ret = i2c_smbus_write_byte_data(client, reg_sqw, reg);
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if (ret < 0)
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return ret;
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return -EINVAL;
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}
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static int m41t80_sqw_control(struct clk_hw *hw, bool enable)
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{
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struct m41t80_data *m41t80 = sqw_to_m41t80_data(hw);
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struct i2c_client *client = m41t80->client;
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int ret = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_MON);
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if (ret < 0)
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return ret;
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if (enable)
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ret |= M41T80_ALMON_SQWE;
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else
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ret &= ~M41T80_ALMON_SQWE;
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return i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON, ret);
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}
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static int m41t80_sqw_prepare(struct clk_hw *hw)
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{
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return m41t80_sqw_control(hw, 1);
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}
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static void m41t80_sqw_unprepare(struct clk_hw *hw)
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{
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m41t80_sqw_control(hw, 0);
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}
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static int m41t80_sqw_is_prepared(struct clk_hw *hw)
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{
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struct m41t80_data *m41t80 = sqw_to_m41t80_data(hw);
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struct i2c_client *client = m41t80->client;
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int ret = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_MON);
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if (ret < 0)
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return ret;
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return !!(ret & M41T80_ALMON_SQWE);
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}
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static const struct clk_ops m41t80_sqw_ops = {
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.prepare = m41t80_sqw_prepare,
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.unprepare = m41t80_sqw_unprepare,
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.is_prepared = m41t80_sqw_is_prepared,
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.recalc_rate = m41t80_sqw_recalc_rate,
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.round_rate = m41t80_sqw_round_rate,
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.set_rate = m41t80_sqw_set_rate,
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};
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static struct clk *m41t80_sqw_register_clk(struct m41t80_data *m41t80)
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{
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struct i2c_client *client = m41t80->client;
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struct device_node *node = client->dev.of_node;
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struct clk *clk;
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struct clk_init_data init;
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int ret;
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/* First disable the clock */
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ret = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_MON);
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if (ret < 0)
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return ERR_PTR(ret);
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ret = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON,
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ret & ~(M41T80_ALMON_SQWE));
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if (ret < 0)
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return ERR_PTR(ret);
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init.name = "m41t80-sqw";
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init.ops = &m41t80_sqw_ops;
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init.flags = 0;
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init.parent_names = NULL;
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init.num_parents = 0;
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m41t80->sqw.init = &init;
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/* optional override of the clockname */
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of_property_read_string(node, "clock-output-names", &init.name);
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/* register the clock */
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clk = clk_register(&client->dev, &m41t80->sqw);
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if (!IS_ERR(clk))
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of_clk_add_provider(node, of_clk_src_simple_get, clk);
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return clk;
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}
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#endif
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#ifdef CONFIG_RTC_DRV_M41T80_WDT
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#ifdef CONFIG_RTC_DRV_M41T80_WDT
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/*
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/*
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*****************************************************************************
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*****************************************************************************
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@ -772,6 +939,7 @@ static int m41t80_probe(struct i2c_client *client,
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if (!m41t80_data)
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if (!m41t80_data)
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return -ENOMEM;
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return -ENOMEM;
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m41t80_data->client = client;
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if (client->dev.of_node)
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if (client->dev.of_node)
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m41t80_data->features = (unsigned long)
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m41t80_data->features = (unsigned long)
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of_device_get_match_data(&client->dev);
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of_device_get_match_data(&client->dev);
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@ -863,6 +1031,10 @@ static int m41t80_probe(struct i2c_client *client,
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return rc;
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return rc;
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}
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}
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}
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}
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#endif
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#ifdef CONFIG_COMMON_CLK
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if (m41t80_data->features & M41T80_FEATURE_SQ)
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m41t80_sqw_register_clk(m41t80_data);
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#endif
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#endif
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return 0;
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return 0;
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}
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}
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