ARM: mach-shmobile: AG5EVM LCDC / MIPI-DSI platform data
Add platform data for MIPI-DSI and LCDC on the AG5EVM board. The sh73a0 clkdev bindings are also updated. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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@ -61,6 +61,7 @@ endchoice
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config MACH_AG5EVM
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config MACH_AG5EVM
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bool "AG5EVM board"
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bool "AG5EVM board"
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select ARCH_REQUIRE_GPIOLIB
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select ARCH_REQUIRE_GPIOLIB
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select SH_LCD_MIPI_DSI
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depends on ARCH_SH73A0
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depends on ARCH_SH73A0
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config MACH_MACKEREL
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config MACH_MACKEREL
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@ -34,9 +34,10 @@
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#include <linux/input/sh_keysc.h>
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#include <linux/input/sh_keysc.h>
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#include <linux/mmc/host.h>
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#include <linux/mmc/host.h>
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#include <linux/mmc/sh_mmcif.h>
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#include <linux/mmc/sh_mmcif.h>
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#include <linux/sh_clk.h>
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#include <video/sh_mobile_lcdc.h>
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#include <video/sh_mipi_dsi.h>
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#include <sound/sh_fsi.h>
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#include <sound/sh_fsi.h>
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#include <mach/hardware.h>
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#include <mach/hardware.h>
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#include <mach/sh73a0.h>
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#include <mach/sh73a0.h>
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#include <mach/common.h>
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#include <mach/common.h>
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@ -203,12 +204,145 @@ static struct platform_device irda_device = {
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.num_resources = ARRAY_SIZE(irda_resources),
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.num_resources = ARRAY_SIZE(irda_resources),
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};
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};
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static unsigned char lcd_backlight_seq[3][2] = {
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{ 0x04, 0x07 },
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{ 0x23, 0x80 },
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{ 0x03, 0x01 },
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};
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static void lcd_backlight_on(void)
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{
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struct i2c_adapter *a;
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struct i2c_msg msg;
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int k;
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a = i2c_get_adapter(1);
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for (k = 0; a && k < 3; k++) {
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msg.addr = 0x6d;
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msg.buf = &lcd_backlight_seq[k][0];
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msg.len = 2;
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msg.flags = 0;
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if (i2c_transfer(a, &msg, 1) != 1)
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break;
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}
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}
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static void lcd_backlight_reset(void)
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{
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gpio_set_value(GPIO_PORT235, 0);
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mdelay(24);
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gpio_set_value(GPIO_PORT235, 1);
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}
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static void lcd_on(void *board_data, struct fb_info *info)
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{
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lcd_backlight_on();
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}
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static void lcd_off(void *board_data)
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{
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lcd_backlight_reset();
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}
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/* LCDC0 */
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static const struct fb_videomode lcdc0_modes[] = {
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{
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.name = "R63302(QHD)",
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.xres = 544,
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.yres = 961,
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.left_margin = 72,
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.right_margin = 600,
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.hsync_len = 16,
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.upper_margin = 8,
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.lower_margin = 8,
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.vsync_len = 2,
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.sync = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_HOR_HIGH_ACT,
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},
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};
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static struct sh_mobile_lcdc_info lcdc0_info = {
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.clock_source = LCDC_CLK_PERIPHERAL,
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.ch[0] = {
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.chan = LCDC_CHAN_MAINLCD,
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.interface_type = RGB24,
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.clock_divider = 1,
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.flags = LCDC_FLAGS_DWPOL,
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.lcd_size_cfg.width = 44,
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.lcd_size_cfg.height = 79,
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.bpp = 16,
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.lcd_cfg = lcdc0_modes,
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.num_cfg = ARRAY_SIZE(lcdc0_modes),
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.board_cfg = {
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.display_on = lcd_on,
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.display_off = lcd_off,
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},
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}
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};
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static struct resource lcdc0_resources[] = {
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[0] = {
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.name = "LCDC0",
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.start = 0xfe940000, /* P4-only space */
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.end = 0xfe943fff,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = intcs_evt2irq(0x580),
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device lcdc0_device = {
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.name = "sh_mobile_lcdc_fb",
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.num_resources = ARRAY_SIZE(lcdc0_resources),
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.resource = lcdc0_resources,
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.id = 0,
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.dev = {
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.platform_data = &lcdc0_info,
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.coherent_dma_mask = ~0,
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},
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};
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/* MIPI-DSI */
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static struct resource mipidsi0_resources[] = {
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[0] = {
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.start = 0xfeab0000,
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.end = 0xfeab3fff,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = 0xfeab4000,
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.end = 0xfeab7fff,
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.flags = IORESOURCE_MEM,
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},
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};
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static struct sh_mipi_dsi_info mipidsi0_info = {
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.data_format = MIPI_RGB888,
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.lcd_chan = &lcdc0_info.ch[0],
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.vsynw_offset = 20,
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.clksrc = 1,
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.flags = SH_MIPI_DSI_HSABM,
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};
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static struct platform_device mipidsi0_device = {
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.name = "sh-mipi-dsi",
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.num_resources = ARRAY_SIZE(mipidsi0_resources),
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.resource = mipidsi0_resources,
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.id = 0,
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.dev = {
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.platform_data = &mipidsi0_info,
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},
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};
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static struct platform_device *ag5evm_devices[] __initdata = {
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static struct platform_device *ag5evm_devices[] __initdata = {
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ð_device,
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ð_device,
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&keysc_device,
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&keysc_device,
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&fsi_device,
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&fsi_device,
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&mmc_device,
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&mmc_device,
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&irda_device,
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&irda_device,
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&lcdc0_device,
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&mipidsi0_device,
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};
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};
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static struct map_desc ag5evm_io_desc[] __initdata = {
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static struct map_desc ag5evm_io_desc[] __initdata = {
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@ -245,6 +379,8 @@ void __init ag5evm_init_irq(void)
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__raw_writew(__raw_readw(PINTCR0A) | (2<<10), PINTCR0A);
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__raw_writew(__raw_readw(PINTCR0A) | (2<<10), PINTCR0A);
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}
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}
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#define DSI0PHYCR 0xe615006c
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static void __init ag5evm_init(void)
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static void __init ag5evm_init(void)
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{
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{
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sh73a0_pinmux_init();
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sh73a0_pinmux_init();
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@ -313,6 +449,20 @@ static void __init ag5evm_init(void)
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gpio_request(GPIO_FN_PORT242_IRDA_IN, NULL);
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gpio_request(GPIO_FN_PORT242_IRDA_IN, NULL);
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gpio_request(GPIO_FN_PORT243_IRDA_FIRSEL, NULL);
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gpio_request(GPIO_FN_PORT243_IRDA_FIRSEL, NULL);
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/* LCD panel */
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gpio_request(GPIO_PORT217, NULL); /* RESET */
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gpio_direction_output(GPIO_PORT217, 0);
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mdelay(1);
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gpio_set_value(GPIO_PORT217, 1);
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/* LCD backlight controller */
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gpio_request(GPIO_PORT235, NULL); /* RESET */
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gpio_direction_output(GPIO_PORT235, 0);
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lcd_backlight_reset();
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/* MIPI-DSI clock setup */
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__raw_writel(0x2a809010, DSI0PHYCR);
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#ifdef CONFIG_CACHE_L2X0
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#ifdef CONFIG_CACHE_L2X0
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/* Shared attribute override enable, 64K*8way */
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/* Shared attribute override enable, 64K*8way */
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l2x0_init(__io(0xf0100000), 0x00460000, 0xc2000fff);
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l2x0_init(__io(0xf0100000), 0x00460000, 0xc2000fff);
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@ -263,7 +263,7 @@ static struct clk div6_clks[DIV6_NR] = {
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};
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};
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enum { MSTP001,
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enum { MSTP001,
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MSTP125, MSTP116,
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MSTP125, MSTP118, MSTP116, MSTP100,
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MSTP219,
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MSTP219,
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MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP201, MSTP200,
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MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP201, MSTP200,
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MSTP331, MSTP329, MSTP325, MSTP323, MSTP312,
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MSTP331, MSTP329, MSTP325, MSTP323, MSTP312,
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@ -276,7 +276,9 @@ enum { MSTP001,
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static struct clk mstp_clks[MSTP_NR] = {
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static struct clk mstp_clks[MSTP_NR] = {
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[MSTP001] = MSTP(&div4_clks[DIV4_HP], SMSTPCR0, 1, 0), /* IIC2 */
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[MSTP001] = MSTP(&div4_clks[DIV4_HP], SMSTPCR0, 1, 0), /* IIC2 */
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[MSTP125] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR1, 25, 0), /* TMU0 */
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[MSTP125] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR1, 25, 0), /* TMU0 */
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[MSTP118] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 18, 0), /* DSITX0 */
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[MSTP116] = MSTP(&div4_clks[DIV4_HP], SMSTPCR1, 16, 0), /* IIC0 */
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[MSTP116] = MSTP(&div4_clks[DIV4_HP], SMSTPCR1, 16, 0), /* IIC0 */
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[MSTP100] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 0, 0), /* LCDC0 */
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[MSTP219] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 19, 0), /* SCIFA7 */
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[MSTP219] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 19, 0), /* SCIFA7 */
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[MSTP207] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 7, 0), /* SCIFA5 */
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[MSTP207] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 7, 0), /* SCIFA5 */
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[MSTP206] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 6, 0), /* SCIFB */
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[MSTP206] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 6, 0), /* SCIFB */
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@ -297,16 +299,25 @@ static struct clk mstp_clks[MSTP_NR] = {
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#define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk }
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#define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk }
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#define CLKDEV_DEV_ID(_id, _clk) { .dev_id = _id, .clk = _clk }
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#define CLKDEV_DEV_ID(_id, _clk) { .dev_id = _id, .clk = _clk }
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#define CLKDEV_ICK_ID(_cid, _did, _clk) { .con_id = _cid, .dev_id = _did, .clk = _clk }
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static struct clk_lookup lookups[] = {
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static struct clk_lookup lookups[] = {
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/* main clocks */
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/* main clocks */
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CLKDEV_CON_ID("r_clk", &r_clk),
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CLKDEV_CON_ID("r_clk", &r_clk),
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/* DIV6 clocks */
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CLKDEV_ICK_ID("dsit_clk", "sh-mipi-dsi.0", &div6_clks[DIV6_DSIT]),
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CLKDEV_ICK_ID("dsit_clk", "sh-mipi-dsi.1", &div6_clks[DIV6_DSIT]),
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CLKDEV_ICK_ID("dsi0p_clk", "sh-mipi-dsi.0", &div6_clks[DIV6_DSI0P]),
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CLKDEV_ICK_ID("dsi1p_clk", "sh-mipi-dsi.1", &div6_clks[DIV6_DSI1P]),
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/* MSTP32 clocks */
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/* MSTP32 clocks */
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CLKDEV_DEV_ID("i2c-sh_mobile.2", &mstp_clks[MSTP001]), /* I2C2 */
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CLKDEV_DEV_ID("i2c-sh_mobile.2", &mstp_clks[MSTP001]), /* I2C2 */
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CLKDEV_DEV_ID("sh_mobile_lcdc_fb.0", &mstp_clks[MSTP100]), /* LCDC0 */
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CLKDEV_DEV_ID("sh_tmu.0", &mstp_clks[MSTP125]), /* TMU00 */
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CLKDEV_DEV_ID("sh_tmu.0", &mstp_clks[MSTP125]), /* TMU00 */
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CLKDEV_DEV_ID("sh_tmu.1", &mstp_clks[MSTP125]), /* TMU01 */
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CLKDEV_DEV_ID("sh_tmu.1", &mstp_clks[MSTP125]), /* TMU01 */
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CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[MSTP116]), /* I2C0 */
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CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[MSTP116]), /* I2C0 */
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CLKDEV_DEV_ID("sh-mipi-dsi.0", &mstp_clks[MSTP118]), /* DSITX */
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CLKDEV_DEV_ID("sh-sci.7", &mstp_clks[MSTP219]), /* SCIFA7 */
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CLKDEV_DEV_ID("sh-sci.7", &mstp_clks[MSTP219]), /* SCIFA7 */
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CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP207]), /* SCIFA5 */
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CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP207]), /* SCIFA5 */
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CLKDEV_DEV_ID("sh-sci.8", &mstp_clks[MSTP206]), /* SCIFB */
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CLKDEV_DEV_ID("sh-sci.8", &mstp_clks[MSTP206]), /* SCIFB */
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