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MIPS: Lantiq: Fix pp32 clock on vr9 

The vendor code uses different clock values for this clock.

Signed-off-by: Hauke Mehrtens <hauke.mehrtens@lantiq.com>
Acked-by: John Crispin <blogic@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/11384/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Hauke Mehrtens 2015-10-28 23:37:33 +01:00 committed by Ralf Baechle
parent b5a03d0cb3
commit 18a3af60fc
2 changed files with 8 additions and 3 deletions
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2
arch/mips/lantiq/clk.h
View File

@ -31,10 +31,12 @@
#define CLOCK_240M 240000000
#define CLOCK_250M 250000000
#define CLOCK_266M 266666666
#define CLOCK_288M 288888888
#define CLOCK_300M 300000000
#define CLOCK_333M 333333333
#define CLOCK_393M 393215332
#define CLOCK_400M 400000000
#define CLOCK_432M 432000000
#define CLOCK_450M 450000000
#define CLOCK_500M 500000000
#define CLOCK_600M 600000000

9
arch/mips/lantiq/xway/clk.c
View File

@ -175,15 +175,18 @@ unsigned long ltq_vr9_fpi_hz(void)
unsigned long ltq_vr9_pp32_hz(void)
{
unsigned int clksys = (ltq_cgu_r32(CGU_SYS) >> 16) & 3;
unsigned int clksys = (ltq_cgu_r32(CGU_SYS) >> 16) & 0x7;
unsigned long clk;
switch (clksys) {
case 0:
clk = CLOCK_500M;
break;
case 1:
clk = CLOCK_450M;
clk = CLOCK_432M;
break;
case 2:
clk = CLOCK_300M;
clk = CLOCK_288M;
break;
default:
clk = CLOCK_500M;