Merge branch 'ath79-add-ag71xx-support'

Oleksij Rempel says:

====================
MIPS: ath79: add ag71xx support

2019.05.24 v6:
- ag71xx: remove double union
- ag71xx: reverse Christmas tree for all functions
- ag71xx: add Reviewed-by: Andrew Lunn <andrew@lunn.ch>

2019.05.20 v5:
- ag71xx: remove MII_CMD_WRITE, the name is confusing. It is
  actually disables MII_CMD_READ.
- ag71xx: rework ag71xx_mdio_mii_read/write
- ag71xx: set proper mask for the addr in ag71xx_mdio_mii_read/write
- Kconfig: remove MDIO_BITBANG
- ag71xx: ./scripts/checkpatch.pl it.

2019.05.19 v4:
- DT: define eth and mdio clocks
- ag71xx: remove module parameters
- ag71xx: return proper error value on mdio_read/write
- ag71xx: use proper mdio clock registration
- ag71xx: add ag71xx_dma_wait_stop() for ag71xx_dma_reset()
- ag71xx: remove ag71xx_speed_str()
- ag71xx: use phydev->link/sped/duplex instead of ag-> variants
- ag71xx: use WARN() instead of BUG()
- ag71xx: drop big part of ag71xx_phy_link_adjust()
- ag71xx: drop most of ag71xx_do_ioctl()
- ag71xx: register eth clock
- ag71xx: remove AG71XX_ETH0_NO_MDIO quirk.

2019.04.22 v3:
- ag71xx: use phy_modes() instead of ag71xx_get_phy_if_mode_name()
- ag71xx: remove .ndo_poll_controller support
- ag71xx: unregister_netdev before disconnecting phy.

2019.04.18 v2:
- ag71xx: add list of openwrt authors
- ag71xx: remove redundant PHY_POLL assignment
- ag71xx: use phy_attached_info instead of netif_info
- ag71xx: remove redundant netif_carrier_off() on .stop.
- DT: use "ethernet" instead of "eth"

This patch series provide ethernet support for many Atheros/QCA
MIPS based SoCs.

I reworked ag71xx driver which was previously maintained within OpenWRT
repository. So far, following changes was made to make upstreaming
easier:
- everything what can be some how used in user space was removed. Most
  of it was debug functionality.
- most of deficetree bindings was removed. Not every thing made sense
  and most of it is SoC specific, so it is possible to detect it by
  compatible.
- mac and mdio parts are merged in to one driver. It makes easier to
  maintaine SoC specific quirks.
====================

Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
David S. Miller 2019-05-26 13:22:50 -07:00
commit 18e8817126
6 changed files with 1987 additions and 1 deletions

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@ -0,0 +1,45 @@
Required properties:
- compatible: Should be "qca,<soc>-eth". Currently support compatibles are:
qca,ar7100-eth - Atheros AR7100
qca,ar7240-eth - Atheros AR7240
qca,ar7241-eth - Atheros AR7241
qca,ar7242-eth - Atheros AR7242
qca,ar9130-eth - Atheros AR9130
qca,ar9330-eth - Atheros AR9330
qca,ar9340-eth - Atheros AR9340
qca,qca9530-eth - Qualcomm Atheros QCA9530
qca,qca9550-eth - Qualcomm Atheros QCA9550
qca,qca9560-eth - Qualcomm Atheros QCA9560
- reg : Address and length of the register set for the device
- interrupts : Should contain eth interrupt
- phy-mode : See ethernet.txt file in the same directory
- clocks: the clock used by the core
- clock-names: the names of the clock listed in the clocks property. These are
"eth" and "mdio".
- resets: Should contain phandles to the reset signals
- reset-names: Should contain the names of reset signal listed in the resets
property. These are "mac" and "mdio"
Optional properties:
- phy-handle : phandle to the PHY device connected to this device.
- fixed-link : Assume a fixed link. See fixed-link.txt in the same directory.
Use instead of phy-handle.
Optional subnodes:
- mdio : specifies the mdio bus, used as a container for phy nodes
according to phy.txt in the same directory
Example:
ethernet@1a000000 {
compatible = "qca,ar9330-eth";
reg = <0x1a000000 0x200>;
interrupts = <5>;
resets = <&rst 13>, <&rst 23>;
reset-names = "mac", "mdio";
clocks = <&pll ATH79_CLK_AHB>, <&pll ATH79_CLK_MDIO>;
clock-names = "eth", "mdio";
phy-mode = "gmii";
};

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@ -116,6 +116,32 @@
};
};
eth0: ethernet@19000000 {
compatible = "qca,ar9330-eth";
reg = <0x19000000 0x200>;
interrupts = <4>;
resets = <&rst 9>, <&rst 22>;
reset-names = "mac", "mdio";
clocks = <&pll ATH79_CLK_AHB>, <&pll ATH79_CLK_AHB>;
clock-names = "eth", "mdio";
status = "disabled";
};
eth1: ethernet@1a000000 {
compatible = "qca,ar9330-eth";
reg = <0x1a000000 0x200>;
interrupts = <5>;
resets = <&rst 13>, <&rst 23>;
reset-names = "mac", "mdio";
clocks = <&pll ATH79_CLK_AHB>, <&pll ATH79_CLK_AHB>;
clock-names = "eth", "mdio";
status = "disabled";
};
usb: usb@1b000100 {
compatible = "chipidea,usb2";
reg = <0x1b000000 0x200>;

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@ -76,3 +76,11 @@
reg = <0>;
};
};
&eth0 {
status = "okay";
};
&eth1 {
status = "okay";
};

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@ -6,7 +6,7 @@
config NET_VENDOR_ATHEROS
bool "Atheros devices"
default y
depends on PCI
depends on (PCI || ATH79)
---help---
If you have a network (Ethernet) card belonging to this class, say Y.
@ -17,6 +17,14 @@ config NET_VENDOR_ATHEROS
if NET_VENDOR_ATHEROS
config AG71XX
tristate "Atheros AR7XXX/AR9XXX built-in ethernet mac support"
depends on ATH79
select PHYLIB
help
If you wish to compile a kernel for AR7XXX/91XXX and enable
ethernet support, then you should always answer Y to this.
config ATL2
tristate "Atheros L2 Fast Ethernet support"
depends on PCI

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@ -3,6 +3,7 @@
# Makefile for the Atheros network device drivers.
#
obj-$(CONFIG_AG71XX) += ag71xx.o
obj-$(CONFIG_ATL1) += atlx/
obj-$(CONFIG_ATL2) += atlx/
obj-$(CONFIG_ATL1E) += atl1e/

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