Merge branch 'sh/st-integration' into sh-latest

This commit is contained in:
Paul Mundt 2011-02-15 16:48:28 +09:00
commit 18e9550273
478 changed files with 4296 additions and 2161 deletions

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@ -65,13 +65,19 @@ looks at the connected hardware is beyond the scope of this document.
The boot loader must ultimately be able to provide a MACH_TYPE_xxx
value to the kernel. (see linux/arch/arm/tools/mach-types).
4. Setup the kernel tagged list
-------------------------------
4. Setup boot data
------------------
Existing boot loaders: OPTIONAL, HIGHLY RECOMMENDED
New boot loaders: MANDATORY
The boot loader must provide either a tagged list or a dtb image for
passing configuration data to the kernel. The physical address of the
boot data is passed to the kernel in register r2.
4a. Setup the kernel tagged list
--------------------------------
The boot loader must create and initialise the kernel tagged list.
A valid tagged list starts with ATAG_CORE and ends with ATAG_NONE.
The ATAG_CORE tag may or may not be empty. An empty ATAG_CORE tag
@ -101,6 +107,24 @@ The tagged list must be placed in a region of memory where neither
the kernel decompressor nor initrd 'bootp' program will overwrite
it. The recommended placement is in the first 16KiB of RAM.
4b. Setup the device tree
-------------------------
The boot loader must load a device tree image (dtb) into system ram
at a 64bit aligned address and initialize it with the boot data. The
dtb format is documented in Documentation/devicetree/booting-without-of.txt.
The kernel will look for the dtb magic value of 0xd00dfeed at the dtb
physical address to determine if a dtb has been passed instead of a
tagged list.
The boot loader must pass at a minimum the size and location of the
system memory, and the root filesystem location. The dtb must be
placed in a region of memory where the kernel decompressor will not
overwrite it. The recommended placement is in the first 16KiB of RAM
with the caveat that it may not be located at physical address 0 since
the kernel interprets a value of 0 in r2 to mean neither a tagged list
nor a dtb were passed.
5. Calling the kernel image
---------------------------
@ -125,7 +149,8 @@ In either case, the following conditions must be met:
- CPU register settings
r0 = 0,
r1 = machine type number discovered in (3) above.
r2 = physical address of tagged list in system RAM.
r2 = physical address of tagged list in system RAM, or
physical address of device tree block (dtb) in system RAM
- CPU mode
All forms of interrupts must be disabled (IRQs and FIQs)

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@ -13,7 +13,7 @@ Table of Contents
I - Introduction
1) Entry point for arch/powerpc
2) Board support
2) Entry point for arch/arm
II - The DT block format
1) Header
@ -41,13 +41,6 @@ Table of Contents
VI - System-on-a-chip devices and nodes
1) Defining child nodes of an SOC
2) Representing devices without a current OF specification
a) PHY nodes
b) Interrupt controllers
c) 4xx/Axon EMAC ethernet nodes
d) Xilinx IP cores
e) USB EHCI controllers
f) MDIO on GPIOs
g) SPI busses
VII - Specifying interrupt information for devices
1) interrupts property
@ -123,7 +116,7 @@ Revision Information
I - Introduction
================
During the recent development of the Linux/ppc64 kernel, and more
During the development of the Linux/ppc64 kernel, and more
specifically, the addition of new platform types outside of the old
IBM pSeries/iSeries pair, it was decided to enforce some strict rules
regarding the kernel entry and bootloader <-> kernel interfaces, in
@ -146,7 +139,7 @@ section III, but, for example, the kernel does not require you to
create a node for every PCI device in the system. It is a requirement
to have a node for PCI host bridges in order to provide interrupt
routing informations and memory/IO ranges, among others. It is also
recommended to define nodes for on chip devices and other busses that
recommended to define nodes for on chip devices and other buses that
don't specifically fit in an existing OF specification. This creates a
great flexibility in the way the kernel can then probe those and match
drivers to device, without having to hard code all sorts of tables. It
@ -158,7 +151,7 @@ it with special cases.
1) Entry point for arch/powerpc
-------------------------------
There is one and one single entry point to the kernel, at the start
There is one single entry point to the kernel, at the start
of the kernel image. That entry point supports two calling
conventions:
@ -210,12 +203,6 @@ it with special cases.
with all CPUs. The way to do that with method b) will be
described in a later revision of this document.
2) Board support
----------------
64-bit kernels:
Board supports (platforms) are not exclusive config options. An
arbitrary set of board supports can be built in a single kernel
image. The kernel will "know" what set of functions to use for a
@ -234,47 +221,49 @@ it with special cases.
containing the various callbacks that the generic code will
use to get to your platform specific code
c) Add a reference to your "ppc_md" structure in the
"machines" table in arch/powerpc/kernel/setup_64.c if you are
a 64-bit platform.
d) request and get assigned a platform number (see PLATFORM_*
constants in arch/powerpc/include/asm/processor.h
32-bit embedded kernels:
Currently, board support is essentially an exclusive config option.
The kernel is configured for a single platform. Part of the reason
for this is to keep kernels on embedded systems small and efficient;
part of this is due to the fact the code is already that way. In the
future, a kernel may support multiple platforms, but only if the
A kernel image may support multiple platforms, but only if the
platforms feature the same core architecture. A single kernel build
cannot support both configurations with Book E and configurations
with classic Powerpc architectures.
32-bit embedded platforms that are moved into arch/powerpc using a
flattened device tree should adopt the merged tree practice of
setting ppc_md up dynamically, even though the kernel is currently
built with support for only a single platform at a time. This allows
unification of the setup code, and will make it easier to go to a
multiple-platform-support model in the future.
2) Entry point for arch/arm
---------------------------
NOTE: I believe the above will be true once Ben's done with the merge
of the boot sequences.... someone speak up if this is wrong!
There is one single entry point to the kernel, at the start
of the kernel image. That entry point supports two calling
conventions. A summary of the interface is described here. A full
description of the boot requirements is documented in
Documentation/arm/Booting
To add a 32-bit embedded platform support, follow the instructions
for 64-bit platforms above, with the exception that the Kconfig
option should be set up such that the kernel builds exclusively for
the platform selected. The processor type for the platform should
enable another config option to select the specific board
supported.
a) ATAGS interface. Minimal information is passed from firmware
to the kernel with a tagged list of predefined parameters.
NOTE: If Ben doesn't merge the setup files, may need to change this to
point to setup_32.c
r0 : 0
r1 : Machine type number
I will describe later the boot process and various callbacks that
your platform should implement.
r2 : Physical address of tagged list in system RAM
b) Entry with a flattened device-tree block. Firmware loads the
physical address of the flattened device tree block (dtb) into r2,
r1 is not used, but it is considered good practise to use a valid
machine number as described in Documentation/arm/Booting.
r0 : 0
r1 : Valid machine type number. When using a device tree,
a single machine type number will often be assigned to
represent a class or family of SoCs.
r2 : physical pointer to the device-tree block
(defined in chapter II) in RAM. Device tree can be located
anywhere in system RAM, but it should be aligned on a 32 bit
boundary.
The kernel will differentiate between ATAGS and device tree booting by
reading the memory pointed to by r1 and looking for either the flattened
device tree block magic value (0xd00dfeed) or the ATAG_CORE value at
offset 0x4 from r2 (0x54410001).
II - The DT block format
@ -300,8 +289,8 @@ the block to RAM before passing it to the kernel.
1) Header
---------
The kernel is entered with r3 pointing to an area of memory that is
roughly described in arch/powerpc/include/asm/prom.h by the structure
The kernel is passed the physical address pointing to an area of memory
that is roughly described in include/linux/of_fdt.h by the structure
boot_param_header:
struct boot_param_header {
@ -339,7 +328,7 @@ struct boot_param_header {
All values in this header are in big endian format, the various
fields in this header are defined more precisely below. All
"offset" values are in bytes from the start of the header; that is
from the value of r3.
from the physical base address of the device tree block.
- magic
@ -437,7 +426,7 @@ struct boot_param_header {
------------------------------
r3 -> | struct boot_param_header |
base -> | struct boot_param_header |
------------------------------
| (alignment gap) (*) |
------------------------------
@ -457,7 +446,7 @@ struct boot_param_header {
-----> ------------------------------
|
|
--- (r3 + totalsize)
--- (base + totalsize)
(*) The alignment gaps are not necessarily present; their presence
and size are dependent on the various alignment requirements of
@ -500,7 +489,7 @@ the device-tree structure. It is typically used to represent "path" in
the device-tree. More details about the actual format of these will be
below.
The kernel powerpc generic code does not make any formal use of the
The kernel generic code does not make any formal use of the
unit address (though some board support code may do) so the only real
requirement here for the unit address is to ensure uniqueness of
the node unit name at a given level of the tree. Nodes with no notion
@ -518,20 +507,21 @@ path to the root node is "/".
Every node which actually represents an actual device (that is, a node
which isn't only a virtual "container" for more nodes, like "/cpus"
is) is also required to have a "device_type" property indicating the
type of node .
is) is also required to have a "compatible" property indicating the
specific hardware and an optional list of devices it is fully
backwards compatible with.
Finally, every node that can be referenced from a property in another
node is required to have a "linux,phandle" property. Real open
firmware implementations provide a unique "phandle" value for every
node that the "prom_init()" trampoline code turns into
"linux,phandle" properties. However, this is made optional if the
flattened device tree is used directly. An example of a node
node is required to have either a "phandle" or a "linux,phandle"
property. Real Open Firmware implementations provide a unique
"phandle" value for every node that the "prom_init()" trampoline code
turns into "linux,phandle" properties. However, this is made optional
if the flattened device tree is used directly. An example of a node
referencing another node via "phandle" is when laying out the
interrupt tree which will be described in a further version of this
document.
This "linux, phandle" property is a 32-bit value that uniquely
The "phandle" property is a 32-bit value that uniquely
identifies a node. You are free to use whatever values or system of
values, internal pointers, or whatever to generate these, the only
requirement is that every node for which you provide that property has
@ -694,7 +684,7 @@ made of 3 cells, the bottom two containing the actual address itself
while the top cell contains address space indication, flags, and pci
bus & device numbers.
For busses that support dynamic allocation, it's the accepted practice
For buses that support dynamic allocation, it's the accepted practice
to then not provide the address in "reg" (keep it 0) though while
providing a flag indicating the address is dynamically allocated, and
then, to provide a separate "assigned-addresses" property that
@ -711,7 +701,7 @@ prom_parse.c file of the recent kernels for your bus type.
The "reg" property only defines addresses and sizes (if #size-cells is
non-0) within a given bus. In order to translate addresses upward
(that is into parent bus addresses, and possibly into CPU physical
addresses), all busses must contain a "ranges" property. If the
addresses), all buses must contain a "ranges" property. If the
"ranges" property is missing at a given level, it's assumed that
translation isn't possible, i.e., the registers are not visible on the
parent bus. The format of the "ranges" property for a bus is a list
@ -727,9 +717,9 @@ example, for a PCI host controller, that would be a CPU address. For a
PCI<->ISA bridge, that would be a PCI address. It defines the base
address in the parent bus where the beginning of that range is mapped.
For a new 64-bit powerpc board, I recommend either the 2/2 format or
For new 64-bit board support, I recommend either the 2/2 format or
Apple's 2/1 format which is slightly more compact since sizes usually
fit in a single 32-bit word. New 32-bit powerpc boards should use a
fit in a single 32-bit word. New 32-bit board support should use a
1/1 format, unless the processor supports physical addresses greater
than 32-bits, in which case a 2/1 format is recommended.
@ -754,7 +744,7 @@ of their actual names.
While earlier users of Open Firmware like OldWorld macintoshes tended
to use the actual device name for the "name" property, it's nowadays
considered a good practice to use a name that is closer to the device
class (often equal to device_type). For example, nowadays, ethernet
class (often equal to device_type). For example, nowadays, Ethernet
controllers are named "ethernet", an additional "model" property
defining precisely the chip type/model, and "compatible" property
defining the family in case a single driver can driver more than one
@ -772,7 +762,7 @@ is present).
4) Note about node and property names and character set
-------------------------------------------------------
While open firmware provides more flexible usage of 8859-1, this
While Open Firmware provides more flexible usage of 8859-1, this
specification enforces more strict rules. Nodes and properties should
be comprised only of ASCII characters 'a' to 'z', '0' to
'9', ',', '.', '_', '+', '#', '?', and '-'. Node names additionally
@ -792,7 +782,7 @@ address which can extend beyond that limit.
--------------------------------
These are all that are currently required. However, it is strongly
recommended that you expose PCI host bridges as documented in the
PCI binding to open firmware, and your interrupt tree as documented
PCI binding to Open Firmware, and your interrupt tree as documented
in OF interrupt tree specification.
a) The root node
@ -802,20 +792,12 @@ address which can extend beyond that limit.
- model : this is your board name/model
- #address-cells : address representation for "root" devices
- #size-cells: the size representation for "root" devices
- device_type : This property shouldn't be necessary. However, if
you decide to create a device_type for your root node, make sure it
is _not_ "chrp" unless your platform is a pSeries or PAPR compliant
one for 64-bit, or a CHRP-type machine for 32-bit as this will
matched by the kernel this way.
Additionally, some recommended properties are:
- compatible : the board "family" generally finds its way here,
for example, if you have 2 board models with a similar layout,
that typically get driven by the same platform code in the
kernel, you would use a different "model" property but put a
value in "compatible". The kernel doesn't directly use that
value but it is generally useful.
kernel, you would specify the exact board model in the
compatible property followed by an entry that represents the SoC
model.
The root node is also generally where you add additional properties
specific to your board like the serial number if any, that sort of
@ -841,8 +823,11 @@ address which can extend beyond that limit.
So under /cpus, you are supposed to create a node for every CPU on
the machine. There is no specific restriction on the name of the
CPU, though It's common practice to call it PowerPC,<name>. For
CPU, though it's common to call it <architecture>,<core>. For
example, Apple uses PowerPC,G5 while IBM uses PowerPC,970FX.
However, the Generic Names convention suggests that it would be
better to simply use 'cpu' for each cpu node and use the compatible
property to identify the specific cpu core.
Required properties:
@ -923,7 +908,7 @@ compatibility.
e) The /chosen node
This node is a bit "special". Normally, that's where open firmware
This node is a bit "special". Normally, that's where Open Firmware
puts some variable environment information, like the arguments, or
the default input/output devices.
@ -940,11 +925,7 @@ compatibility.
console device if any. Typically, if you have serial devices on
your board, you may want to put the full path to the one set as
the default console in the firmware here, for the kernel to pick
it up as its own default console. If you look at the function
set_preferred_console() in arch/ppc64/kernel/setup.c, you'll see
that the kernel tries to find out the default console and has
knowledge of various types like 8250 serial ports. You may want
to extend this function to add your own.
it up as its own default console.
Note that u-boot creates and fills in the chosen node for platforms
that use it.
@ -955,23 +936,23 @@ compatibility.
f) the /soc<SOCname> node
This node is used to represent a system-on-a-chip (SOC) and must be
present if the processor is a SOC. The top-level soc node contains
information that is global to all devices on the SOC. The node name
should contain a unit address for the SOC, which is the base address
of the memory-mapped register set for the SOC. The name of an soc
This node is used to represent a system-on-a-chip (SoC) and must be
present if the processor is a SoC. The top-level soc node contains
information that is global to all devices on the SoC. The node name
should contain a unit address for the SoC, which is the base address
of the memory-mapped register set for the SoC. The name of an SoC
node should start with "soc", and the remainder of the name should
represent the part number for the soc. For example, the MPC8540's
soc node would be called "soc8540".
Required properties:
- device_type : Should be "soc"
- ranges : Should be defined as specified in 1) to describe the
translation of SOC addresses for memory mapped SOC registers.
- bus-frequency: Contains the bus frequency for the SOC node.
translation of SoC addresses for memory mapped SoC registers.
- bus-frequency: Contains the bus frequency for the SoC node.
Typically, the value of this field is filled in by the boot
loader.
- compatible : Exact model of the SoC
Recommended properties:
@ -1155,12 +1136,13 @@ while all this has been defined and implemented.
- An example of code for iterating nodes & retrieving properties
directly from the flattened tree format can be found in the kernel
file arch/ppc64/kernel/prom.c, look at scan_flat_dt() function,
file drivers/of/fdt.c. Look at the of_scan_flat_dt() function,
its usage in early_init_devtree(), and the corresponding various
early_init_dt_scan_*() callbacks. That code can be re-used in a
GPL bootloader, and as the author of that code, I would be happy
to discuss possible free licensing to any vendor who wishes to
integrate all or part of this code into a non-GPL bootloader.
(reference needed; who is 'I' here? ---gcl Jan 31, 2011)
@ -1203,18 +1185,19 @@ MPC8540.
2) Representing devices without a current OF specification
----------------------------------------------------------
Currently, there are many devices on SOCs that do not have a standard
representation pre-defined as part of the open firmware
specifications, mainly because the boards that contain these SOCs are
not currently booted using open firmware. This section contains
descriptions for the SOC devices for which new nodes have been
defined; this list will expand as more and more SOC-containing
platforms are moved over to use the flattened-device-tree model.
Currently, there are many devices on SoCs that do not have a standard
representation defined as part of the Open Firmware specifications,
mainly because the boards that contain these SoCs are not currently
booted using Open Firmware. Binding documentation for new devices
should be added to the Documentation/devicetree/bindings directory.
That directory will expand as device tree support is added to more and
more SoCs.
VII - Specifying interrupt information for devices
===================================================
The device tree represents the busses and devices of a hardware
The device tree represents the buses and devices of a hardware
system in a form similar to the physical bus topology of the
hardware.

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@ -603,3 +603,19 @@ Why: The adm9240, w83792d and w83793 hardware monitoring drivers have
Who: Jean Delvare <khali@linux-fr.org>
----------------------------
What: noswapaccount kernel command line parameter
When: 2.6.40
Why: The original implementation of memsw feature enabled by
CONFIG_CGROUP_MEM_RES_CTLR_SWAP could be disabled by the noswapaccount
kernel parameter (introduced in 2.6.29-rc1). Later on, this decision
turned out to be not ideal because we cannot have the feature compiled
in and disabled by default and let only interested to enable it
(e.g. general distribution kernels might need it). Therefore we have
added swapaccount[=0|1] parameter (introduced in 2.6.37) which provides
the both possibilities. If we remove noswapaccount we will have
less command line parameters with the same functionality and we
can also cleanup the parameter handling a bit ().
Who: Michal Hocko <mhocko@suse.cz>
----------------------------

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@ -187,7 +187,7 @@ tcp_cookie_size - INTEGER
tcp_dsack - BOOLEAN
Allows TCP to send "duplicate" SACKs.
tcp_ecn - BOOLEAN
tcp_ecn - INTEGER
Enable Explicit Congestion Notification (ECN) in TCP. ECN is only
used when both ends of the TCP flow support it. It is useful to
avoid losses due to congestion (when the bottleneck router supports

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@ -1,3 +1,7 @@
Version 15 of schedstats dropped counters for some sched_yield:
yld_exp_empty, yld_act_empty and yld_both_empty. Otherwise, it is
identical to version 14.
Version 14 of schedstats includes support for sched_domains, which hit the
mainline kernel in 2.6.20 although it is identical to the stats from version
12 which was in the kernel from 2.6.13-2.6.19 (version 13 never saw a kernel
@ -28,32 +32,25 @@ to write their own scripts, the fields are described here.
CPU statistics
--------------
cpu<N> 1 2 3 4 5 6 7 8 9 10 11 12
cpu<N> 1 2 3 4 5 6 7 8 9
NOTE: In the sched_yield() statistics, the active queue is considered empty
if it has only one process in it, since obviously the process calling
sched_yield() is that process.
First four fields are sched_yield() statistics:
1) # of times both the active and the expired queue were empty
2) # of times just the active queue was empty
3) # of times just the expired queue was empty
4) # of times sched_yield() was called
First field is a sched_yield() statistic:
1) # of times sched_yield() was called
Next three are schedule() statistics:
5) # of times we switched to the expired queue and reused it
6) # of times schedule() was called
7) # of times schedule() left the processor idle
2) # of times we switched to the expired queue and reused it
3) # of times schedule() was called
4) # of times schedule() left the processor idle
Next two are try_to_wake_up() statistics:
8) # of times try_to_wake_up() was called
9) # of times try_to_wake_up() was called to wake up the local cpu
5) # of times try_to_wake_up() was called
6) # of times try_to_wake_up() was called to wake up the local cpu
Next three are statistics describing scheduling latency:
10) sum of all time spent running by tasks on this processor (in jiffies)
11) sum of all time spent waiting to run by tasks on this processor (in
7) sum of all time spent running by tasks on this processor (in jiffies)
8) sum of all time spent waiting to run by tasks on this processor (in
jiffies)
12) # of timeslices run on this cpu
9) # of timeslices run on this cpu
Domain statistics

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@ -296,6 +296,7 @@ Conexant 5066
=============
laptop Basic Laptop config (default)
hp-laptop HP laptops, e g G60
asus Asus K52JU, Lenovo G560
dell-laptop Dell laptops
dell-vostro Dell Vostro
olpc-xo-1_5 OLPC XO 1.5

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@ -978,6 +978,8 @@ S: Maintained
F: arch/arm/plat-samsung/
F: arch/arm/plat-s3c24xx/
F: arch/arm/plat-s5p/
F: drivers/*/*s3c2410*
F: drivers/*/*/*s3c2410*
ARM/S3C2410 ARM ARCHITECTURE
M: Ben Dooks <ben-linux@fluff.org>
@ -2772,6 +2774,15 @@ F: Documentation/isdn/README.gigaset
F: drivers/isdn/gigaset/
F: include/linux/gigaset_dev.h
GPIO SUBSYSTEM
M: Grant Likely <grant.likely@secretlab.ca>
L: linux-kernel@vger.kernel.org
S: Maintained
T: git git://git.secretlab.ca/git/linux-2.6.git
F: Documentation/gpio/gpio.txt
F: drivers/gpio/
F: include/linux/gpio*
GRETH 10/100/1G Ethernet MAC device driver
M: Kristoffer Glembo <kristoffer@gaisler.com>
L: netdev@vger.kernel.org
@ -4589,7 +4600,7 @@ F: drivers/i2c/busses/i2c-ocores.c
OPEN FIRMWARE AND FLATTENED DEVICE TREE
M: Grant Likely <grant.likely@secretlab.ca>
L: devicetree-discuss@lists.ozlabs.org
L: devicetree-discuss@lists.ozlabs.org (moderated for non-subscribers)
W: http://fdt.secretlab.ca
T: git git://git.secretlab.ca/git/linux-2.6.git
S: Maintained
@ -5549,12 +5560,11 @@ S: Supported
F: drivers/scsi/be2iscsi/
SERVER ENGINES 10Gbps NIC - BladeEngine 2 DRIVER
M: Sathya Perla <sathyap@serverengines.com>
M: Subbu Seetharaman <subbus@serverengines.com>
M: Sarveshwar Bandi <sarveshwarb@serverengines.com>
M: Ajit Khaparde <ajitk@serverengines.com>
M: Sathya Perla <sathya.perla@emulex.com>
M: Subbu Seetharaman <subbu.seetharaman@emulex.com>
M: Ajit Khaparde <ajit.khaparde@emulex.com>
L: netdev@vger.kernel.org
W: http://www.serverengines.com
W: http://www.emulex.com
S: Supported
F: drivers/net/benet/
@ -5614,18 +5624,20 @@ F: include/linux/sfi*.h
SIMTEC EB110ATX (Chalice CATS)
P: Ben Dooks
M: Vincent Sanders <support@simtec.co.uk>
P: Vincent Sanders <vince@simtec.co.uk>
M: Simtec Linux Team <linux@simtec.co.uk>
W: http://www.simtec.co.uk/products/EB110ATX/
S: Supported
SIMTEC EB2410ITX (BAST)
P: Ben Dooks
M: Vincent Sanders <support@simtec.co.uk>
P: Vincent Sanders <vince@simtec.co.uk>
M: Simtec Linux Team <linux@simtec.co.uk>
W: http://www.simtec.co.uk/products/EB2410ITX/
S: Supported
F: arch/arm/mach-s3c2410/
F: drivers/*/*s3c2410*
F: drivers/*/*/*s3c2410*
F: arch/arm/mach-s3c2410/mach-bast.c
F: arch/arm/mach-s3c2410/bast-ide.c
F: arch/arm/mach-s3c2410/bast-irq.c
TI DAVINCI MACHINE SUPPORT
M: Kevin Hilman <khilman@deeprootsystems.com>
@ -6783,12 +6795,12 @@ S: Maintained
F: drivers/net/wireless/wl1251/*
WL1271 WIRELESS DRIVER
M: Luciano Coelho <luciano.coelho@nokia.com>
M: Luciano Coelho <coelho@ti.com>
L: linux-wireless@vger.kernel.org
W: http://wireless.kernel.org
W: http://wireless.kernel.org/en/users/Drivers/wl12xx
T: git git://git.kernel.org/pub/scm/linux/kernel/git/luca/wl12xx.git
S: Maintained
F: drivers/net/wireless/wl12xx/wl1271*
F: drivers/net/wireless/wl12xx/
F: include/linux/wl12xx.h
WL3501 WIRELESS PCMCIA CARD DRIVER

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@ -1,7 +1,7 @@
VERSION = 2
PATCHLEVEL = 6
SUBLEVEL = 38
EXTRAVERSION = -rc3
EXTRAVERSION = -rc4
NAME = Flesh-Eating Bats with Fangs
# *DOCUMENTATION*

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@ -838,7 +838,7 @@ EXPORT_SYMBOL(ep93xx_i2s_release);
static struct resource ep93xx_ac97_resources[] = {
{
.start = EP93XX_AAC_PHYS_BASE,
.end = EP93XX_AAC_PHYS_BASE + 0xb0 - 1,
.end = EP93XX_AAC_PHYS_BASE + 0xac - 1,
.flags = IORESOURCE_MEM,
},
{

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@ -180,7 +180,7 @@ static const uint32_t mx25pdk_keymap[] = {
KEY(3, 3, KEY_POWER),
};
static const struct matrix_keymap_data mx25pdk_keymap_data __initdata = {
static const struct matrix_keymap_data mx25pdk_keymap_data __initconst = {
.keymap = mx25pdk_keymap,
.keymap_size = ARRAY_SIZE(mx25pdk_keymap),
};

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@ -432,7 +432,7 @@ static struct clocksource clocksource_ixp4xx = {
.flags = CLOCK_SOURCE_IS_CONTINUOUS,
};
unsigned long ixp4xx_timer_freq = FREQ;
unsigned long ixp4xx_timer_freq = IXP4XX_TIMER_FREQ;
EXPORT_SYMBOL(ixp4xx_timer_freq);
static void __init ixp4xx_clocksource_init(void)
{
@ -496,7 +496,7 @@ static struct clock_event_device clockevent_ixp4xx = {
static void __init ixp4xx_clockevent_init(void)
{
clockevent_ixp4xx.mult = div_sc(FREQ, NSEC_PER_SEC,
clockevent_ixp4xx.mult = div_sc(IXP4XX_TIMER_FREQ, NSEC_PER_SEC,
clockevent_ixp4xx.shift);
clockevent_ixp4xx.max_delta_ns =
clockevent_delta2ns(0xfffffffe, &clockevent_ixp4xx);

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@ -10,6 +10,7 @@
* 66.66... MHz. We do a convulted calculation of CLOCK_TICK_RATE b/c the
* timer register ignores the bottom 2 bits of the LATCH value.
*/
#define FREQ 66666000
#define CLOCK_TICK_RATE (((FREQ / HZ & ~IXP4XX_OST_RELOAD_MASK) + 1) * HZ)
#define IXP4XX_TIMER_FREQ 66666000
#define CLOCK_TICK_RATE \
(((IXP4XX_TIMER_FREQ / HZ & ~IXP4XX_OST_RELOAD_MASK) + 1) * HZ)

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@ -265,6 +265,11 @@ void qmgr_release_queue(unsigned int queue)
qmgr_queue_descs[queue], queue);
qmgr_queue_descs[queue][0] = '\x0';
#endif
while ((addr = qmgr_get_entry(queue)))
printk(KERN_ERR "qmgr: released queue %i not empty: 0x%08X\n",
queue, addr);
__raw_writel(0, &qmgr_regs->sram[queue]);
used_sram_bitmap[0] &= ~mask[0];
@ -275,10 +280,6 @@ void qmgr_release_queue(unsigned int queue)
spin_unlock_irq(&qmgr_lock);
module_put(THIS_MODULE);
while ((addr = qmgr_get_entry(queue)))
printk(KERN_ERR "qmgr: released queue %i not empty: 0x%08X\n",
queue, addr);
}
static int qmgr_init(void)

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@ -304,7 +304,7 @@ static int name##_set_rate(struct clk *clk, unsigned long rate) \
reg = __raw_readl(CLKCTRL_BASE_ADDR + HW_CLKCTRL_##dr); \
reg &= ~BM_CLKCTRL_##dr##_DIV; \
reg |= div << BP_CLKCTRL_##dr##_DIV; \
if (reg | (1 << clk->enable_shift)) { \
if (reg & (1 << clk->enable_shift)) { \
pr_err("%s: clock is gated\n", __func__); \
return -EINVAL; \
} \
@ -347,7 +347,7 @@ static int name##_set_parent(struct clk *clk, struct clk *parent) \
{ \
if (parent != clk->parent) { \
__raw_writel(BM_CLKCTRL_CLKSEQ_BYPASS_##bit, \
HW_CLKCTRL_CLKSEQ_TOG); \
CLKCTRL_BASE_ADDR + HW_CLKCTRL_CLKSEQ_TOG); \
clk->parent = parent; \
} \
\

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@ -355,12 +355,12 @@ static int name##_set_rate(struct clk *clk, unsigned long rate) \
} else { \
reg &= ~BM_CLKCTRL_##dr##_DIV; \
reg |= div << BP_CLKCTRL_##dr##_DIV; \
if (reg | (1 << clk->enable_shift)) { \
if (reg & (1 << clk->enable_shift)) { \
pr_err("%s: clock is gated\n", __func__); \
return -EINVAL; \
} \
} \
__raw_writel(reg, CLKCTRL_BASE_ADDR + HW_CLKCTRL_CPU); \
__raw_writel(reg, CLKCTRL_BASE_ADDR + HW_CLKCTRL_##dr); \
\
for (i = 10000; i; i--) \
if (!(__raw_readl(CLKCTRL_BASE_ADDR + \
@ -483,7 +483,7 @@ static int name##_set_parent(struct clk *clk, struct clk *parent) \
{ \
if (parent != clk->parent) { \
__raw_writel(BM_CLKCTRL_CLKSEQ_BYPASS_##bit, \
HW_CLKCTRL_CLKSEQ_TOG); \
CLKCTRL_BASE_ADDR + HW_CLKCTRL_CLKSEQ_TOG); \
clk->parent = parent; \
} \
\
@ -609,7 +609,6 @@ static struct clk_lookup lookups[] = {
_REGISTER_CLOCK("duart", NULL, uart_clk)
_REGISTER_CLOCK("imx28-fec.0", NULL, fec_clk)
_REGISTER_CLOCK("imx28-fec.1", NULL, fec_clk)
_REGISTER_CLOCK("fec.0", NULL, fec_clk)
_REGISTER_CLOCK("rtc", NULL, rtc_clk)
_REGISTER_CLOCK("pll2", NULL, pll2_clk)
_REGISTER_CLOCK(NULL, "hclk", hbus_clk)

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@ -57,7 +57,6 @@ static void __clk_disable(struct clk *clk)
if (clk->disable)
clk->disable(clk);
__clk_disable(clk->parent);
__clk_disable(clk->secondary);
}
}
@ -68,7 +67,6 @@ static int __clk_enable(struct clk *clk)
if (clk->usecount++ == 0) {
__clk_enable(clk->parent);
__clk_enable(clk->secondary);
if (clk->enable)
clk->enable(clk);

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@ -139,6 +139,8 @@ static void mxs_gpio_irq_handler(u32 irq, struct irq_desc *desc)
struct mxs_gpio_port *port = (struct mxs_gpio_port *)get_irq_data(irq);
u32 gpio_irq_no_base = port->virtual_irq_start;
desc->irq_data.chip->irq_ack(&desc->irq_data);
irq_stat = __raw_readl(port->base + PINCTRL_IRQSTAT(port->id)) &
__raw_readl(port->base + PINCTRL_IRQEN(port->id));

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@ -29,8 +29,6 @@ struct clk {
int id;
/* Source clock this clk depends on */
struct clk *parent;
/* Secondary clock to enable/disable with this clock */
struct clk *secondary;
/* Reference count of clock enable/disable */
__s8 usecount;
/* Register bit position for clock's enable/disable control. */

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@ -37,7 +37,7 @@ int omap_lcd_dma_running(void)
* On OMAP1510, internal LCD controller will start the transfer
* when it gets enabled, so assume DMA running if LCD enabled.
*/
if (cpu_is_omap1510())
if (cpu_is_omap15xx())
if (omap_readw(OMAP_LCDC_CONTROL) & OMAP_LCDC_CTRL_LCD_EN)
return 1;
@ -95,7 +95,7 @@ EXPORT_SYMBOL(omap_set_lcd_dma_single_transfer);
void omap_set_lcd_dma_b1_rotation(int rotate)
{
if (cpu_is_omap1510()) {
if (cpu_is_omap15xx()) {
printk(KERN_ERR "DMA rotation is not supported in 1510 mode\n");
BUG();
return;
@ -106,7 +106,7 @@ EXPORT_SYMBOL(omap_set_lcd_dma_b1_rotation);
void omap_set_lcd_dma_b1_mirror(int mirror)
{
if (cpu_is_omap1510()) {
if (cpu_is_omap15xx()) {
printk(KERN_ERR "DMA mirror is not supported in 1510 mode\n");
BUG();
}
@ -116,7 +116,7 @@ EXPORT_SYMBOL(omap_set_lcd_dma_b1_mirror);
void omap_set_lcd_dma_b1_vxres(unsigned long vxres)
{
if (cpu_is_omap1510()) {
if (cpu_is_omap15xx()) {
printk(KERN_ERR "DMA virtual resulotion is not supported "
"in 1510 mode\n");
BUG();
@ -127,7 +127,7 @@ EXPORT_SYMBOL(omap_set_lcd_dma_b1_vxres);
void omap_set_lcd_dma_b1_scale(unsigned int xscale, unsigned int yscale)
{
if (cpu_is_omap1510()) {
if (cpu_is_omap15xx()) {
printk(KERN_ERR "DMA scale is not supported in 1510 mode\n");
BUG();
}
@ -177,7 +177,7 @@ static void set_b1_regs(void)
bottom = PIXADDR(lcd_dma.xres - 1, lcd_dma.yres - 1);
/* 1510 DMA requires the bottom address to be 2 more
* than the actual last memory access location. */
if (cpu_is_omap1510() &&
if (cpu_is_omap15xx() &&
lcd_dma.data_type == OMAP_DMA_DATA_TYPE_S32)
bottom += 2;
ei = PIXSTEP(0, 0, 1, 0);
@ -241,7 +241,7 @@ static void set_b1_regs(void)
return; /* Suppress warning about uninitialized vars */
}
if (cpu_is_omap1510()) {
if (cpu_is_omap15xx()) {
omap_writew(top >> 16, OMAP1510_DMA_LCD_TOP_F1_U);
omap_writew(top, OMAP1510_DMA_LCD_TOP_F1_L);
omap_writew(bottom >> 16, OMAP1510_DMA_LCD_BOT_F1_U);
@ -343,7 +343,7 @@ void omap_free_lcd_dma(void)
BUG();
return;
}
if (!cpu_is_omap1510())
if (!cpu_is_omap15xx())
omap_writew(omap_readw(OMAP1610_DMA_LCD_CCR) & ~1,
OMAP1610_DMA_LCD_CCR);
lcd_dma.reserved = 0;
@ -360,7 +360,7 @@ void omap_enable_lcd_dma(void)
* connected. Otherwise the OMAP internal controller will
* start the transfer when it gets enabled.
*/
if (cpu_is_omap1510() || !lcd_dma.ext_ctrl)
if (cpu_is_omap15xx() || !lcd_dma.ext_ctrl)
return;
w = omap_readw(OMAP1610_DMA_LCD_CTRL);
@ -378,14 +378,14 @@ EXPORT_SYMBOL(omap_enable_lcd_dma);
void omap_setup_lcd_dma(void)
{
BUG_ON(lcd_dma.active);
if (!cpu_is_omap1510()) {
if (!cpu_is_omap15xx()) {
/* Set some reasonable defaults */
omap_writew(0x5440, OMAP1610_DMA_LCD_CCR);
omap_writew(0x9102, OMAP1610_DMA_LCD_CSDP);
omap_writew(0x0004, OMAP1610_DMA_LCD_LCH_CTRL);
}
set_b1_regs();
if (!cpu_is_omap1510()) {
if (!cpu_is_omap15xx()) {
u16 w;
w = omap_readw(OMAP1610_DMA_LCD_CCR);
@ -407,7 +407,7 @@ void omap_stop_lcd_dma(void)
u16 w;
lcd_dma.active = 0;
if (cpu_is_omap1510() || !lcd_dma.ext_ctrl)
if (cpu_is_omap15xx() || !lcd_dma.ext_ctrl)
return;
w = omap_readw(OMAP1610_DMA_LCD_CCR);

View File

@ -44,7 +44,6 @@
#include <linux/clocksource.h>
#include <linux/clockchips.h>
#include <linux/io.h>
#include <linux/sched.h>
#include <asm/system.h>
#include <mach/hardware.h>

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@ -115,9 +115,6 @@ static struct omap2_hsmmc_info mmc[] = {
static int devkit8000_panel_enable_lcd(struct omap_dss_device *dssdev)
{
twl_i2c_write_u8(TWL4030_MODULE_GPIO, 0x80, REG_GPIODATADIR1);
twl_i2c_write_u8(TWL4030_MODULE_LED, 0x0, 0x0);
if (gpio_is_valid(dssdev->reset_gpio))
gpio_set_value_cansleep(dssdev->reset_gpio, 1);
return 0;
@ -247,6 +244,8 @@ static struct gpio_led gpio_leds[];
static int devkit8000_twl_gpio_setup(struct device *dev,
unsigned gpio, unsigned ngpio)
{
int ret;
omap_mux_init_gpio(29, OMAP_PIN_INPUT);
/* gpio + 0 is "mmc0_cd" (input/IRQ) */
mmc[0].gpio_cd = gpio + 0;
@ -255,17 +254,23 @@ static int devkit8000_twl_gpio_setup(struct device *dev,
/* TWL4030_GPIO_MAX + 1 == ledB, PMU_STAT (out, active low LED) */
gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1;
/* gpio + 1 is "LCD_PWREN" (out, active high) */
devkit8000_lcd_device.reset_gpio = gpio + 1;
gpio_request(devkit8000_lcd_device.reset_gpio, "LCD_PWREN");
/* Disable until needed */
gpio_direction_output(devkit8000_lcd_device.reset_gpio, 0);
/* TWL4030_GPIO_MAX + 0 is "LCD_PWREN" (out, active high) */
devkit8000_lcd_device.reset_gpio = gpio + TWL4030_GPIO_MAX + 0;
ret = gpio_request_one(devkit8000_lcd_device.reset_gpio,
GPIOF_DIR_OUT | GPIOF_INIT_LOW, "LCD_PWREN");
if (ret < 0) {
devkit8000_lcd_device.reset_gpio = -EINVAL;
printk(KERN_ERR "Failed to request GPIO for LCD_PWRN\n");
}
/* gpio + 7 is "DVI_PD" (out, active low) */
devkit8000_dvi_device.reset_gpio = gpio + 7;
gpio_request(devkit8000_dvi_device.reset_gpio, "DVI PowerDown");
/* Disable until needed */
gpio_direction_output(devkit8000_dvi_device.reset_gpio, 0);
ret = gpio_request_one(devkit8000_dvi_device.reset_gpio,
GPIOF_DIR_OUT | GPIOF_INIT_LOW, "DVI PowerDown");
if (ret < 0) {
devkit8000_dvi_device.reset_gpio = -EINVAL;
printk(KERN_ERR "Failed to request GPIO for DVI PowerDown\n");
}
return 0;
}

View File

@ -409,8 +409,6 @@ static void __init omap4_panda_init(void)
platform_add_devices(panda_devices, ARRAY_SIZE(panda_devices));
omap_serial_init();
omap4_twl6030_hsmmc_init(mmc);
/* OMAP4 Panda uses internal transceiver so register nop transceiver */
usb_nop_xceiv_register();
omap4_ehci_init();
usb_musb_init(&musb_board_data);
}

View File

@ -40,9 +40,6 @@ static struct regulator_consumer_supply rm680_vemmc_consumers[] = {
static struct regulator_init_data rm680_vemmc = {
.constraints = {
.name = "rm680_vemmc",
.min_uV = 2900000,
.max_uV = 2900000,
.apply_uV = 1,
.valid_modes_mask = REGULATOR_MODE_NORMAL
| REGULATOR_MODE_STANDBY,
.valid_ops_mask = REGULATOR_CHANGE_STATUS

View File

@ -1000,6 +1000,7 @@ int __init omap_mux_init(const char *name, u32 flags,
if (!partition->base) {
pr_err("%s: Could not ioremap mux partition at 0x%08x\n",
__func__, partition->phys);
kfree(partition);
return -ENODEV;
}

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@ -168,9 +168,10 @@ static void omap3_core_restore_context(void)
* once during boot sequence, but this works as we are not using secure
* services.
*/
static void omap3_save_secure_ram_context(u32 target_mpu_state)
static void omap3_save_secure_ram_context(void)
{
u32 ret;
int mpu_next_state = pwrdm_read_next_pwrst(mpu_pwrdm);
if (omap_type() != OMAP2_DEVICE_TYPE_GP) {
/*
@ -181,7 +182,7 @@ static void omap3_save_secure_ram_context(u32 target_mpu_state)
pwrdm_set_next_pwrst(mpu_pwrdm, PWRDM_POWER_ON);
ret = _omap_save_secure_sram((u32 *)
__pa(omap3_secure_ram_storage));
pwrdm_set_next_pwrst(mpu_pwrdm, target_mpu_state);
pwrdm_set_next_pwrst(mpu_pwrdm, mpu_next_state);
/* Following is for error tracking, it should not happen */
if (ret) {
printk(KERN_ERR "save_secure_sram() returns %08x\n",
@ -1094,7 +1095,7 @@ static int __init omap3_pm_init(void)
local_fiq_disable();
omap_dma_global_context_save();
omap3_save_secure_ram_context(PWRDM_POWER_ON);
omap3_save_secure_ram_context();
omap_dma_global_context_restore();
local_irq_enable();

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@ -780,8 +780,7 @@ static int omap_sr_autocomp_show(void *data, u64 *val)
struct omap_sr *sr_info = (struct omap_sr *) data;
if (!sr_info) {
pr_warning("%s: omap_sr struct for sr_%s not found\n",
__func__, sr_info->voltdm->name);
pr_warning("%s: omap_sr struct not found\n", __func__);
return -EINVAL;
}
@ -795,8 +794,7 @@ static int omap_sr_autocomp_store(void *data, u64 val)
struct omap_sr *sr_info = (struct omap_sr *) data;
if (!sr_info) {
pr_warning("%s: omap_sr struct for sr_%s not found\n",
__func__, sr_info->voltdm->name);
pr_warning("%s: omap_sr struct not found\n", __func__);
return -EINVAL;
}
@ -834,7 +832,8 @@ static int __init omap_sr_probe(struct platform_device *pdev)
if (!pdata) {
dev_err(&pdev->dev, "%s: platform data missing\n", __func__);
return -EINVAL;
ret = -EINVAL;
goto err_free_devinfo;
}
mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
@ -966,7 +965,7 @@ static int __devexit omap_sr_remove(struct platform_device *pdev)
}
sr_info = _sr_lookup(pdata->voltdm);
if (!sr_info) {
if (IS_ERR(sr_info)) {
dev_warn(&pdev->dev, "%s: omap_sr struct not found\n",
__func__);
return -EINVAL;

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@ -471,6 +471,7 @@ static void __init vdd_debugfs_init(struct omap_vdd_info *vdd)
strcat(name, vdd->voltdm.name);
vdd->debug_dir = debugfs_create_dir(name, voltage_dir);
kfree(name);
if (IS_ERR(vdd->debug_dir)) {
pr_warning("%s: Unable to create debugfs directory for"
" vdd_%s\n", __func__, vdd->voltdm.name);

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@ -122,6 +122,7 @@ config MACH_SMDKV310
select S3C_DEV_HSMMC2
select S3C_DEV_HSMMC3
select S5PV310_DEV_PD
select S5PV310_DEV_SYSMMU
select S5PV310_SETUP_I2C1
select S5PV310_SETUP_SDHCI
help

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@ -124,8 +124,6 @@
#define S5PV310_PA_SYSMMU_TV 0x12E20000
#define S5PV310_PA_SYSMMU_MFC_L 0x13620000
#define S5PV310_PA_SYSMMU_MFC_R 0x13630000
#define S5PV310_SYSMMU_TOTAL_IPNUM 16
#define S5P_SYSMMU_TOTAL_IPNUM S5PV310_SYSMMU_TOTAL_IPNUM
/* compatibiltiy defines. */
#define S3C_PA_UART S5PV310_PA_UART

View File

@ -13,6 +13,9 @@
#ifndef __ASM_ARM_ARCH_SYSMMU_H
#define __ASM_ARM_ARCH_SYSMMU_H __FILE__
#define S5PV310_SYSMMU_TOTAL_IPNUM 16
#define S5P_SYSMMU_TOTAL_IPNUM S5PV310_SYSMMU_TOTAL_IPNUM
enum s5pv310_sysmmu_ips {
SYSMMU_MDMA,
SYSMMU_SSS,
@ -32,7 +35,7 @@ enum s5pv310_sysmmu_ips {
SYSMMU_MFC_R,
};
static char *sysmmu_ips_name[S5P_SYSMMU_TOTAL_IPNUM] = {
static char *sysmmu_ips_name[S5PV310_SYSMMU_TOTAL_IPNUM] = {
"SYSMMU_MDMA" ,
"SYSMMU_SSS" ,
"SYSMMU_FIMC0" ,

View File

@ -95,6 +95,7 @@ static __inline__ void __arch_decomp_setup(unsigned long arch_id)
case MACH_TYPE_MX35_3DS:
case MACH_TYPE_PCM043:
case MACH_TYPE_LILLY1131:
case MACH_TYPE_VPR200:
uart_base = MX3X_UART1_BASE_ADDR;
break;
case MACH_TYPE_MAGX_ZN5:
@ -102,6 +103,7 @@ static __inline__ void __arch_decomp_setup(unsigned long arch_id)
break;
case MACH_TYPE_MX51_BABBAGE:
case MACH_TYPE_EUKREA_CPUIMX51SD:
case MACH_TYPE_MX51_3DS:
uart_base = MX51_UART1_BASE_ADDR;
break;
case MACH_TYPE_MX50_RDP:

View File

@ -37,6 +37,14 @@ config S5P_GPIO_INT
help
Common code for the GPIO interrupts (other than external interrupts.)
comment "System MMU"
config S5P_SYSTEM_MMU
bool "S5P SYSTEM MMU"
depends on ARCH_S5PV310
help
Say Y here if you want to enable System MMU
config S5P_DEV_FIMC0
bool
help
@ -66,19 +74,3 @@ config S5P_DEV_CSIS1
bool
help
Compile in platform device definitions for MIPI-CSIS channel 1
menuconfig S5P_SYSMMU
bool "SYSMMU support"
depends on ARCH_S5PV310
help
This is a System MMU driver for Samsung ARM based Soc.
if S5P_SYSMMU
config S5P_SYSMMU_DEBUG
bool "Enables debug messages"
depends on S5P_SYSMMU
help
This enables SYSMMU driver debug massages.
endif

View File

@ -19,6 +19,7 @@ obj-y += clock.o
obj-y += irq.o
obj-$(CONFIG_S5P_EXT_INT) += irq-eint.o
obj-$(CONFIG_S5P_GPIO_INT) += irq-gpioint.o
obj-$(CONFIG_S5P_SYSTEM_MMU) += sysmmu.o
obj-$(CONFIG_PM) += pm.o
obj-$(CONFIG_PM) += irq-pm.o
@ -30,4 +31,3 @@ obj-$(CONFIG_S5P_DEV_FIMC2) += dev-fimc2.o
obj-$(CONFIG_S5P_DEV_ONENAND) += dev-onenand.o
obj-$(CONFIG_S5P_DEV_CSIS0) += dev-csis0.o
obj-$(CONFIG_S5P_DEV_CSIS1) += dev-csis1.o
obj-$(CONFIG_S5P_SYSMMU) += sysmmu.o

View File

@ -1,23 +0,0 @@
/* linux/arch/arm/plat-s5p/include/plat/sysmmu.h
*
* Copyright (c) 2010 Samsung Electronics Co., Ltd.
* http://www.samsung.com/
*
* Samsung sysmmu driver
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef __ASM_PLAT_S5P_SYSMMU_H
#define __ASM_PLAT_S5P_SYSMMU_H __FILE__
/* debug macro */
#ifdef CONFIG_S5P_SYSMMU_DEBUG
#define sysmmu_debug(fmt, arg...) printk(KERN_INFO "[%s] " fmt, __func__, ## arg)
#else
#define sysmmu_debug(fmt, arg...) do { } while (0)
#endif
#endif /* __ASM_PLAT_S5P_SYSMMU_H */

View File

@ -16,8 +16,6 @@
#include <mach/regs-sysmmu.h>
#include <mach/sysmmu.h>
#include <plat/sysmmu.h>
struct sysmmu_controller s5p_sysmmu_cntlrs[S5P_SYSMMU_TOTAL_IPNUM];
void s5p_sysmmu_register(struct sysmmu_controller *sysmmuconp)
@ -123,7 +121,7 @@ static int s5p_sysmmu_set_tablebase(sysmmu_ips ips)
: "=r" (pg) : : "cc"); \
pg &= ~0x3fff;
sysmmu_debug("CP15 TTBR0 : 0x%x\n", pg);
printk(KERN_INFO "%s: CP15 TTBR0 : 0x%x\n", __func__, pg);
/* Set sysmmu page table base address */
__raw_writel(pg, sysmmuconp->regs + S5P_PT_BASE_ADDR);

View File

@ -17,6 +17,8 @@
#include <linux/irq.h>
struct sys_device;
#ifdef CONFIG_PM
extern __init int s3c_pm_init(void);

View File

@ -12,7 +12,7 @@
#
# http://www.arm.linux.org.uk/developer/machines/?action=new
#
# Last update: Sun Dec 12 23:24:27 2010
# Last update: Mon Feb 7 08:59:27 2011
#
# machine_is_xxx CONFIG_xxxx MACH_TYPE_xxx number
#
@ -2240,7 +2240,7 @@ arm_ultimator2 MACH_ARM_ULTIMATOR2 ARM_ULTIMATOR2 2250
vs_v210 MACH_VS_V210 VS_V210 2252
vs_v212 MACH_VS_V212 VS_V212 2253
hmt MACH_HMT HMT 2254
suen3 MACH_SUEN3 SUEN3 2255
km_kirkwood MACH_KM_KIRKWOOD KM_KIRKWOOD 2255
vesper MACH_VESPER VESPER 2256
str9 MACH_STR9 STR9 2257
omap3_wl_ff MACH_OMAP3_WL_FF OMAP3_WL_FF 2258
@ -2987,7 +2987,7 @@ pxwnas_500_1000 MACH_PXWNAS_500_1000 PXWNAS_500_1000 3001
ea20 MACH_EA20 EA20 3002
awm2 MACH_AWM2 AWM2 3003
ti8148evm MACH_TI8148EVM TI8148EVM 3004
tegra_seaboard MACH_TEGRA_SEABOARD TEGRA_SEABOARD 3005
seaboard MACH_SEABOARD SEABOARD 3005
linkstation_chlv2 MACH_LINKSTATION_CHLV2 LINKSTATION_CHLV2 3006
tera_pro2_rack MACH_TERA_PRO2_RACK TERA_PRO2_RACK 3007
rubys MACH_RUBYS RUBYS 3008
@ -3190,7 +3190,7 @@ synergy MACH_SYNERGY SYNERGY 3205
ics_if_voip MACH_ICS_IF_VOIP ICS_IF_VOIP 3206
wlf_cragg_6410 MACH_WLF_CRAGG_6410 WLF_CRAGG_6410 3207
punica MACH_PUNICA PUNICA 3208
sbc_nt250 MACH_SBC_NT250 SBC_NT250 3209
trimslice MACH_TRIMSLICE TRIMSLICE 3209
mx27_wmultra MACH_MX27_WMULTRA MX27_WMULTRA 3210
mackerel MACH_MACKEREL MACKEREL 3211
fa9x27 MACH_FA9X27 FA9X27 3213
@ -3219,3 +3219,100 @@ pivicc MACH_PIVICC PIVICC 3235
pcm048 MACH_PCM048 PCM048 3236
dds MACH_DDS DDS 3237
chalten_xa1 MACH_CHALTEN_XA1 CHALTEN_XA1 3238
ts48xx MACH_TS48XX TS48XX 3239
tonga2_tfttimer MACH_TONGA2_TFTTIMER TONGA2_TFTTIMER 3240
whistler MACH_WHISTLER WHISTLER 3241
asl_phoenix MACH_ASL_PHOENIX ASL_PHOENIX 3242
at91sam9263otlite MACH_AT91SAM9263OTLITE AT91SAM9263OTLITE 3243
ddplug MACH_DDPLUG DDPLUG 3244
d2plug MACH_D2PLUG D2PLUG 3245
kzm9d MACH_KZM9D KZM9D 3246
verdi_lte MACH_VERDI_LTE VERDI_LTE 3247
nanozoom MACH_NANOZOOM NANOZOOM 3248
dm3730_som_lv MACH_DM3730_SOM_LV DM3730_SOM_LV 3249
dm3730_torpedo MACH_DM3730_TORPEDO DM3730_TORPEDO 3250
anchovy MACH_ANCHOVY ANCHOVY 3251
re2rev20 MACH_RE2REV20 RE2REV20 3253
re2rev21 MACH_RE2REV21 RE2REV21 3254
cns21xx MACH_CNS21XX CNS21XX 3255
rider MACH_RIDER RIDER 3257
nsk330 MACH_NSK330 NSK330 3258
cns2133evb MACH_CNS2133EVB CNS2133EVB 3259
z3_816x_mod MACH_Z3_816X_MOD Z3_816X_MOD 3260
z3_814x_mod MACH_Z3_814X_MOD Z3_814X_MOD 3261
beect MACH_BEECT BEECT 3262
dma_thunderbug MACH_DMA_THUNDERBUG DMA_THUNDERBUG 3263
omn_at91sam9g20 MACH_OMN_AT91SAM9G20 OMN_AT91SAM9G20 3264
mx25_e2s_uc MACH_MX25_E2S_UC MX25_E2S_UC 3265
mione MACH_MIONE MIONE 3266
top9000_tcu MACH_TOP9000_TCU TOP9000_TCU 3267
top9000_bsl MACH_TOP9000_BSL TOP9000_BSL 3268
kingdom MACH_KINGDOM KINGDOM 3269
armadillo460 MACH_ARMADILLO460 ARMADILLO460 3270
lq2 MACH_LQ2 LQ2 3271
sweda_tms2 MACH_SWEDA_TMS2 SWEDA_TMS2 3272
mx53_loco MACH_MX53_LOCO MX53_LOCO 3273
acer_a8 MACH_ACER_A8 ACER_A8 3275
acer_gauguin MACH_ACER_GAUGUIN ACER_GAUGUIN 3276
guppy MACH_GUPPY GUPPY 3277
mx61_ard MACH_MX61_ARD MX61_ARD 3278
tx53 MACH_TX53 TX53 3279
omapl138_case_a3 MACH_OMAPL138_CASE_A3 OMAPL138_CASE_A3 3280
uemd MACH_UEMD UEMD 3281
ccwmx51mut MACH_CCWMX51MUT CCWMX51MUT 3282
rockhopper MACH_ROCKHOPPER ROCKHOPPER 3283
nookcolor MACH_NOOKCOLOR NOOKCOLOR 3284
hkdkc100 MACH_HKDKC100 HKDKC100 3285
ts42xx MACH_TS42XX TS42XX 3286
aebl MACH_AEBL AEBL 3287
wario MACH_WARIO WARIO 3288
gfs_spm MACH_GFS_SPM GFS_SPM 3289
cm_t3730 MACH_CM_T3730 CM_T3730 3290
isc3 MACH_ISC3 ISC3 3291
rascal MACH_RASCAL RASCAL 3292
hrefv60 MACH_HREFV60 HREFV60 3293
tpt_2_0 MACH_TPT_2_0 TPT_2_0 3294
pyramid_td MACH_PYRAMID_TD PYRAMID_TD 3295
splendor MACH_SPLENDOR SPLENDOR 3296
guf_planet MACH_GUF_PLANET GUF_PLANET 3297
msm8x60_qt MACH_MSM8X60_QT MSM8X60_QT 3298
htc_hd_mini MACH_HTC_HD_MINI HTC_HD_MINI 3299
athene MACH_ATHENE ATHENE 3300
deep_r_ek_1 MACH_DEEP_R_EK_1 DEEP_R_EK_1 3301
vivow_ct MACH_VIVOW_CT VIVOW_CT 3302
nery_1000 MACH_NERY_1000 NERY_1000 3303
rfl109145_ssrv MACH_RFL109145_SSRV RFL109145_SSRV 3304
nmh MACH_NMH NMH 3305
wn802t MACH_WN802T WN802T 3306
dragonet MACH_DRAGONET DRAGONET 3307
geneva_b MACH_GENEVA_B GENEVA_B 3308
at91sam9263desk16l MACH_AT91SAM9263DESK16L AT91SAM9263DESK16L 3309
bcmhana_sv MACH_BCMHANA_SV BCMHANA_SV 3310
bcmhana_tablet MACH_BCMHANA_TABLET BCMHANA_TABLET 3311
koi MACH_KOI KOI 3312
ts4800 MACH_TS4800 TS4800 3313
tqma9263 MACH_TQMA9263 TQMA9263 3314
holiday MACH_HOLIDAY HOLIDAY 3315
dma_6410 MACH_DMA6410 DMA6410 3316
pcats_overlay MACH_PCATS_OVERLAY PCATS_OVERLAY 3317
hwgw6410 MACH_HWGW6410 HWGW6410 3318
shenzhou MACH_SHENZHOU SHENZHOU 3319
cwme9210 MACH_CWME9210 CWME9210 3320
cwme9210js MACH_CWME9210JS CWME9210JS 3321
pgs_v1 MACH_PGS_SITARA PGS_SITARA 3322
colibri_tegra2 MACH_COLIBRI_TEGRA2 COLIBRI_TEGRA2 3323
w21 MACH_W21 W21 3324
polysat1 MACH_POLYSAT1 POLYSAT1 3325
dataway MACH_DATAWAY DATAWAY 3326
cobral138 MACH_COBRAL138 COBRAL138 3327
roverpcs8 MACH_ROVERPCS8 ROVERPCS8 3328
marvelc MACH_MARVELC MARVELC 3329
navefihid MACH_NAVEFIHID NAVEFIHID 3330
dm365_cv100 MACH_DM365_CV100 DM365_CV100 3331
able MACH_ABLE ABLE 3332
legacy MACH_LEGACY LEGACY 3333
icong MACH_ICONG ICONG 3334
rover_g8 MACH_ROVER_G8 ROVER_G8 3335
t5388p MACH_T5388P T5388P 3336
dingo MACH_DINGO DINGO 3337
goflexhome MACH_GOFLEXHOME GOFLEXHOME 3338

View File

@ -10,6 +10,7 @@
#define __BFIN_ASM_SERIAL_H__
#include <linux/serial_core.h>
#include <linux/spinlock.h>
#include <mach/anomaly.h>
#include <mach/bfin_serial.h>
@ -41,6 +42,7 @@ struct bfin_serial_port {
struct circ_buf rx_dma_buf;
struct timer_list rx_dma_timer;
int rx_dma_nrows;
spinlock_t rx_lock;
unsigned int tx_dma_channel;
unsigned int rx_dma_channel;
struct work_struct tx_dma_workqueue;

View File

@ -80,7 +80,7 @@ asmlinkage unsigned int do_IRQ(int irq, struct pt_regs *regs)
#ifdef CONFIG_DEBUG_STACKOVERFLOW
/* FIXME M32R */
#endif
__do_IRQ(irq);
generic_handle_irq(irq);
irq_exit();
set_irq_regs(old_regs);

View File

@ -12,7 +12,7 @@
#include <linux/types.h>
#include <asm/registers.h>
#ifdef CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR
#if CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR
static inline unsigned long arch_local_irq_save(void)
{

View File

@ -411,20 +411,19 @@ static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
static inline unsigned long pte_update(pte_t *p, unsigned long clr,
unsigned long set)
{
unsigned long old, tmp, msr;
unsigned long flags, old, tmp;
__asm__ __volatile__("\
msrclr %2, 0x2\n\
nop\n\
lw %0, %4, r0\n\
andn %1, %0, %5\n\
or %1, %1, %6\n\
sw %1, %4, r0\n\
mts rmsr, %2\n\
nop"
: "=&r" (old), "=&r" (tmp), "=&r" (msr), "=m" (*p)
: "r" ((unsigned long)(p + 1) - 4), "r" (clr), "r" (set), "m" (*p)
: "cc");
raw_local_irq_save(flags);
__asm__ __volatile__( "lw %0, %2, r0 \n"
"andn %1, %0, %3 \n"
"or %1, %1, %4 \n"
"sw %1, %2, r0 \n"
: "=&r" (old), "=&r" (tmp)
: "r" ((unsigned long)(p + 1) - 4), "r" (clr), "r" (set)
: "cc");
raw_local_irq_restore(flags);
return old;
}

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