ASoC: Intel: add sst shim register start-end variables
the shim registers start and end can be useful while parsing the shim addresses, so add these Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@linaro.org>
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@ -53,6 +53,10 @@
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#define SST_CSR2 0x80
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#define SST_CSR2 0x80
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#define SST_LTRC 0xE0
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#define SST_LTRC 0xE0
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#define SST_HDMC 0xE8
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#define SST_HDMC 0xE8
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#define SST_SHIM_BEGIN SST_CSR
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#define SST_SHIM_END SST_HDMC
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#define SST_DBGO 0xF0
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#define SST_DBGO 0xF0
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#define SST_SHIM_SIZE 0x100
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#define SST_SHIM_SIZE 0x100
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