[BNX2]: Add indirect spinlock.
The indirect register access method will be used by more than one caller in BH context (NAPI poll and timer), so a spinlock is required. Signed-off-by: Michael Chan <mchan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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27a005b883
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1b8227c48e
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@ -234,21 +234,29 @@ static inline u32 bnx2_tx_avail(struct bnx2 *bp)
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static u32
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static u32
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bnx2_reg_rd_ind(struct bnx2 *bp, u32 offset)
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bnx2_reg_rd_ind(struct bnx2 *bp, u32 offset)
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{
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{
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u32 val;
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spin_lock_bh(&bp->indirect_lock);
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REG_WR(bp, BNX2_PCICFG_REG_WINDOW_ADDRESS, offset);
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REG_WR(bp, BNX2_PCICFG_REG_WINDOW_ADDRESS, offset);
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return (REG_RD(bp, BNX2_PCICFG_REG_WINDOW));
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val = REG_RD(bp, BNX2_PCICFG_REG_WINDOW);
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spin_unlock_bh(&bp->indirect_lock);
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return val;
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}
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}
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static void
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static void
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bnx2_reg_wr_ind(struct bnx2 *bp, u32 offset, u32 val)
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bnx2_reg_wr_ind(struct bnx2 *bp, u32 offset, u32 val)
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{
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{
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spin_lock_bh(&bp->indirect_lock);
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REG_WR(bp, BNX2_PCICFG_REG_WINDOW_ADDRESS, offset);
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REG_WR(bp, BNX2_PCICFG_REG_WINDOW_ADDRESS, offset);
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REG_WR(bp, BNX2_PCICFG_REG_WINDOW, val);
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REG_WR(bp, BNX2_PCICFG_REG_WINDOW, val);
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spin_unlock_bh(&bp->indirect_lock);
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}
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}
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static void
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static void
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bnx2_ctx_wr(struct bnx2 *bp, u32 cid_addr, u32 offset, u32 val)
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bnx2_ctx_wr(struct bnx2 *bp, u32 cid_addr, u32 offset, u32 val)
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{
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{
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offset += cid_addr;
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offset += cid_addr;
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spin_lock_bh(&bp->indirect_lock);
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if (CHIP_NUM(bp) == CHIP_NUM_5709) {
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if (CHIP_NUM(bp) == CHIP_NUM_5709) {
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int i;
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int i;
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@ -266,6 +274,7 @@ bnx2_ctx_wr(struct bnx2 *bp, u32 cid_addr, u32 offset, u32 val)
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REG_WR(bp, BNX2_CTX_DATA_ADR, offset);
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REG_WR(bp, BNX2_CTX_DATA_ADR, offset);
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REG_WR(bp, BNX2_CTX_DATA, val);
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REG_WR(bp, BNX2_CTX_DATA, val);
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}
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}
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spin_unlock_bh(&bp->indirect_lock);
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}
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}
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static int
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static int
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@ -6039,6 +6048,7 @@ bnx2_init_board(struct pci_dev *pdev, struct net_device *dev)
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bp->pdev = pdev;
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bp->pdev = pdev;
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spin_lock_init(&bp->phy_lock);
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spin_lock_init(&bp->phy_lock);
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spin_lock_init(&bp->indirect_lock);
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INIT_WORK(&bp->reset_task, bnx2_reset_task);
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INIT_WORK(&bp->reset_task, bnx2_reset_task);
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dev->base_addr = dev->mem_start = pci_resource_start(pdev, 0);
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dev->base_addr = dev->mem_start = pci_resource_start(pdev, 0);
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@ -6522,6 +6522,7 @@ struct bnx2 {
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/* Used to synchronize phy accesses. */
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/* Used to synchronize phy accesses. */
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spinlock_t phy_lock;
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spinlock_t phy_lock;
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spinlock_t indirect_lock;
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u32 phy_flags;
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u32 phy_flags;
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#define PHY_SERDES_FLAG 1
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#define PHY_SERDES_FLAG 1
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