Merge branch 'stmmac-OXNAS'
Neil Armstrong says: ==================== net: stmmac: Add OXNAS DWMAC Glue This patchset add support for the Sysnopsys DWMAC Gigabit Ethernet controller Glue layer of the Oxford Semiconductor OX820 SoC. Changes since v2 at http://lkml.kernel.org/r/20161031105345.16711-1-narmstrong@baylibre.com : - Disable/Unprepare clock if regmap read fails in oxnas_dwmac_init Changes since v1 at https://patchwork.kernel.org/patch/9388231/ : - Split dt-bindings in a separate patch - Add IP version in the dt-bindings compatible - Check return of clk_prepare_enable() - use get_stmmac_bsp_priv() helper - hardwire setup values in oxnas_dwmac_init() Changes since RFC at https://patchwork.kernel.org/patch/9387257 : - Drop init/exit callbacks - Implement proper remove and PM callback - Call init from probe - Disable/Unprepare clock if stmmac probe fails ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
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* Oxford Semiconductor OXNAS DWMAC Ethernet controller
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The device inherits all the properties of the dwmac/stmmac devices
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described in the file stmmac.txt in the current directory with the
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following changes.
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Required properties on all platforms:
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- compatible: For the OX820 SoC, it should be :
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- "oxsemi,ox820-dwmac" to select glue
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- "snps,dwmac-3.512" to select IP version.
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- clocks: Should contain phandles to the following clocks
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- clock-names: Should contain the following:
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- "stmmaceth" for the host clock - see stmmac.txt
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- "gmac" for the peripheral gate clock
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- oxsemi,sys-ctrl: a phandle to the system controller syscon node
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Example :
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etha: ethernet@40400000 {
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compatible = "oxsemi,ox820-dwmac", "snps,dwmac-3.512";
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reg = <0x40400000 0x2000>;
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interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "macirq", "eth_wake_irq";
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mac-address = [000000000000]; /* Filled in by U-Boot */
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phy-mode = "rgmii";
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clocks = <&stdclk CLK_820_ETHA>, <&gmacclk>;
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clock-names = "gmac", "stmmaceth";
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resets = <&reset RESET_MAC>;
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/* Regmap for sys registers */
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oxsemi,sys-ctrl = <&sys>;
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status = "disabled";
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};
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@ -69,6 +69,17 @@ config DWMAC_MESON
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the stmmac device driver. This driver is used for Meson6,
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Meson8, Meson8b and GXBB SoCs.
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config DWMAC_OXNAS
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tristate "Oxford Semiconductor OXNAS dwmac support"
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default ARCH_OXNAS
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depends on OF && COMMON_CLK && (ARCH_OXNAS || COMPILE_TEST)
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select MFD_SYSCON
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help
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Support for Ethernet controller on Oxford Semiconductor OXNAS SoCs.
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This selects the Oxford Semiconductor OXNASSoC glue layer support for
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the stmmac device driver. This driver is used for OX820.
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config DWMAC_ROCKCHIP
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tristate "Rockchip dwmac support"
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default ARCH_ROCKCHIP
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@ -10,6 +10,7 @@ obj-$(CONFIG_STMMAC_PLATFORM) += stmmac-platform.o
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obj-$(CONFIG_DWMAC_IPQ806X) += dwmac-ipq806x.o
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obj-$(CONFIG_DWMAC_LPC18XX) += dwmac-lpc18xx.o
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obj-$(CONFIG_DWMAC_MESON) += dwmac-meson.o dwmac-meson8b.o
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obj-$(CONFIG_DWMAC_OXNAS) += dwmac-oxnas.o
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obj-$(CONFIG_DWMAC_ROCKCHIP) += dwmac-rk.o
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obj-$(CONFIG_DWMAC_SOCFPGA) += dwmac-altr-socfpga.o
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obj-$(CONFIG_DWMAC_STI) += dwmac-sti.o
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/*
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* Oxford Semiconductor OXNAS DWMAC glue layer
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*
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* Copyright (C) 2016 Neil Armstrong <narmstrong@baylibre.com>
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* Copyright (C) 2014 Daniel Golle <daniel@makrotopia.org>
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* Copyright (C) 2013 Ma Haijun <mahaijuns@gmail.com>
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* Copyright (C) 2012 John Crispin <blogic@openwrt.org>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <linux/device.h>
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/platform_device.h>
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#include <linux/regmap.h>
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#include <linux/mfd/syscon.h>
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#include <linux/stmmac.h>
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#include "stmmac_platform.h"
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/* System Control regmap offsets */
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#define OXNAS_DWMAC_CTRL_REGOFFSET 0x78
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#define OXNAS_DWMAC_DELAY_REGOFFSET 0x100
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/* Control Register */
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#define DWMAC_CKEN_RX_IN 14
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#define DWMAC_CKEN_RXN_OUT 13
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#define DWMAC_CKEN_RX_OUT 12
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#define DWMAC_CKEN_TX_IN 10
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#define DWMAC_CKEN_TXN_OUT 9
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#define DWMAC_CKEN_TX_OUT 8
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#define DWMAC_RX_SOURCE 7
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#define DWMAC_TX_SOURCE 6
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#define DWMAC_LOW_TX_SOURCE 4
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#define DWMAC_AUTO_TX_SOURCE 3
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#define DWMAC_RGMII 2
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#define DWMAC_SIMPLE_MUX 1
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#define DWMAC_CKEN_GTX 0
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/* Delay register */
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#define DWMAC_TX_VARDELAY_SHIFT 0
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#define DWMAC_TXN_VARDELAY_SHIFT 8
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#define DWMAC_RX_VARDELAY_SHIFT 16
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#define DWMAC_RXN_VARDELAY_SHIFT 24
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#define DWMAC_TX_VARDELAY(d) ((d) << DWMAC_TX_VARDELAY_SHIFT)
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#define DWMAC_TXN_VARDELAY(d) ((d) << DWMAC_TXN_VARDELAY_SHIFT)
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#define DWMAC_RX_VARDELAY(d) ((d) << DWMAC_RX_VARDELAY_SHIFT)
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#define DWMAC_RXN_VARDELAY(d) ((d) << DWMAC_RXN_VARDELAY_SHIFT)
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struct oxnas_dwmac {
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struct device *dev;
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struct clk *clk;
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struct regmap *regmap;
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};
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static int oxnas_dwmac_init(struct oxnas_dwmac *dwmac)
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{
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unsigned int value;
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int ret;
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/* Reset HW here before changing the glue configuration */
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ret = device_reset(dwmac->dev);
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if (ret)
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return ret;
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ret = clk_prepare_enable(dwmac->clk);
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if (ret)
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return ret;
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ret = regmap_read(dwmac->regmap, OXNAS_DWMAC_CTRL_REGOFFSET, &value);
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if (ret < 0) {
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clk_disable_unprepare(dwmac->clk);
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return ret;
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}
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/* Enable GMII_GTXCLK to follow GMII_REFCLK, required for gigabit PHY */
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value |= BIT(DWMAC_CKEN_GTX) |
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/* Use simple mux for 25/125 Mhz clock switching */
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BIT(DWMAC_SIMPLE_MUX) |
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/* set auto switch tx clock source */
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BIT(DWMAC_AUTO_TX_SOURCE) |
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/* enable tx & rx vardelay */
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BIT(DWMAC_CKEN_TX_OUT) |
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BIT(DWMAC_CKEN_TXN_OUT) |
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BIT(DWMAC_CKEN_TX_IN) |
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BIT(DWMAC_CKEN_RX_OUT) |
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BIT(DWMAC_CKEN_RXN_OUT) |
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BIT(DWMAC_CKEN_RX_IN);
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regmap_write(dwmac->regmap, OXNAS_DWMAC_CTRL_REGOFFSET, value);
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/* set tx & rx vardelay */
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value = DWMAC_TX_VARDELAY(4) |
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DWMAC_TXN_VARDELAY(2) |
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DWMAC_RX_VARDELAY(10) |
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DWMAC_RXN_VARDELAY(8);
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regmap_write(dwmac->regmap, OXNAS_DWMAC_DELAY_REGOFFSET, value);
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return 0;
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}
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static int oxnas_dwmac_probe(struct platform_device *pdev)
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{
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struct plat_stmmacenet_data *plat_dat;
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struct stmmac_resources stmmac_res;
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struct device_node *sysctrl;
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struct oxnas_dwmac *dwmac;
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int ret;
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sysctrl = of_parse_phandle(pdev->dev.of_node, "oxsemi,sys-ctrl", 0);
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if (!sysctrl) {
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dev_err(&pdev->dev, "failed to get sys-ctrl node\n");
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return -EINVAL;
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}
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ret = stmmac_get_platform_resources(pdev, &stmmac_res);
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if (ret)
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return ret;
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plat_dat = stmmac_probe_config_dt(pdev, &stmmac_res.mac);
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if (IS_ERR(plat_dat))
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return PTR_ERR(plat_dat);
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dwmac = devm_kzalloc(&pdev->dev, sizeof(*dwmac), GFP_KERNEL);
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if (!dwmac)
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return -ENOMEM;
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dwmac->dev = &pdev->dev;
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plat_dat->bsp_priv = dwmac;
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dwmac->regmap = syscon_node_to_regmap(sysctrl);
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if (IS_ERR(dwmac->regmap)) {
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dev_err(&pdev->dev, "failed to have sysctrl regmap\n");
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return PTR_ERR(dwmac->regmap);
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}
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dwmac->clk = devm_clk_get(&pdev->dev, "gmac");
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if (IS_ERR(dwmac->clk))
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return PTR_ERR(dwmac->clk);
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ret = oxnas_dwmac_init(dwmac);
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if (ret)
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return ret;
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ret = stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res);
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if (ret)
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clk_disable_unprepare(dwmac->clk);
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return ret;
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}
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static int oxnas_dwmac_remove(struct platform_device *pdev)
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{
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struct oxnas_dwmac *dwmac = get_stmmac_bsp_priv(&pdev->dev);
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int ret = stmmac_dvr_remove(&pdev->dev);
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clk_disable_unprepare(dwmac->clk);
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return ret;
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}
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#ifdef CONFIG_PM_SLEEP
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static int oxnas_dwmac_suspend(struct device *dev)
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{
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struct oxnas_dwmac *dwmac = get_stmmac_bsp_priv(dev);
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int ret;
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ret = stmmac_suspend(dev);
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clk_disable_unprepare(dwmac->clk);
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return ret;
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}
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static int oxnas_dwmac_resume(struct device *dev)
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{
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struct oxnas_dwmac *dwmac = get_stmmac_bsp_priv(dev);
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int ret;
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ret = oxnas_dwmac_init(dwmac);
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if (ret)
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return ret;
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ret = stmmac_resume(dev);
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return ret;
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}
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#endif /* CONFIG_PM_SLEEP */
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static SIMPLE_DEV_PM_OPS(oxnas_dwmac_pm_ops,
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oxnas_dwmac_suspend, oxnas_dwmac_resume);
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static const struct of_device_id oxnas_dwmac_match[] = {
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{ .compatible = "oxsemi,ox820-dwmac" },
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{ }
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};
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MODULE_DEVICE_TABLE(of, oxnas_dwmac_match);
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static struct platform_driver oxnas_dwmac_driver = {
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.probe = oxnas_dwmac_probe,
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.remove = oxnas_dwmac_remove,
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.driver = {
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.name = "oxnas-dwmac",
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.pm = &oxnas_dwmac_pm_ops,
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.of_match_table = oxnas_dwmac_match,
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},
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};
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module_platform_driver(oxnas_dwmac_driver);
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MODULE_AUTHOR("Neil Armstrong <narmstrong@baylibre.com>");
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MODULE_DESCRIPTION("Oxford Semiconductor OXNAS DWMAC glue layer");
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MODULE_LICENSE("GPL v2");
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