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Renesas ARM based SoC DT updates for v3.14 

* Global
   - Use interrupt macros
   - Use #include in device tree sources
   - Tidyup DT node naming
 
 * emev2 (Emma Mobile EV2) SoC
   - Setup internal peripheral interrupts as level high
   - Use interrupt macros in DT files
   - Add clock tree description in DT
 
 * r8a7791 (R-Car M2) SoC
   - Correct GPIO resources
 
 * r8a7791 (R-Car M2) based Koelsch board
   - Configure PFC and GPO
   - Use r8a7791 suffix for IRQC compat string
   - Add DT reference
 
 * r8a7790 (R-Car H2) based Lager board
   - Include all 4 GiB of memory
   - Use r8a7790 suffix for IRQC and MMCIF compat strings
   - Enable MMCIF
   - Add default PFC settings
 
 * r8a7778 (R-Car M1) SoC
   - Suffix for INTC compat string
   - Add HSPI, MMCIF, SDHI and I2C suppport on DTSI
   - Correct pin control device addresses
 
 * r8a7778 (R-Car M1) based Bock-W board
   - Use falling edge IRQ for LAN9221 in DT reference
   - Enable I2C, HSPI0, MMCIF and SDHI
   - Correct MMC pin conflict
   - Remove manual PFC settings from DT reference
   - Add default PFC settings
 
 * r8a7779 (R-Car H1) SoC
   - Add HSPI and SDHI support
   - Suffix for INTC compat string
 
 * r8a7779 (R-Car H1) based Marzen board
   - Enable HSPI0 and SDHI in DTS
   - Remove SDHI0 WP pin setting
   - Use falling edge IRQ for LAN9221 in DT reference
   - Add SDHI support
 
 * r8a7740 (R-Mobile A1) SoC
   - Suffix for INTC compat string
   - Add FSI support via DTSI
   - Use interrupt macros
 
 * r8a7740 based Armadillo board
   - Add FSI support for DTS
   - Use low level IRQ for ST1231 in DT reference
 
 * r8a73a4 (SH-Mobile APE6) SoC
   - Use interrupt macros in DT files
 
 * r8a73a4 (R-Mobile APE6) based ape6evm board
   - Include all 2 GiB of memory
 
 * r8a73a0 (SH-Mobile AG5) SoC
   - Correct SDHI compat string
 
 * r8a73a0 (SH-Mobile AG5) based kzm9d board
   - Add GPIO keys and Add PCF8575 GPIO extender to DT
   - Enable DSW2 with gpio-keys
   - Use falling edge IRQ for LAN9221 in DT reference
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Merge tag 'renesas-dt-for-v3.14' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt

From Simon Horman:
Renesas ARM based SoC DT updates for v3.14

* Global
  - Use interrupt macros
  - Use #include in device tree sources
  - Tidyup DT node naming

* emev2 (Emma Mobile EV2) SoC
  - Setup internal peripheral interrupts as level high
  - Use interrupt macros in DT files
  - Add clock tree description in DT

* r8a7791 (R-Car M2) SoC
  - Correct GPIO resources

* r8a7791 (R-Car M2) based Koelsch board
  - Configure PFC and GPO
  - Use r8a7791 suffix for IRQC compat string
  - Add DT reference

* r8a7790 (R-Car H2) based Lager board
  - Include all 4 GiB of memory
  - Use r8a7790 suffix for IRQC and MMCIF compat strings
  - Enable MMCIF
  - Add default PFC settings

* r8a7778 (R-Car M1) SoC
  - Suffix for INTC compat string
  - Add HSPI, MMCIF, SDHI and I2C suppport on DTSI
  - Correct pin control device addresses

* r8a7778 (R-Car M1) based Bock-W board
  - Use falling edge IRQ for LAN9221 in DT reference
  - Enable I2C, HSPI0, MMCIF and SDHI
  - Correct MMC pin conflict
  - Remove manual PFC settings from DT reference
  - Add default PFC settings

* r8a7779 (R-Car H1) SoC
  - Add HSPI and SDHI support
  - Suffix for INTC compat string

* r8a7779 (R-Car H1) based Marzen board
  - Enable HSPI0 and SDHI in DTS
  - Remove SDHI0 WP pin setting
  - Use falling edge IRQ for LAN9221 in DT reference
  - Add SDHI support

* r8a7740 (R-Mobile A1) SoC
  - Suffix for INTC compat string
  - Add FSI support via DTSI
  - Use interrupt macros

* r8a7740 based Armadillo board
  - Add FSI support for DTS
  - Use low level IRQ for ST1231 in DT reference

* r8a73a4 (SH-Mobile APE6) SoC
  - Use interrupt macros in DT files

* r8a73a4 (R-Mobile APE6) based ape6evm board
  - Include all 2 GiB of memory

* r8a73a0 (SH-Mobile AG5) SoC
  - Correct SDHI compat string

* r8a73a0 (SH-Mobile AG5) based kzm9d board
  - Add GPIO keys and Add PCF8575 GPIO extender to DT
  - Enable DSW2 with gpio-keys
  - Use falling edge IRQ for LAN9221 in DT reference

* tag 'renesas-dt-for-v3.14' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (102 commits)
  ARM: shmobile: marzen: enable HSPI0 in DTS
  ARM: shmobile: r8a7779: add HSPI support to DTSI
  ARM: shmobile: Use r8a7779 suffix for INTC compat string
  ARM: shmobile: Use r8a7778 suffix for INTC compat string
  ARM: shmobile: Use r8a7740 suffix for INTC compat string
  ARM: shmobile: Use sh73a0 suffix for INTC compat string
  ARM: shmobile: armadillo: add FSI support for DTS
  ARM: shmobile: r8a7740: add FSI support via DTSI
  ARM: shmobile: emev2: Setup internal peripheral interrupts as level high
  ARM: shmobile: emev2: Use interrupt macros in DT files
  ARM: shmobile: Use interrupt macros in r8a73a4 and r8a7778 DT files
  ARM: shmobile: Fix r8a7791 GPIO resources in DTS
  ARM: shmobile: Include all 4 GiB of memory on Lager DT Ref
  ARM: shmobile: Include all 4 GiB of memory on Lager
  ARM: shmobile: Include all 2 GiB of memory on APE6EVM
  ARM: shmobile: Include all 2 GiB of memory on APE6EVM DT Ref
  ARM: shmobile: kzm9g-reference: Add GPIO keys to DT
  ARM: shmobile: kzm9g-reference: Add PCF8575 GPIO extender to DT
  ARM: shmobile: Koelsch DT reference GPIO LED support
  ARM: shmobile: Enable DSW2 with gpio-keys on KZM9D
  ...

Signed-off-by: Kevin Hilman <khilman@linaro.org>
This commit is contained in:
Kevin Hilman 2013-12-20 12:16:49 -08:00
parent 84dac16a3b 1fd219561a
commit 1c928d10fd
61 changed files with 1463 additions and 645 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

14
arch/arm/Kconfig
View File

@ -644,8 +644,9 @@ config ARCH_MSM
stack and controls some vital subsystems
(clock and power control, etc).
config ARCH_SHMOBILE
bool "Renesas SH-Mobile / R-Mobile"
config ARCH_SHMOBILE_LEGACY
bool "Renesas SH-Mobile / R-Mobile (non-multiplatform)"
select ARCH_SHMOBILE
select ARM_PATCH_PHYS_VIRT
select CLKDEV_LOOKUP
select GENERIC_CLOCKEVENTS
@ -660,7 +661,8 @@ config ARCH_SHMOBILE
select PM_GENERIC_DOMAINS if PM
select SPARSE_IRQ
help
Support for Renesas's SH-Mobile and R-Mobile ARM platforms.
Support for Renesas's SH-Mobile and R-Mobile ARM platforms using
a non-multiplatform kernel.
config ARCH_RPC
bool "RiscPC"
@ -1611,7 +1613,7 @@ config HZ_FIXED
default 200 if ARCH_EBSA110 || ARCH_S3C24XX || ARCH_S5P64X0 || \
ARCH_S5PV210 || ARCH_EXYNOS4
default AT91_TIMER_HZ if ARCH_AT91
default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE_LEGACY
default 0
choice
@ -1796,8 +1798,8 @@ config ARCH_WANT_GENERAL_HUGETLB
source "mm/Kconfig"
config FORCE_MAX_ZONEORDER
int "Maximum zone order" if ARCH_SHMOBILE
range 11 64 if ARCH_SHMOBILE
int "Maximum zone order" if ARCH_SHMOBILE_LEGACY
range 11 64 if ARCH_SHMOBILE_LEGACY
default "12" if SOC_AM33XX
default "9" if SA1111
default "11"

1
arch/arm/Makefile
View File

@ -190,7 +190,6 @@ machine-$(CONFIG_ARCH_S5PC100) += s5pc100
machine-$(CONFIG_ARCH_S5PV210) += s5pv210
machine-$(CONFIG_ARCH_SA1100) += sa1100
machine-$(CONFIG_ARCH_SHMOBILE) += shmobile
machine-$(CONFIG_ARCH_SHMOBILE_MULTI) += shmobile
machine-$(CONFIG_ARCH_SIRF) += prima2
machine-$(CONFIG_ARCH_SOCFPGA) += socfpga
machine-$(CONFIG_ARCH_STI) += sti

2
arch/arm/boot/compressed/Makefile
View File

@ -64,7 +64,7 @@ else
endif
endif
ifeq ($(CONFIG_ARCH_SHMOBILE),y)
ifeq ($(CONFIG_ARCH_SHMOBILE_LEGACY),y)
OBJS += head-shmobile.o
endif

3
arch/arm/boot/dts/Makefile
View File

@ -221,7 +221,7 @@ dtb-$(CONFIG_ARCH_U8500) += ste-snowball.dtb \
dtb-$(CONFIG_ARCH_S3C24XX) += s3c2416-smdk2416.dtb
dtb-$(CONFIG_ARCH_S3C64XX) += s3c6410-mini6410.dtb \
s3c6410-smdk6410.dtb
dtb-$(CONFIG_ARCH_SHMOBILE) += emev2-kzm9d.dtb \
dtb-$(CONFIG_ARCH_SHMOBILE_LEGACY) += emev2-kzm9d.dtb \
r7s72100-genmai.dtb \
r8a7740-armadillo800eva.dtb \
r8a7778-bockw.dtb \
@ -230,6 +230,7 @@ dtb-$(CONFIG_ARCH_SHMOBILE) += emev2-kzm9d.dtb \
r8a7779-marzen.dtb \
r8a7779-marzen-reference.dtb \
r8a7791-koelsch.dtb \
r8a7791-koelsch-reference.dtb \
r8a7790-lager.dtb \
r8a7790-lager-reference.dtb \
sh73a0-kzm9g.dtb \

42
arch/arm/boot/dts/emev2-kzm9d.dts
View File

@ -9,7 +9,10 @@
*/
/dts-v1/;
/include/ "emev2.dtsi"
#include "emev2.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/interrupt-controller/irq.h>
/ {
model = "EMEV2 KZM9D Board";
@ -47,11 +50,46 @@
reg = <0x20000000 0x10000>;
phy-mode = "mii";
interrupt-parent = <&gpio0>;
interrupts = <1 1>; /* active high */
interrupts = <1 IRQ_TYPE_EDGE_RISING>;
reg-io-width = <4>;
smsc,irq-active-high;
smsc,irq-push-pull;
vddvario-supply = <&reg_1p8v>;
vdd33a-supply = <&reg_3p3v>;
};
gpio_keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
button@1 {
debounce_interval = <50>;
wakeup = <1>;
label = "DSW2-1";
linux,code = <KEY_1>;
gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>;
};
button@2 {
debounce_interval = <50>;
wakeup = <1>;
label = "DSW2-2";
linux,code = <KEY_2>;
gpios = <&gpio0 15 GPIO_ACTIVE_HIGH>;
};
button@3 {
debounce_interval = <50>;
wakeup = <1>;
label = "DSW2-3";
linux,code = <KEY_3>;
gpios = <&gpio0 16 GPIO_ACTIVE_HIGH>;
};
button@4 {
debounce_interval = <50>;
wakeup = <1>;
label = "DSW2-4";
linux,code = <KEY_4>;
gpios = <&gpio0 17 GPIO_ACTIVE_HIGH>;
};
};
};

116
arch/arm/boot/dts/emev2.dtsi
View File

@ -8,7 +8,8 @@
* kind, whether express or implied.
*/
/include/ "skeleton.dtsi"
#include "skeleton.dtsi"
#include <dt-bindings/interrupt-controller/irq.h>
/ {
compatible = "renesas,emev2";
@ -48,44 +49,129 @@
pmu {
compatible = "arm,cortex-a9-pmu";
interrupts = <0 120 4>,
<0 121 4>;
interrupts = <0 120 IRQ_TYPE_LEVEL_HIGH>,
<0 121 IRQ_TYPE_LEVEL_HIGH>;
};
smu@e0110000 {
compatible = "renesas,emev2-smu";
reg = <0xe0110000 0x10000>;
#address-cells = <2>;
#size-cells = <0>;
c32ki: c32ki {
compatible = "fixed-clock";
clock-frequency = <32768>;
#clock-cells = <0>;
};
pll3_fo: pll3_fo {
compatible = "fixed-factor-clock";
clocks = <&c32ki>;
clock-div = <1>;
clock-mult = <7000>;
#clock-cells = <0>;
};
usia_u0_sclkdiv: usia_u0_sclkdiv {
compatible = "renesas,emev2-smu-clkdiv";
reg = <0x610 0>;
clocks = <&pll3_fo>;
#clock-cells = <0>;
};
usib_u1_sclkdiv: usib_u1_sclkdiv {
compatible = "renesas,emev2-smu-clkdiv";
reg = <0x65c 0>;
clocks = <&pll3_fo>;
#clock-cells = <0>;
};
usib_u2_sclkdiv: usib_u2_sclkdiv {
compatible = "renesas,emev2-smu-clkdiv";
reg = <0x65c 16>;
clocks = <&pll3_fo>;
#clock-cells = <0>;
};
usib_u3_sclkdiv: usib_u3_sclkdiv {
compatible = "renesas,emev2-smu-clkdiv";
reg = <0x660 0>;
clocks = <&pll3_fo>;
#clock-cells = <0>;
};
usia_u0_sclk: usia_u0_sclk {
compatible = "renesas,emev2-smu-gclk";
reg = <0x4a0 1>;
clocks = <&usia_u0_sclkdiv>;
#clock-cells = <0>;
};
usib_u1_sclk: usib_u1_sclk {
compatible = "renesas,emev2-smu-gclk";
reg = <0x4b8 1>;
clocks = <&usib_u1_sclkdiv>;
#clock-cells = <0>;
};
usib_u2_sclk: usib_u2_sclk {
compatible = "renesas,emev2-smu-gclk";
reg = <0x4bc 1>;
clocks = <&usib_u2_sclkdiv>;
#clock-cells = <0>;
};
usib_u3_sclk: usib_u3_sclk {
compatible = "renesas,emev2-smu-gclk";
reg = <0x4c0 1>;
clocks = <&usib_u3_sclkdiv>;
#clock-cells = <0>;
};
sti_sclk: sti_sclk {
compatible = "renesas,emev2-smu-gclk";
reg = <0x528 1>;
clocks = <&c32ki>;
#clock-cells = <0>;
};
};
sti@e0180000 {
compatible = "renesas,em-sti";
reg = <0xe0180000 0x54>;
interrupts = <0 125 0>;
interrupts = <0 125 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&sti_sclk>;
clock-names = "sclk";
};
uart@e1020000 {
compatible = "renesas,em-uart";
reg = <0xe1020000 0x38>;
interrupts = <0 8 0>;
interrupts = <0 8 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&usia_u0_sclk>;
clock-names = "sclk";
};
uart@e1030000 {
compatible = "renesas,em-uart";
reg = <0xe1030000 0x38>;
interrupts = <0 9 0>;
interrupts = <0 9 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&usib_u1_sclk>;
clock-names = "sclk";
};
uart@e1040000 {
compatible = "renesas,em-uart";
reg = <0xe1040000 0x38>;
interrupts = <0 10 0>;
interrupts = <0 10 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&usib_u2_sclk>;
clock-names = "sclk";
};
uart@e1050000 {
compatible = "renesas,em-uart";
reg = <0xe1050000 0x38>;
interrupts = <0 11 0>;
interrupts = <0 11 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&usib_u3_sclk>;
clock-names = "sclk";
};
gpio0: gpio@e0050000 {
compatible = "renesas,em-gio";
reg = <0xe0050000 0x2c>, <0xe0050040 0x20>;
interrupts = <0 67 0>, <0 68 0>;
interrupts = <0 67 IRQ_TYPE_LEVEL_HIGH>,
<0 68 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller;
#gpio-cells = <2>;
ngpios = <32>;
@ -95,7 +181,8 @@
gpio1: gpio@e0050080 {
compatible = "renesas,em-gio";
reg = <0xe0050080 0x2c>, <0xe00500c0 0x20>;
interrupts = <0 69 0>, <0 70 0>;
interrupts = <0 69 IRQ_TYPE_LEVEL_HIGH>,
<0 70 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller;
#gpio-cells = <2>;
ngpios = <32>;
@ -105,7 +192,8 @@
gpio2: gpio@e0050100 {
compatible = "renesas,em-gio";
reg = <0xe0050100 0x2c>, <0xe0050140 0x20>;
interrupts = <0 71 0>, <0 72 0>;
interrupts = <0 71 IRQ_TYPE_LEVEL_HIGH>,
<0 72 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller;
#gpio-cells = <2>;
ngpios = <32>;
@ -115,7 +203,8 @@
gpio3: gpio@e0050180 {
compatible = "renesas,em-gio";
reg = <0xe0050180 0x2c>, <0xe00501c0 0x20>;
interrupts = <0 73 0>, <0 74 0>;
interrupts = <0 73 IRQ_TYPE_LEVEL_HIGH>,
<0 74 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller;
#gpio-cells = <2>;
ngpios = <32>;
@ -125,7 +214,8 @@
gpio4: gpio@e0050200 {
compatible = "renesas,em-gio";
reg = <0xe0050200 0x2c>, <0xe0050240 0x20>;
interrupts = <0 75 0>, <0 76 0>;
interrupts = <0 75 IRQ_TYPE_LEVEL_HIGH>,
<0 76 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller;
#gpio-cells = <2>;
ngpios = <31>;

2
arch/arm/boot/dts/r7s72100-genmai.dts
View File

@ -9,7 +9,7 @@
*/
/dts-v1/;
/include/ "r7s72100.dtsi"
#include "r7s72100.dtsi"
/ {
model = "Genmai";

15
arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts
View File

@ -9,7 +9,7 @@
*/
/dts-v1/;
/include/ "r8a73a4.dtsi"
#include "r8a73a4.dtsi"
#include <dt-bindings/gpio/gpio.h>
/ {
@ -25,6 +25,11 @@
reg = <0 0x40000000 0 0x40000000>;
};
memory@200000000 {
device_type = "memory";
reg = <2 0x00000000 0 0x40000000>;
};
vcc_mmc0: regulator@0 {
compatible = "regulator-fixed";
regulator-name = "MMC0 Vcc";
@ -88,22 +93,22 @@
pinctrl-0 = <&scifa0_pins>;
pinctrl-names = "default";
scifa0_pins: scifa0 {
scifa0_pins: serial0 {
renesas,groups = "scifa0_data";
renesas,function = "scifa0";
};
mmc0_pins: mmcif {
mmc0_pins: mmc {
renesas,groups = "mmc0_data8", "mmc0_ctrl";
renesas,function = "mmc0";
};
sdhi0_pins: sdhi0 {
sdhi0_pins: sd0 {
renesas,groups = "sdhi0_data4", "sdhi0_ctrl", "sdhi0_cd";
renesas,function = "sdhi0";
};
sdhi1_pins: sdhi1 {
sdhi1_pins: sd1 {
renesas,groups = "sdhi1_data4", "sdhi1_ctrl";
renesas,function = "sdhi1";
};

10
arch/arm/boot/dts/r8a73a4-ape6evm.dts
View File

@ -9,7 +9,8 @@
*/
/dts-v1/;
/include/ "r8a73a4.dtsi"
#include "r8a73a4.dtsi"
#include <dt-bindings/interrupt-controller/irq.h>
/ {
model = "APE6EVM";
@ -24,6 +25,11 @@
reg = <0 0x40000000 0 0x40000000>;
};
memory@200000000 {
device_type = "memory";
reg = <2 0x00000000 0 0x40000000>;
};
ape6evm_fixed_3v3: fixedregulator@0 {
compatible = "regulator-fixed";
regulator-name = "3V3";
@ -40,7 +46,7 @@
compatible = "smsc,lan9118", "smsc,lan9115";
reg = <0x08000000 0x1000>;
interrupt-parent = <&irqc1>;
interrupts = <8 0x4>;
interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
phy-mode = "mii";
reg-io-width = <4>;
smsc,irq-active-high;

168
arch/arm/boot/dts/r8a73a4.dtsi
View File

@ -9,6 +9,9 @@
* kind, whether express or implied.
*/
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h>
/ {
compatible = "renesas,r8a73a4";
interrupt-parent = <&gic>;
@ -36,15 +39,15 @@
<0 0xf1002000 0 0x1000>,
<0 0xf1004000 0 0x2000>,
<0 0xf1006000 0 0x2000>;
interrupts = <1 9 0xf04>;
interrupts = <1 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
};
timer {
compatible = "arm,armv7-timer";
interrupts = <1 13 0xf08>,
<1 14 0xf08>,
<1 11 0xf08>,
<1 10 0xf08>;
interrupts = <1 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<1 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<1 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<1 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
};
irqc0: interrupt-controller@e61c0000 {
@ -53,14 +56,38 @@
interrupt-controller;
reg = <0 0xe61c0000 0 0x200>;
interrupt-parent = <&gic>;
interrupts = <0 0 4>, <0 1 4>, <0 2 4>, <0 3 4>,
<0 4 4>, <0 5 4>, <0 6 4>, <0 7 4>,
<0 8 4>, <0 9 4>, <0 10 4>, <0 11 4>,
<0 12 4>, <0 13 4>, <0 14 4>, <0 15 4>,
<0 16 4>, <0 17 4>, <0 18 4>, <0 19 4>,
<0 20 4>, <0 21 4>, <0 22 4>, <0 23 4>,
<0 24 4>, <0 25 4>, <0 26 4>, <0 27 4>,
<0 28 4>, <0 29 4>, <0 30 4>, <0 31 4>;
interrupts = <0 0 IRQ_TYPE_LEVEL_HIGH>,
<0 1 IRQ_TYPE_LEVEL_HIGH>,
<0 2 IRQ_TYPE_LEVEL_HIGH>,
<0 3 IRQ_TYPE_LEVEL_HIGH>,
<0 4 IRQ_TYPE_LEVEL_HIGH>,
<0 5 IRQ_TYPE_LEVEL_HIGH>,
<0 6 IRQ_TYPE_LEVEL_HIGH>,
<0 7 IRQ_TYPE_LEVEL_HIGH>,
<0 8 IRQ_TYPE_LEVEL_HIGH>,
<0 9 IRQ_TYPE_LEVEL_HIGH>,
<0 10 IRQ_TYPE_LEVEL_HIGH>,
<0 11 IRQ_TYPE_LEVEL_HIGH>,
<0 12 IRQ_TYPE_LEVEL_HIGH>,
<0 13 IRQ_TYPE_LEVEL_HIGH>,
<0 14 IRQ_TYPE_LEVEL_HIGH>,
<0 15 IRQ_TYPE_LEVEL_HIGH>,
<0 16 IRQ_TYPE_LEVEL_HIGH>,
<0 17 IRQ_TYPE_LEVEL_HIGH>,
<0 18 IRQ_TYPE_LEVEL_HIGH>,
<0 19 IRQ_TYPE_LEVEL_HIGH>,
<0 20 IRQ_TYPE_LEVEL_HIGH>,
<0 21 IRQ_TYPE_LEVEL_HIGH>,
<0 22 IRQ_TYPE_LEVEL_HIGH>,
<0 23 IRQ_TYPE_LEVEL_HIGH>,
<0 24 IRQ_TYPE_LEVEL_HIGH>,
<0 25 IRQ_TYPE_LEVEL_HIGH>,
<0 26 IRQ_TYPE_LEVEL_HIGH>,
<0 27 IRQ_TYPE_LEVEL_HIGH>,
<0 28 IRQ_TYPE_LEVEL_HIGH>,
<0 29 IRQ_TYPE_LEVEL_HIGH>,
<0 30 IRQ_TYPE_LEVEL_HIGH>,
<0 31 IRQ_TYPE_LEVEL_HIGH>;
};
irqc1: interrupt-controller@e61c0200 {
@ -69,13 +96,32 @@
interrupt-controller;
reg = <0 0xe61c0200 0 0x200>;
interrupt-parent = <&gic>;
interrupts = <0 32 4>, <0 33 4>, <0 34 4>, <0 35 4>,
<0 36 4>, <0 37 4>, <0 38 4>, <0 39 4>,
<0 40 4>, <0 41 4>, <0 42 4>, <0 43 4>,
<0 44 4>, <0 45 4>, <0 46 4>, <0 47 4>,
<0 48 4>, <0 49 4>, <0 50 4>, <0 51 4>,
<0 52 4>, <0 53 4>, <0 54 4>, <0 55 4>,
<0 56 4>, <0 57 4>;
interrupts = <0 32 IRQ_TYPE_LEVEL_HIGH>,
<0 33 IRQ_TYPE_LEVEL_HIGH>,
<0 34 IRQ_TYPE_LEVEL_HIGH>,
<0 35 IRQ_TYPE_LEVEL_HIGH>,
<0 36 IRQ_TYPE_LEVEL_HIGH>,
<0 37 IRQ_TYPE_LEVEL_HIGH>,
<0 38 IRQ_TYPE_LEVEL_HIGH>,
<0 39 IRQ_TYPE_LEVEL_HIGH>,
<0 40 IRQ_TYPE_LEVEL_HIGH>,
<0 41 IRQ_TYPE_LEVEL_HIGH>,
<0 42 IRQ_TYPE_LEVEL_HIGH>,
<0 43 IRQ_TYPE_LEVEL_HIGH>,
<0 44 IRQ_TYPE_LEVEL_HIGH>,
<0 45 IRQ_TYPE_LEVEL_HIGH>,
<0 46 IRQ_TYPE_LEVEL_HIGH>,
<0 47 IRQ_TYPE_LEVEL_HIGH>,
<0 48 IRQ_TYPE_LEVEL_HIGH>,
<0 49 IRQ_TYPE_LEVEL_HIGH>,
<0 50 IRQ_TYPE_LEVEL_HIGH>,
<0 51 IRQ_TYPE_LEVEL_HIGH>,
<0 52 IRQ_TYPE_LEVEL_HIGH>,
<0 53 IRQ_TYPE_LEVEL_HIGH>,
<0 54 IRQ_TYPE_LEVEL_HIGH>,
<0 55 IRQ_TYPE_LEVEL_HIGH>,
<0 56 IRQ_TYPE_LEVEL_HIGH>,
<0 57 IRQ_TYPE_LEVEL_HIGH>;
};
dmac: dma-multiplexer@0 {
@ -91,27 +137,27 @@
compatible = "renesas,shdma-r8a73a4";
reg = <0 0xe6700020 0 0x89e0>;
interrupt-parent = <&gic>;
interrupts = <0 220 4
0 200 4
0 201 4
0 202 4
0 203 4
0 204 4
0 205 4
0 206 4
0 207 4
0 208 4
0 209 4
0 210 4
0 211 4
0 212 4
0 213 4
0 214 4
0 215 4
0 216 4
0 217 4
0 218 4
0 219 4>;
interrupts = <0 220 IRQ_TYPE_LEVEL_HIGH
0 200 IRQ_TYPE_LEVEL_HIGH
0 201 IRQ_TYPE_LEVEL_HIGH
0 202 IRQ_TYPE_LEVEL_HIGH
0 203 IRQ_TYPE_LEVEL_HIGH
0 204 IRQ_TYPE_LEVEL_HIGH
0 205 IRQ_TYPE_LEVEL_HIGH
0 206 IRQ_TYPE_LEVEL_HIGH
0 207 IRQ_TYPE_LEVEL_HIGH
0 208 IRQ_TYPE_LEVEL_HIGH
0 209 IRQ_TYPE_LEVEL_HIGH
0 210 IRQ_TYPE_LEVEL_HIGH
0 211 IRQ_TYPE_LEVEL_HIGH
0 212 IRQ_TYPE_LEVEL_HIGH
0 213 IRQ_TYPE_LEVEL_HIGH
0 214 IRQ_TYPE_LEVEL_HIGH
0 215 IRQ_TYPE_LEVEL_HIGH
0 216 IRQ_TYPE_LEVEL_HIGH
0 217 IRQ_TYPE_LEVEL_HIGH
0 218 IRQ_TYPE_LEVEL_HIGH
0 219 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "error",
"ch0", "ch1", "ch2", "ch3",
"ch4", "ch5", "ch6", "ch7",
@ -126,7 +172,7 @@
reg = <0 0xe61f0000 0 0x14>, <0 0xe61f0100 0 0x38>,
<0 0xe61f0200 0 0x38>, <0 0xe61f0300 0 0x38>;
interrupt-parent = <&gic>;
interrupts = <0 69 4>;
interrupts = <0 69 IRQ_TYPE_LEVEL_HIGH>;
};
i2c0: i2c@e6500000 {
@ -135,7 +181,7 @@
compatible = "renesas,rmobile-iic";
reg = <0 0xe6500000 0 0x428>;
interrupt-parent = <&gic>;
interrupts = <0 174 0x4>;
interrupts = <0 174 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
@ -145,7 +191,7 @@
compatible = "renesas,rmobile-iic";
reg = <0 0xe6510000 0 0x428>;
interrupt-parent = <&gic>;
interrupts = <0 175 0x4>;
interrupts = <0 175 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
@ -155,7 +201,7 @@
compatible = "renesas,rmobile-iic";
reg = <0 0xe6520000 0 0x428>;
interrupt-parent = <&gic>;
interrupts = <0 176 0x4>;
interrupts = <0 176 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
@ -165,7 +211,7 @@
compatible = "renesas,rmobile-iic";
reg = <0 0xe6530000 0 0x428>;
interrupt-parent = <&gic>;
interrupts = <0 177 0x4>;
interrupts = <0 177 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
@ -175,7 +221,7 @@
compatible = "renesas,rmobile-iic";
reg = <0 0xe6540000 0 0x428>;
interrupt-parent = <&gic>;
interrupts = <0 178 0x4>;
interrupts = <0 178 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
@ -185,7 +231,7 @@
compatible = "renesas,rmobile-iic";
reg = <0 0xe60b0000 0 0x428>;
interrupt-parent = <&gic>;
interrupts = <0 179 0x4>;
interrupts = <0 179 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
@ -195,7 +241,7 @@
compatible = "renesas,rmobile-iic";
reg = <0 0xe6550000 0 0x428>;
interrupt-parent = <&gic>;
interrupts = <0 184 0x4>;
interrupts = <0 184 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
@ -205,7 +251,7 @@
compatible = "renesas,rmobile-iic";
reg = <0 0xe6560000 0 0x428>;
interrupt-parent = <&gic>;
interrupts = <0 185 0x4>;
interrupts = <0 185 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
@ -215,24 +261,24 @@
compatible = "renesas,rmobile-iic";
reg = <0 0xe6570000 0 0x428>;
interrupt-parent = <&gic>;
interrupts = <0 173 0x4>;
interrupts = <0 173 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
mmcif0: mmcif@ee200000 {
mmcif0: mmc@ee200000 {
compatible = "renesas,sh-mmcif";
reg = <0 0xee200000 0 0x80>;
interrupt-parent = <&gic>;
interrupts = <0 169 0x4>;
interrupts = <0 169 IRQ_TYPE_LEVEL_HIGH>;
reg-io-width = <4>;
status = "disabled";
};
mmcif1: mmcif@ee220000 {
mmcif1: mmc@ee220000 {
compatible = "renesas,sh-mmcif";
reg = <0 0xee220000 0 0x80>;
interrupt-parent = <&gic>;
interrupts = <0 170 0x4>;
interrupts = <0 170 IRQ_TYPE_LEVEL_HIGH>;
reg-io-width = <4>;
status = "disabled";
};
@ -244,29 +290,29 @@
#gpio-cells = <2>;
};
sdhi0: sdhi@ee100000 {
sdhi0: sd@ee100000 {
compatible = "renesas,sdhi-r8a73a4";
reg = <0 0xee100000 0 0x100>;
interrupt-parent = <&gic>;
interrupts = <0 165 4>;
interrupts = <0 165 IRQ_TYPE_LEVEL_HIGH>;
cap-sd-highspeed;
status = "disabled";
};
sdhi1: sdhi@ee120000 {
sdhi1: sd@ee120000 {
compatible = "renesas,sdhi-r8a73a4";
reg = <0 0xee120000 0 0x100>;
interrupt-parent = <&gic>;
interrupts = <0 166 4>;
interrupts = <0 166 IRQ_TYPE_LEVEL_HIGH>;
cap-sd-highspeed;
status = "disabled";
};
sdhi2: sdhi@ee140000 {
sdhi2: sd@ee140000 {
compatible = "renesas,sdhi-r8a73a4";
reg = <0 0xee140000 0 0x100>;
interrupt-parent = <&gic>;
interrupts = <0 167 4>;
interrupts = <0 167 IRQ_TYPE_LEVEL_HIGH>;
cap-sd-highspeed;
status = "disabled";
};

50
arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
View File

@ -9,8 +9,9 @@
*/
/dts-v1/;
/include/ "r8a7740.dtsi"
#include "r8a7740.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/pwm/pwm.h>
/ {
@ -86,31 +87,55 @@
pinctrl-0 = <&backlight_pins>;
pinctrl-names = "default";
};
sound {
compatible = "simple-audio-card";
simple-audio-card,format = "i2s";
simple-audio-card,cpu {
sound-dai = <&sh_fsi2 0>;
bitclock-inversion;
};
simple-audio-card,codec {
sound-dai = <&wm8978>;
bitclock-master;
frame-master;
system-clock-frequency = <12288000>;
};
};
};
&i2c0 {
status = "okay";
touchscreen: st1232@55 {
touchscreen@55 {
compatible = "sitronix,st1232";
reg = <0x55>;
interrupt-parent = <&irqpin1>;
interrupts = <2 0>; /* IRQ10: hwirq 2 on irqpin1 */
interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
pinctrl-0 = <&st1232_pins>;
pinctrl-names = "default";
gpios = <&pfc 166 GPIO_ACTIVE_LOW>;
};
wm8978: wm8978@1a {
#sound-dai-cells = <0>;
compatible = "wlf,wm8978";
reg = <0x1a>;
};
};
&pfc {
pinctrl-0 = <&scifa1_pins>;
pinctrl-names = "default";
scifa1_pins: scifa1 {
scifa1_pins: serial1 {
renesas,groups = "scifa1_data";
renesas,function = "scifa1";
};
st1232_pins: st1232 {
st1232_pins: touchscreen {
renesas,groups = "intc_irq10";
renesas,function = "intc";
};
@ -125,10 +150,16 @@
renesas,function = "mmc0";
};
sdhi0_pins: sdhi0 {
sdhi0_pins: sd0 {
renesas,groups = "sdhi0_data4", "sdhi0_ctrl", "sdhi0_wp";
renesas,function = "sdhi0";
};
fsia_pins: sounda {
renesas,groups = "fsia_sclk_in", "fsia_mclk_out",
"fsia_data_in_1", "fsia_data_out_0";
renesas,function = "fsia";
};
};
&tpu {
@ -155,3 +186,10 @@
cd-gpios = <&pfc 167 GPIO_ACTIVE_LOW>;
status = "okay";
};
&sh_fsi2 {
pinctrl-0 = <&fsia_pins>;
pinctrl-names = "default";
status = "okay";
};

2
arch/arm/boot/dts/r8a7740-armadillo800eva.dts
View File

@ -9,7 +9,7 @@
*/
/dts-v1/;
/include/ "r8a7740.dtsi"
#include "r8a7740.dtsi"
/ {
model = "armadillo 800 eva";

135
arch/arm/boot/dts/r8a7740.dtsi
View File

@ -10,6 +10,8 @@
/include/ "skeleton.dtsi"
#include <dt-bindings/interrupt-controller/irq.h>
/ {
compatible = "renesas,r8a7740";
@ -34,12 +36,12 @@
pmu {
compatible = "arm,cortex-a9-pmu";
interrupts = <0 83 4>;
interrupts = <0 83 IRQ_TYPE_LEVEL_HIGH>;
};
/* irqpin0: IRQ0 - IRQ7 */
irqpin0: irqpin@e6900000 {
compatible = "renesas,intc-irqpin";
compatible = "renesas,intc-irqpin-r8a7740", "renesas,intc-irqpin";
#interrupt-cells = <2>;
interrupt-controller;
reg = <0xe6900000 4>,
@ -48,19 +50,19 @@
<0xe6900040 1>,
<0xe6900060 1>;
interrupt-parent = <&gic>;
interrupts = <0 149 0x4
0 149 0x4
0 149 0x4
0 149 0x4
0 149 0x4
0 149 0x4
0 149 0x4
0 149 0x4>;
interrupts = <0 149 IRQ_TYPE_LEVEL_HIGH
0 149 IRQ_TYPE_LEVEL_HIGH
0 149 IRQ_TYPE_LEVEL_HIGH
0 149 IRQ_TYPE_LEVEL_HIGH
0 149 IRQ_TYPE_LEVEL_HIGH
0 149 IRQ_TYPE_LEVEL_HIGH
0 149 IRQ_TYPE_LEVEL_HIGH
0 149 IRQ_TYPE_LEVEL_HIGH>;
};
/* irqpin1: IRQ8 - IRQ15 */
irqpin1: irqpin@e6900004 {
compatible = "renesas,intc-irqpin";
compatible = "renesas,intc-irqpin-r8a7740", "renesas,intc-irqpin";
#interrupt-cells = <2>;
interrupt-controller;
reg = <0xe6900004 4>,
@ -69,19 +71,19 @@
<0xe6900044 1>,
<0xe6900064 1>;
interrupt-parent = <&gic>;
interrupts = <0 149 0x4
0 149 0x4
0 149 0x4
0 149 0x4
0 149 0x4
0 149 0x4
0 149 0x4
0 149 0x4>;
interrupts = <0 149 IRQ_TYPE_LEVEL_HIGH
0 149 IRQ_TYPE_LEVEL_HIGH
0 149 IRQ_TYPE_LEVEL_HIGH
0 149 IRQ_TYPE_LEVEL_HIGH
0 149 IRQ_TYPE_LEVEL_HIGH
0 149 IRQ_TYPE_LEVEL_HIGH
0 149 IRQ_TYPE_LEVEL_HIGH
0 149 IRQ_TYPE_LEVEL_HIGH>;
};
/* irqpin2: IRQ16 - IRQ23 */
irqpin2: irqpin@e6900008 {
compatible = "renesas,intc-irqpin";
compatible = "renesas,intc-irqpin-r8a7740", "renesas,intc-irqpin";
#interrupt-cells = <2>;
interrupt-controller;
reg = <0xe6900008 4>,
@ -90,19 +92,19 @@
<0xe6900048 1>,
<0xe6900068 1>;
interrupt-parent = <&gic>;
interrupts = <0 149 0x4
0 149 0x4
0 149 0x4
0 149 0x4
0 149 0x4
0 149 0x4
0 149 0x4
0 149 0x4>;
interrupts = <0 149 IRQ_TYPE_LEVEL_HIGH
0 149 IRQ_TYPE_LEVEL_HIGH
0 149 IRQ_TYPE_LEVEL_HIGH
0 149 IRQ_TYPE_LEVEL_HIGH
0 149 IRQ_TYPE_LEVEL_HIGH
0 149 IRQ_TYPE_LEVEL_HIGH
0 149 IRQ_TYPE_LEVEL_HIGH
0 149 IRQ_TYPE_LEVEL_HIGH>;
};
/* irqpin3: IRQ24 - IRQ31 */
irqpin3: irqpin@e690000c {
compatible = "renesas,intc-irqpin";
compatible = "renesas,intc-irqpin-r8a7740", "renesas,intc-irqpin";
#interrupt-cells = <2>;
interrupt-controller;
reg = <0xe690000c 4>,
@ -111,14 +113,14 @@
<0xe690004c 1>,
<0xe690006c 1>;
interrupt-parent = <&gic>;
interrupts = <0 149 0x4
0 149 0x4
0 149 0x4
0 149 0x4
0 149 0x4
0 149 0x4
0 149 0x4
0 149 0x4>;
interrupts = <0 149 IRQ_TYPE_LEVEL_HIGH
0 149 IRQ_TYPE_LEVEL_HIGH
0 149 IRQ_TYPE_LEVEL_HIGH
0 149 IRQ_TYPE_LEVEL_HIGH
0 149 IRQ_TYPE_LEVEL_HIGH
0 149 IRQ_TYPE_LEVEL_HIGH
0 149 IRQ_TYPE_LEVEL_HIGH
0 149 IRQ_TYPE_LEVEL_HIGH>;
};
i2c0: i2c@fff20000 {
@ -127,10 +129,10 @@
compatible = "renesas,rmobile-iic";
reg = <0xfff20000 0x425>;
interrupt-parent = <&gic>;
interrupts = <0 201 0x4
0 202 0x4
0 203 0x4
0 204 0x4>;
interrupts = <0 201 IRQ_TYPE_LEVEL_HIGH
0 202 IRQ_TYPE_LEVEL_HIGH
0 203 IRQ_TYPE_LEVEL_HIGH
0 204 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
@ -140,10 +142,10 @@
compatible = "renesas,rmobile-iic";
reg = <0xe6c20000 0x425>;
interrupt-parent = <&gic>;
interrupts = <0 70 0x4
0 71 0x4
0 72 0x4
0 73 0x4>;
interrupts = <0 70 IRQ_TYPE_LEVEL_HIGH
0 71 IRQ_TYPE_LEVEL_HIGH
0 72 IRQ_TYPE_LEVEL_HIGH
0 73 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
@ -162,36 +164,57 @@
#pwm-cells = <3>;
};
mmcif0: mmcif@e6bd0000 {
mmcif0: mmc@e6bd0000 {
compatible = "renesas,sh-mmcif";
reg = <0xe6bd0000 0x100>;
interrupt-parent = <&gic>;
interrupts = <0 56 4
0 57 4>;
interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH
0 57 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
sdhi0: sdhi@e6850000 {
sdhi0: sd@e6850000 {
compatible = "renesas,sdhi-r8a7740";
reg = <0xe6850000 0x100>;
interrupt-parent = <&gic>;
interrupts = <0 117 4
0 118 4
0 119 4>;
interrupts = <0 117 IRQ_TYPE_LEVEL_HIGH
0 118 IRQ_TYPE_LEVEL_HIGH
0 119 IRQ_TYPE_LEVEL_HIGH>;
cap-sd-highspeed;
cap-sdio-irq;
status = "disabled";
};
sdhi1: sdhi@e6860000 {
sdhi1: sd@e6860000 {
compatible = "renesas,sdhi-r8a7740";
reg = <0xe6860000 0x100>;
interrupt-parent = <&gic>;
interrupts = <0 121 4
0 122 4
0 123 4>;
interrupts = <0 121 IRQ_TYPE_LEVEL_HIGH
0 122 IRQ_TYPE_LEVEL_HIGH
0 123 IRQ_TYPE_LEVEL_HIGH>;
cap-sd-highspeed;
cap-sdio-irq;
status = "disabled";
};
sdhi2: sd@e6870000 {
compatible = "renesas,sdhi-r8a7740";
reg = <0xe6870000 0x100>;
interrupt-parent = <&gic>;
interrupts = <0 125 IRQ_TYPE_LEVEL_HIGH
0 126 IRQ_TYPE_LEVEL_HIGH
0 127 IRQ_TYPE_LEVEL_HIGH>;
cap-sd-highspeed;
cap-sdio-irq;
status = "disabled";
};
sh_fsi2: sound@fe1f0000 {
#sound-dai-cells = <1>;
compatible = "renesas,sh_fsi2";
reg = <0xfe1f0000 0x400>;
interrupt-parent = <&gic>;
interrupts = <0 9 0x4>;
status = "disabled";
};
};

57
arch/arm/boot/dts/r8a7778-bockw-reference.dts
View File

@ -15,7 +15,8 @@
*/
/dts-v1/;
/include/ "r8a7778.dtsi"
#include "r8a7778.dtsi"
#include <dt-bindings/interrupt-controller/irq.h>
/ {
model = "bockw";
@ -45,13 +46,65 @@
phy-mode = "mii";
interrupt-parent = <&irqpin>;
interrupts = <0 0>; /* IRQ0: hwirq 0 on irqpin */
interrupts = <0 IRQ_TYPE_EDGE_FALLING>;
reg-io-width = <4>;
vddvario-supply = <&fixedregulator3v3>;
vdd33a-supply = <&fixedregulator3v3>;
};
};
&mmcif {
pinctrl-0 = <&mmc_pins>;
pinctrl-names = "default";
vmmc-supply = <&fixedregulator3v3>;
bus-width = <8>;
broken-cd;
status = "okay";
};
&irqpin {
status = "okay";
};
&pfc {
pinctrl-0 = <&scif0_pins>;
pinctrl-names = "default";
scif0_pins: serial0 {
renesas,groups = "scif0_data_a", "scif0_ctrl";
renesas,function = "scif0";
};
mmc_pins: mmc {
renesas,groups = "mmc_data8", "mmc_ctrl";
renesas,function = "mmc";
};
sdhi0_pins: sd0 {
renesas,groups = "sdhi0_data4", "sdhi0_ctrl",
"sdhi0_cd", "sdhi0_wp";
renesas,function = "sdhi0";
};
hspi0_pins: hspi0 {
renesas,groups = "hspi0_a";
renesas,function = "hspi0";
};
};
&sdhi0 {
pinctrl-0 = <&sdhi0_pins>;
pinctrl-names = "default";
vmmc-supply = <&fixedregulator3v3>;
bus-width = <4>;
status = "okay";
};
&hspi0 {
pinctrl-0 = <&hspi0_pins>;
pinctrl-names = "default";
status = "okay";
};

2
arch/arm/boot/dts/r8a7778-bockw.dts
View File

@ -15,7 +15,7 @@
*/
/dts-v1/;
/include/ "r8a7778.dtsi"
#include "r8a7778.dtsi"
/ {
model = "bockw";

172
arch/arm/boot/dts/r8a7778.dtsi
View File

@ -16,6 +16,8 @@
/include/ "skeleton.dtsi"
#include <dt-bindings/interrupt-controller/irq.h>
/ {
compatible = "renesas,r8a7778";
@ -25,6 +27,12 @@
};
};
aliases {
spi0 = &hspi0;
spi1 = &hspi1;
spi2 = &hspi2;
};
gic: interrupt-controller@fe438000 {
compatible = "arm,cortex-a9-gic";
#interrupt-cells = <3>;
@ -35,7 +43,7 @@
/* irqpin: IRQ0 - IRQ3 */
irqpin: irqpin@fe78001c {
compatible = "renesas,intc-irqpin";
compatible = "renesas,intc-irqpin-r8a7778", "renesas,intc-irqpin";
#interrupt-cells = <2>;
interrupt-controller;
status = "disabled"; /* default off */
@ -45,10 +53,10 @@
<0xfe780044 4>,
<0xfe780064 4>;
interrupt-parent = <&gic>;
interrupts = <0 27 0x4
0 28 0x4
0 29 0x4
0 30 0x4>;
interrupts = <0 27 IRQ_TYPE_LEVEL_HIGH
0 28 IRQ_TYPE_LEVEL_HIGH
0 29 IRQ_TYPE_LEVEL_HIGH
0 30 IRQ_TYPE_LEVEL_HIGH>;
sense-bitfield-width = <2>;
};
@ -56,7 +64,7 @@
compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
reg = <0xffc40000 0x2c>;
interrupt-parent = <&gic>;
interrupts = <0 103 0x4>;
interrupts = <0 103 IRQ_TYPE_LEVEL_HIGH>;
#gpio-cells = <2>;
gpio-controller;
gpio-ranges = <&pfc 0 0 32>;
@ -68,7 +76,7 @@
compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
reg = <0xffc41000 0x2c>;
interrupt-parent = <&gic>;
interrupts = <0 103 0x4>;
interrupts = <0 103 IRQ_TYPE_LEVEL_HIGH>;
#gpio-cells = <2>;
gpio-controller;
gpio-ranges = <&pfc 0 32 32>;
@ -80,7 +88,7 @@
compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
reg = <0xffc42000 0x2c>;
interrupt-parent = <&gic>;
interrupts = <0 103 0x4>;
interrupts = <0 103 IRQ_TYPE_LEVEL_HIGH>;
#gpio-cells = <2>;
gpio-controller;
gpio-ranges = <&pfc 0 64 32>;
@ -92,7 +100,7 @@
compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
reg = <0xffc43000 0x2c>;
interrupt-parent = <&gic>;
interrupts = <0 103 0x4>;
interrupts = <0 103 IRQ_TYPE_LEVEL_HIGH>;
#gpio-cells = <2>;
gpio-controller;
gpio-ranges = <&pfc 0 96 32>;
@ -104,7 +112,7 @@
compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
reg = <0xffc44000 0x2c>;
interrupt-parent = <&gic>;
interrupts = <0 103 0x4>;
interrupts = <0 103 IRQ_TYPE_LEVEL_HIGH>;
#gpio-cells = <2>;
gpio-controller;
gpio-ranges = <&pfc 0 128 27>;
@ -114,6 +122,148 @@
pfc: pfc@fffc0000 {
compatible = "renesas,pfc-r8a7778";
reg = <0xfffc000 0x118>;
reg = <0xfffc0000 0x118>;
};
i2c0: i2c@ffc70000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "renesas,i2c-r8a7778";
reg = <0xffc70000 0x1000>;
interrupt-parent = <&gic>;
interrupts = <0 67 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
i2c1: i2c@ffc71000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "renesas,i2c-r8a7778";
reg = <0xffc71000 0x1000>;
interrupt-parent = <&gic>;
interrupts = <0 78 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
i2c2: i2c@ffc72000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "renesas,i2c-r8a7778";
reg = <0xffc72000 0x1000>;
interrupt-parent = <&gic>;
interrupts = <0 76 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
i2c3: i2c@ffc73000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "renesas,i2c-r8a7778";
reg = <0xffc73000 0x1000>;
interrupt-parent = <&gic>;
interrupts = <0 77 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
mmcif: mmc@ffe4e000 {
compatible = "renesas,sh-mmcif";
reg = <0xffe4e000 0x100>;
interrupt-parent = <&gic>;
interrupts = <0 61 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
sdhi0: sd@ffe4c000 {
compatible = "renesas,sdhi-r8a7778";
reg = <0xffe4c000 0x100>;
interrupt-parent = <&gic>;
interrupts = <0 87 IRQ_TYPE_LEVEL_HIGH>;
cap-sd-highspeed;
cap-sdio-irq;
status = "disabled";
};
sdhi1: sd@ffe4d000 {
compatible = "renesas,sdhi-r8a7778";
reg = <0xffe4d000 0x100>;
interrupt-parent = <&gic>;
interrupts = <0 88 IRQ_TYPE_LEVEL_HIGH>;
cap-sd-highspeed;
cap-sdio-irq;
status = "disabled";
};
sdhi2: sd@ffe4f000 {
compatible = "renesas,sdhi-r8a7778";
reg = <0xffe4f000 0x100>;
interrupt-parent = <&gic>;
interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>;
cap-sd-highspeed;
cap-sdio-irq;
status = "disabled";
};
i2c0: i2c@ffc70000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "renesas,i2c-r8a7778";
reg = <0xffc70000 0x1000>;
interrupt-parent = <&gic>;
interrupts = <0 67 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
i2c1: i2c@ffc71000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "renesas,i2c-r8a7778";
reg = <0xffc71000 0x1000>;
interrupt-parent = <&gic>;
interrupts = <0 78 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
i2c2: i2c@ffc72000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "renesas,i2c-r8a7778";
reg = <0xffc72000 0x1000>;
interrupt-parent = <&gic>;
interrupts = <0 76 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
i2c3: i2c@ffc73000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "renesas,i2c-r8a7778";
reg = <0xffc73000 0x1000>;
interrupt-parent = <&gic>;
interrupts = <0 77 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
hspi0: spi@fffc7000 {
compatible = "renesas,hspi";
reg = <0xfffc7000 0x18>;
interrupt-controller = <&gic>;
interrupts = <0 63 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
hspi1: spi@fffc8000 {
compatible = "renesas,hspi";
reg = <0xfffc8000 0x18>;
interrupt-controller = <&gic>;
interrupts = <0 84 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
hspi2: spi@fffc6000 {
compatible = "renesas,hspi";
reg = <0xfffc6000 0x18>;
interrupt-controller = <&gic>;
interrupts = <0 85 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
};

36
arch/arm/boot/dts/r8a7779-marzen-reference.dts
View File

@ -10,8 +10,9 @@
*/
/dts-v1/;
/include/ "r8a7779.dtsi"
#include "r8a7779.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
/ {
model = "marzen";
@ -43,7 +44,7 @@
phy-mode = "mii";
interrupt-parent = <&irqpin0>;
interrupts = <1 0>; /* IRQ1: hwirq 1 on irqpin0 */
interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
reg-io-width = <4>;
vddvario-supply = <&fixedregulator3v3>;
vdd33a-supply = <&fixedregulator3v3>;
@ -68,7 +69,7 @@
};
&pfc {
pinctrl-0 = <&scif2_pins &scif4_pins &sdhi0_pins>;
pinctrl-0 = <&scif2_pins &scif4_pins>;
pinctrl-names = "default";
lan0_pins: lan0 {
@ -82,19 +83,38 @@
};
};
scif2_pins: scif2 {
scif2_pins: serial2 {
renesas,groups = "scif2_data_c";
renesas,function = "scif2";
};
scif4_pins: scif4 {
scif4_pins: serial4 {
renesas,groups = "scif4_data";
renesas,function = "scif4";
};
sdhi0_pins: sdhi0 {
renesas,groups = "sdhi0_data4", "sdhi0_ctrl", "sdhi0_cd",
"sdhi0_wp";
sdhi0_pins: sd0 {
renesas,groups = "sdhi0_data4", "sdhi0_ctrl", "sdhi0_cd";
renesas,function = "sdhi0";
};
hspi0_pins: hspi0 {
renesas,groups = "hspi0";
renesas,function = "hspi0";
};
};
&sdhi0 {
pinctrl-0 = <&sdhi0_pins>;
pinctrl-names = "default";
vmmc-supply = <&fixedregulator3v3>;
bus-width = <4>;
status = "okay";
};
&hspi0 {
pinctrl-0 = <&hspi0_pins>;
pinctrl-names = "default";
status = "okay";
};

2
arch/arm/boot/dts/r8a7779-marzen.dts
View File

@ -10,7 +10,7 @@
*/
/dts-v1/;
/include/ "r8a7779.dtsi"
#include "r8a7779.dtsi"
/ {
model = "marzen";

114
arch/arm/boot/dts/r8a7779.dtsi
View File

@ -11,6 +11,8 @@
/include/ "skeleton.dtsi"
#include <dt-bindings/interrupt-controller/irq.h>
/ {
compatible = "renesas,r8a7779";
@ -40,6 +42,12 @@
};
};
aliases {
spi0 = &hspi0;
spi1 = &hspi1;
spi2 = &hspi2;
};
gic: interrupt-controller@f0001000 {
compatible = "arm,cortex-a9-gic";
#interrupt-cells = <3>;
@ -52,7 +60,7 @@
compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
reg = <0xffc40000 0x2c>;
interrupt-parent = <&gic>;
interrupts = <0 141 0x4>;
interrupts = <0 141 IRQ_TYPE_LEVEL_HIGH>;
#gpio-cells = <2>;
gpio-controller;
gpio-ranges = <&pfc 0 0 32>;
@ -64,7 +72,7 @@
compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
reg = <0xffc41000 0x2c>;
interrupt-parent = <&gic>;
interrupts = <0 142 0x4>;
interrupts = <0 142 IRQ_TYPE_LEVEL_HIGH>;
#gpio-cells = <2>;
gpio-controller;
gpio-ranges = <&pfc 0 32 32>;
@ -76,7 +84,7 @@
compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
reg = <0xffc42000 0x2c>;
interrupt-parent = <&gic>;
interrupts = <0 143 0x4>;
interrupts = <0 143 IRQ_TYPE_LEVEL_HIGH>;
#gpio-cells = <2>;
gpio-controller;
gpio-ranges = <&pfc 0 64 32>;
@ -88,7 +96,7 @@
compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
reg = <0xffc43000 0x2c>;
interrupt-parent = <&gic>;
interrupts = <0 144 0x4>;
interrupts = <0 144 IRQ_TYPE_LEVEL_HIGH>;
#gpio-cells = <2>;
gpio-controller;
gpio-ranges = <&pfc 0 96 32>;
@ -100,7 +108,7 @@
compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
reg = <0xffc44000 0x2c>;
interrupt-parent = <&gic>;
interrupts = <0 145 0x4>;
interrupts = <0 145 IRQ_TYPE_LEVEL_HIGH>;
#gpio-cells = <2>;
gpio-controller;
gpio-ranges = <&pfc 0 128 32>;
@ -112,7 +120,7 @@
compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
reg = <0xffc45000 0x2c>;
interrupt-parent = <&gic>;
interrupts = <0 146 0x4>;
interrupts = <0 146 IRQ_TYPE_LEVEL_HIGH>;
#gpio-cells = <2>;
gpio-controller;
gpio-ranges = <&pfc 0 160 32>;
@ -124,7 +132,7 @@
compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
reg = <0xffc46000 0x2c>;
interrupt-parent = <&gic>;
interrupts = <0 147 0x4>;
interrupts = <0 147 IRQ_TYPE_LEVEL_HIGH>;
#gpio-cells = <2>;
gpio-controller;
gpio-ranges = <&pfc 0 192 9>;
@ -133,7 +141,7 @@
};
irqpin0: irqpin@fe780010 {
compatible = "renesas,intc-irqpin";
compatible = "renesas,intc-irqpin-r8a7779", "renesas,intc-irqpin";
#interrupt-cells = <2>;
status = "disabled";
interrupt-controller;
@ -143,50 +151,50 @@
<0xfe780044 4>,
<0xfe780064 4>;
interrupt-parent = <&gic>;
interrupts = <0 27 0x4
0 28 0x4
0 29 0x4
0 30 0x4>;
interrupts = <0 27 IRQ_TYPE_LEVEL_HIGH
0 28 IRQ_TYPE_LEVEL_HIGH
0 29 IRQ_TYPE_LEVEL_HIGH
0 30 IRQ_TYPE_LEVEL_HIGH>;
sense-bitfield-width = <2>;
};
i2c0: i2c@ffc70000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "renesas,rmobile-iic";
compatible = "renesas,i2c-r8a7779";
reg = <0xffc70000 0x1000>;
interrupt-parent = <&gic>;
interrupts = <0 79 0x4>;
interrupts = <0 79 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
i2c1: i2c@ffc71000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "renesas,rmobile-iic";
compatible = "renesas,i2c-r8a7779";
reg = <0xffc71000 0x1000>;
interrupt-parent = <&gic>;
interrupts = <0 82 0x4>;
interrupts = <0 82 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
i2c2: i2c@ffc72000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "renesas,rmobile-iic";
compatible = "renesas,i2c-r8a7779";
reg = <0xffc72000 0x1000>;
interrupt-parent = <&gic>;
interrupts = <0 80 0x4>;
interrupts = <0 80 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
i2c3: i2c@ffc73000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "renesas,rmobile-iic";
compatible = "renesas,i2c-r8a7779";
reg = <0xffc73000 0x1000>;
interrupt-parent = <&gic>;
interrupts = <0 81 0x4>;
interrupts = <0 81 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
@ -204,6 +212,70 @@
compatible = "renesas,rcar-sata";
reg = <0xfc600000 0x2000>;
interrupt-parent = <&gic>;
interrupts = <0 100 0x4>;
interrupts = <0 100 IRQ_TYPE_LEVEL_HIGH>;
};
sdhi0: sd@ffe4c000 {
compatible = "renesas,sdhi-r8a7779";
reg = <0xffe4c000 0x100>;
interrupt-parent = <&gic>;
interrupts = <0 104 IRQ_TYPE_LEVEL_HIGH>;
cap-sd-highspeed;
cap-sdio-irq;
status = "disabled";
};
sdhi1: sd@ffe4d000 {
compatible = "renesas,sdhi-r8a7779";
reg = <0xffe4d000 0x100>;
interrupt-parent = <&gic>;
interrupts = <0 105 IRQ_TYPE_LEVEL_HIGH>;
cap-sd-highspeed;
cap-sdio-irq;
status = "disabled";
};
sdhi2: sd@ffe4e000 {
compatible = "renesas,sdhi-r8a7779";
reg = <0xffe4e000 0x100>;
interrupt-parent = <&gic>;
interrupts = <0 107 IRQ_TYPE_LEVEL_HIGH>;
cap-sd-highspeed;
cap-sdio-irq;
status = "disabled";
};
sdhi3: sd@ffe4f000 {
compatible = "renesas,sdhi-r8a7779";
reg = <0xffe4f000 0x100>;
interrupt-parent = <&gic>;
interrupts = <0 106 IRQ_TYPE_LEVEL_HIGH>;
cap-sd-highspeed;
cap-sdio-irq;
status = "disabled";
};
hspi0: spi@fffc7000 {
compatible = "renesas,hspi";
reg = <0xfffc7000 0x18>;
interrupt-controller = <&gic>;
interrupts = <0 73 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
hspi1: spi@fffc8000 {
compatible = "renesas,hspi";
reg = <0xfffc8000 0x18>;
interrupt-controller = <&gic>;
interrupts = <0 74 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
hspi2: spi@fffc6000 {
compatible = "renesas,hspi";
reg = <0xfffc6000 0x18>;
interrupt-controller = <&gic>;
interrupts = <0 75 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
};

46
arch/arm/boot/dts/r8a7790-lager-reference.dts
View File

@ -9,7 +9,7 @@
*/
/dts-v1/;
/include/ "r8a7790.dtsi"
#include "r8a7790.dtsi"
#include <dt-bindings/gpio/gpio.h>
/ {
@ -25,6 +25,11 @@
reg = <0 0x40000000 0 0x80000000>;
};
memory@180000000 {
device_type = "memory";
reg = <1 0x80000000 0 0x80000000>;
};
lbsc {
#address-cells = <1>;
#size-cells = <1>;
@ -42,4 +47,43 @@
gpios = <&gpio5 17 GPIO_ACTIVE_HIGH>;
};
};
fixedregulator3v3: fixedregulator@0 {
compatible = "regulator-fixed";
regulator-name = "fixed-3.3V";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
regulator-always-on;
};
};
&pfc {
pinctrl-0 = <&scif0_pins &scif1_pins>;
pinctrl-names = "default";
scif0_pins: serial0 {
renesas,groups = "scif0_data";
renesas,function = "scif0";
};
scif1_pins: serial1 {
renesas,groups = "scif1_data";
renesas,function = "scif1";
};
mmc1_pins: mmc1 {
renesas,groups = "mmc1_data8", "mmc1_ctrl";
renesas,function = "mmc1";
};
};
&mmcif1 {
pinctrl-0 = <&mmc1_pins>;
pinctrl-names = "default";
vmmc-supply = <&fixedregulator3v3>;
bus-width = <8>;
non-removable;
status = "okay";
};

7
arch/arm/boot/dts/r8a7790-lager.dts
View File

@ -9,7 +9,7 @@
*/
/dts-v1/;
/include/ "r8a7790.dtsi"
#include "r8a7790.dtsi"
/ {
model = "Lager";
@ -24,6 +24,11 @@
reg = <0 0x40000000 0 0x80000000>;
};
memory@180000000 {
device_type = "memory";
reg = <1 0x80000000 0 0x80000000>;
};
lbsc {
#address-cells = <1>;
#size-cells = <1>;

73
arch/arm/boot/dts/r8a7790.dtsi
View File

@ -8,6 +8,9 @@
* kind, whether express or implied.
*/
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h>
/ {
compatible = "renesas,r8a7790";
interrupt-parent = <&gic>;
@ -84,14 +87,14 @@
<0 0xf1002000 0 0x1000>,
<0 0xf1004000 0 0x2000>,
<0 0xf1006000 0 0x2000>;
interrupts = <1 9 0xf04>;
interrupts = <1 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
};
gpio0: gpio@ffc40000 {
compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
reg = <0 0xffc40000 0 0x2c>;
interrupt-parent = <&gic>;
interrupts = <0 4 0x4>;
interrupts = <0 4 IRQ_TYPE_LEVEL_HIGH>;
#gpio-cells = <2>;
gpio-controller;
gpio-ranges = <&pfc 0 0 32>;
@ -103,7 +106,7 @@
compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
reg = <0 0xffc41000 0 0x2c>;
interrupt-parent = <&gic>;
interrupts = <0 5 0x4>;
interrupts = <0 5 IRQ_TYPE_LEVEL_HIGH>;
#gpio-cells = <2>;
gpio-controller;
gpio-ranges = <&pfc 0 32 32>;
@ -115,7 +118,7 @@
compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
reg = <0 0xffc42000 0 0x2c>;
interrupt-parent = <&gic>;
interrupts = <0 6 0x4>;
interrupts = <0 6 IRQ_TYPE_LEVEL_HIGH>;
#gpio-cells = <2>;
gpio-controller;
gpio-ranges = <&pfc 0 64 32>;
@ -127,7 +130,7 @@
compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
reg = <0 0xffc43000 0 0x2c>;
interrupt-parent = <&gic>;
interrupts = <0 7 0x4>;
interrupts = <0 7 IRQ_TYPE_LEVEL_HIGH>;
#gpio-cells = <2>;
gpio-controller;
gpio-ranges = <&pfc 0 96 32>;
@ -139,7 +142,7 @@
compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
reg = <0 0xffc44000 0 0x2c>;
interrupt-parent = <&gic>;
interrupts = <0 8 0x4>;
interrupts = <0 8 IRQ_TYPE_LEVEL_HIGH>;
#gpio-cells = <2>;
gpio-controller;
gpio-ranges = <&pfc 0 128 32>;
@ -151,7 +154,7 @@
compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
reg = <0 0xffc45000 0 0x2c>;
interrupt-parent = <&gic>;
interrupts = <0 9 0x4>;
interrupts = <0 9 IRQ_TYPE_LEVEL_HIGH>;
#gpio-cells = <2>;
gpio-controller;
gpio-ranges = <&pfc 0 160 32>;
@ -159,21 +162,31 @@
interrupt-controller;
};
thermal@e61f0000 {
compatible = "renesas,thermal-r8a7790", "renesas,rcar-thermal";
reg = <0 0xe61f0000 0 0x14>, <0 0xe61f0100 0 0x38>;
interrupt-parent = <&gic>;
interrupts = <0 69 IRQ_TYPE_LEVEL_HIGH>;
};
timer {
compatible = "arm,armv7-timer";
interrupts = <1 13 0xf08>,
<1 14 0xf08>,
<1 11 0xf08>,
<1 10 0xf08>;
interrupts = <1 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<1 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<1 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<1 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
};
irqc0: interrupt-controller@e61c0000 {
compatible = "renesas,irqc";
compatible = "renesas,irqc-r8a7790", "renesas,irqc";
#interrupt-cells = <2>;
interrupt-controller;
reg = <0 0xe61c0000 0 0x200>;
interrupt-parent = <&gic>;
interrupts = <0 0 4>, <0 1 4>, <0 2 4>, <0 3 4>;
interrupts = <0 0 IRQ_TYPE_LEVEL_HIGH>,
<0 1 IRQ_TYPE_LEVEL_HIGH>,
<0 2 IRQ_TYPE_LEVEL_HIGH>,
<0 3 IRQ_TYPE_LEVEL_HIGH>;
};
i2c0: i2c@e6508000 {
@ -182,7 +195,7 @@
compatible = "renesas,i2c-r8a7790";
reg = <0 0xe6508000 0 0x40>;
interrupt-parent = <&gic>;
interrupts = <0 287 0x4>;
interrupts = <0 287 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
@ -192,7 +205,7 @@
compatible = "renesas,i2c-r8a7790";
reg = <0 0xe6518000 0 0x40>;
interrupt-parent = <&gic>;
interrupts = <0 288 0x4>;
interrupts = <0 288 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
@ -202,7 +215,7 @@
compatible = "renesas,i2c-r8a7790";
reg = <0 0xe6530000 0 0x40>;
interrupt-parent = <&gic>;
interrupts = <0 286 0x4>;
interrupts = <0 286 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
@ -212,24 +225,24 @@
compatible = "renesas,i2c-r8a7790";
reg = <0 0xe6540000 0 0x40>;
interrupt-parent = <&gic>;
interrupts = <0 290 0x4>;
interrupts = <0 290 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
mmcif0: mmcif@ee200000 {
compatible = "renesas,sh-mmcif";
compatible = "renesas,mmcif-r8a7790", "renesas,sh-mmcif";
reg = <0 0xee200000 0 0x80>;
interrupt-parent = <&gic>;
interrupts = <0 169 0x4>;
interrupts = <0 169 IRQ_TYPE_LEVEL_HIGH>;
reg-io-width = <4>;
status = "disabled";
};
mmcif1: mmcif@ee220000 {
compatible = "renesas,sh-mmcif";
mmcif1: mmc@ee220000 {
compatible = "renesas,mmcif-r8a7790", "renesas,sh-mmcif";
reg = <0 0xee220000 0 0x80>;
interrupt-parent = <&gic>;
interrupts = <0 170 0x4>;
interrupts = <0 170 IRQ_TYPE_LEVEL_HIGH>;
reg-io-width = <4>;
status = "disabled";
};
@ -239,38 +252,38 @@
reg = <0 0xe6060000 0 0x250>;
};
sdhi0: sdhi@ee100000 {
sdhi0: sd@ee100000 {
compatible = "renesas,sdhi-r8a7790";
reg = <0 0xee100000 0 0x100>;
interrupt-parent = <&gic>;
interrupts = <0 165 4>;
interrupts = <0 165 IRQ_TYPE_LEVEL_HIGH>;
cap-sd-highspeed;
status = "disabled";
};
sdhi1: sdhi@ee120000 {
sdhi1: sd@ee120000 {
compatible = "renesas,sdhi-r8a7790";
reg = <0 0xee120000 0 0x100>;
interrupt-parent = <&gic>;
interrupts = <0 166 4>;
interrupts = <0 166 IRQ_TYPE_LEVEL_HIGH>;
cap-sd-highspeed;
status = "disabled";
};
sdhi2: sdhi@ee140000 {
sdhi2: sd@ee140000 {
compatible = "renesas,sdhi-r8a7790";
reg = <0 0xee140000 0 0x100>;
interrupt-parent = <&gic>;
interrupts = <0 167 4>;
interrupts = <0 167 IRQ_TYPE_LEVEL_HIGH>;
cap-sd-highspeed;
status = "disabled";
};
sdhi3: sdhi@ee160000 {
sdhi3: sd@ee160000 {
compatible = "renesas,sdhi-r8a7790";
reg = <0 0xee160000 0 0x100>;
interrupt-parent = <&gic>;
interrupts = <0 168 4>;
interrupts = <0 168 IRQ_TYPE_LEVEL_HIGH>;
cap-sd-highspeed;
status = "disabled";
};

61
arch/arm/boot/dts/r8a7791-koelsch-reference.dts Normal file
View File

@ -0,0 +1,61 @@
/*
* Device Tree Source for the Koelsch board
*
* Copyright (C) 2013 Renesas Electronics Corporation
* Copyright (C) 2013 Renesas Solutions Corp.
*
* This file is licensed under the terms of the GNU General Public License
* version 2. This program is licensed "as is" without any warranty of any
* kind, whether express or implied.
*/
/dts-v1/;
#include "r8a7791.dtsi"
#include <dt-bindings/gpio/gpio.h>
/ {
model = "Koelsch";
compatible = "renesas,koelsch-reference", "renesas,r8a7791";
chosen {
bootargs = "console=ttySC6,115200 ignore_loglevel rw root=/dev/nfs ip=dhcp";
};
memory@40000000 {
device_type = "memory";
reg = <0 0x40000000 0 0x80000000>;
};
lbsc {
#address-cells = <1>;
#size-cells = <1>;
};
leds {
compatible = "gpio-leds";
led6 {
gpios = <&gpio2 19 GPIO_ACTIVE_HIGH>;
};
led7 {
gpios = <&gpio2 20 GPIO_ACTIVE_HIGH>;
};
led8 {
gpios = <&gpio2 21 GPIO_ACTIVE_HIGH>;
};
};
};
&pfc {
pinctrl-0 = <&scif0_pins &scif1_pins>;
pinctrl-names = "default";
scif0_pins: serial0 {
renesas,groups = "scif0_data_d";
renesas,function = "scif0";
};
scif1_pins: serial1 {
renesas,groups = "scif1_data_d";
renesas,function = "scif1";
};
};

2
arch/arm/boot/dts/r8a7791-koelsch.dts
View File

@ -10,7 +10,7 @@
*/
/dts-v1/;
/include/ "r8a7791.dtsi"
#include "r8a7791.dtsi"
/ {
model = "Koelsch";

144
arch/arm/boot/dts/r8a7791.dtsi
View File

@ -9,6 +9,9 @@
* kind, whether express or implied.
*/
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h>
/ {
compatible = "renesas,r8a7791";
interrupt-parent = <&gic>;
@ -43,32 +46,141 @@
<0 0xf1002000 0 0x1000>,
<0 0xf1004000 0 0x2000>,
<0 0xf1006000 0 0x2000>;
interrupts = <1 9 0xf04>;
interrupts = <1 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
};
gpio0: gpio@e6050000 {
compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
reg = <0 0xe6050000 0 0x50>;
interrupt-parent = <&gic>;
interrupts = <0 4 IRQ_TYPE_LEVEL_HIGH>;
#gpio-cells = <2>;
gpio-controller;
gpio-ranges = <&pfc 0 0 32>;
#interrupt-cells = <2>;
interrupt-controller;
};
gpio1: gpio@e6051000 {
compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
reg = <0 0xe6051000 0 0x50>;
interrupt-parent = <&gic>;
interrupts = <0 5 IRQ_TYPE_LEVEL_HIGH>;
#gpio-cells = <2>;
gpio-controller;
gpio-ranges = <&pfc 0 32 32>;
#interrupt-cells = <2>;
interrupt-controller;
};
gpio2: gpio@e6052000 {
compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
reg = <0 0xe6052000 0 0x50>;
interrupt-parent = <&gic>;
interrupts = <0 6 IRQ_TYPE_LEVEL_HIGH>;
#gpio-cells = <2>;
gpio-controller;
gpio-ranges = <&pfc 0 64 32>;
#interrupt-cells = <2>;
interrupt-controller;
};
gpio3: gpio@e6053000 {
compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
reg = <0 0xe6053000 0 0x50>;
interrupt-parent = <&gic>;
interrupts = <0 7 IRQ_TYPE_LEVEL_HIGH>;
#gpio-cells = <2>;
gpio-controller;
gpio-ranges = <&pfc 0 96 32>;
#interrupt-cells = <2>;
interrupt-controller;
};
gpio4: gpio@e6054000 {
compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
reg = <0 0xe6054000 0 0x50>;
interrupt-parent = <&gic>;
interrupts = <0 8 IRQ_TYPE_LEVEL_HIGH>;
#gpio-cells = <2>;
gpio-controller;
gpio-ranges = <&pfc 0 128 32>;
#interrupt-cells = <2>;
interrupt-controller;
};
gpio5: gpio@e6055000 {
compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
reg = <0 0xe6055000 0 0x50>;
interrupt-parent = <&gic>;
interrupts = <0 9 IRQ_TYPE_LEVEL_HIGH>;
#gpio-cells = <2>;
gpio-controller;
gpio-ranges = <&pfc 0 160 32>;
#interrupt-cells = <2>;
interrupt-controller;
};
gpio6: gpio@e6055400 {
compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
reg = <0 0xe6055400 0 0x50>;
interrupt-parent = <&gic>;
interrupts = <0 10 IRQ_TYPE_LEVEL_HIGH>;
#gpio-cells = <2>;
gpio-controller;
gpio-ranges = <&pfc 0 192 32>;
#interrupt-cells = <2>;
interrupt-controller;
};
gpio7: gpio@e6055800 {
compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
reg = <0 0xe6055800 0 0x50>;
interrupt-parent = <&gic>;
interrupts = <0 11 IRQ_TYPE_LEVEL_HIGH>;
#gpio-cells = <2>;
gpio-controller;
gpio-ranges = <&pfc 0 224 26>;
#interrupt-cells = <2>;
interrupt-controller;
};
thermal@e61f0000 {
compatible = "renesas,thermal-r8a7791", "renesas,rcar-thermal";
reg = <0 0xe61f0000 0 0x14>, <0 0xe61f0100 0 0x38>;
interrupt-parent = <&gic>;
interrupts = <0 69 IRQ_TYPE_LEVEL_HIGH>;
};
timer {
compatible = "arm,armv7-timer";
interrupts = <1 13 0xf08>,
<1 14 0xf08>,
<1 11 0xf08>,
<1 10 0xf08>;
interrupts = <1 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<1 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<1 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<1 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
};
irqc0: interrupt-controller@e61c0000 {
compatible = "renesas,irqc";
compatible = "renesas,irqc-r8a7791", "renesas,irqc";
#interrupt-cells = <2>;
interrupt-controller;
reg = <0 0xe61c0000 0 0x200>;
interrupt-parent = <&gic>;
interrupts = <0 0 4>,
<0 1 4>,
<0 2 4>,
<0 3 4>,
<0 12 4>,
<0 13 4>,
<0 14 4>,
<0 15 4>,
<0 16 4>,
<0 17 4>;
interrupts = <0 0 IRQ_TYPE_LEVEL_HIGH>,
<0 1 IRQ_TYPE_LEVEL_HIGH>,
<0 2 IRQ_TYPE_LEVEL_HIGH>,
<0 3 IRQ_TYPE_LEVEL_HIGH>,
<0 12 IRQ_TYPE_LEVEL_HIGH>,
<0 13 IRQ_TYPE_LEVEL_HIGH>,
<0 14 IRQ_TYPE_LEVEL_HIGH>,
<0 15 IRQ_TYPE_LEVEL_HIGH>,
<0 16 IRQ_TYPE_LEVEL_HIGH>,
<0 17 IRQ_TYPE_LEVEL_HIGH>;
};
pfc: pfc@e6060000 {
compatible = "renesas,pfc-r8a7791";
reg = <0 0xe6060000 0 0x250>;
#gpio-range-cells = <3>;
};
};

2
arch/arm/boot/dts/sh7372-mackerel.dts
View File

@ -9,7 +9,7 @@
*/
/dts-v1/;
/include/ "sh7372.dtsi"
#include "sh7372.dtsi"
/ {
model = "Mackerel (AP4 EVM 2nd)";

70
arch/arm/boot/dts/sh73a0-kzm9g-reference.dts
View File

@ -12,8 +12,9 @@
*/
/dts-v1/;
/include/ "sh73a0.dtsi"
#include "sh73a0.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
/ {
model = "KZM-A9-GT";
@ -82,7 +83,7 @@
reg = <0x10000000 0x100>;
phy-mode = "mii";
interrupt-parent = <&irqpin0>;
interrupts = <3 0>; /* active low */
interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
reg-io-width = <4>;
smsc,irq-push-pull;
smsc,save-mac-address;
@ -105,6 +106,52 @@
gpios = <&pfc 23 GPIO_ACTIVE_LOW>;
};
};
gpio-keys {
compatible = "gpio-keys";
back-key {
gpios = <&pcf8575 8 GPIO_ACTIVE_LOW>;
linux,code = <158>;
label = "SW3";
};
right-key {
gpios = <&pcf8575 9 GPIO_ACTIVE_LOW>;
linux,code = <106>;
label = "SW2-R";
};
left-key {
gpios = <&pcf8575 10 GPIO_ACTIVE_LOW>;
linux,code = <105>;
label = "SW2-L";
};
enter-key {
gpios = <&pcf8575 11 GPIO_ACTIVE_LOW>;
linux,code = <28>;
label = "SW2-P";
};
up-key {
gpios = <&pcf8575 12 GPIO_ACTIVE_LOW>;
linux,code = <103>;
label = "SW2-U";
};
down-key {
gpios = <&pcf8575 13 GPIO_ACTIVE_LOW>;
linux,code = <108>;
label = "SW2-D";
};
home-key {
gpios = <&pcf8575 14 GPIO_ACTIVE_LOW>;
linux,code = <102>;
label = "SW1";
};
};
};
&i2c0 {
@ -185,6 +232,17 @@
pinctrl-0 = <&i2c3_pins>;
pinctrl-names = "default";
status = "okay";
pcf8575: gpio@20 {
compatible = "nxp,pcf8575";
reg = <0x20>;
interrupt-parent = <&irqpin2>;
interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
};
&mmcif {
@ -205,7 +263,7 @@
renesas,function = "i2c3";
};
mmcif_pins: mmcif {
mmcif_pins: mmc {
mux {
renesas,groups = "mmc0_data8_0", "mmc0_ctrl_0";
renesas,function = "mmc0";
@ -217,17 +275,17 @@
};
};
scifa4_pins: scifa4 {
scifa4_pins: serial4 {
renesas,groups = "scifa4_data", "scifa4_ctrl";
renesas,function = "scifa4";
};
sdhi0_pins: sdhi0 {
sdhi0_pins: sd0 {
renesas,groups = "sdhi0_data4", "sdhi0_ctrl", "sdhi0_cd", "sdhi0_wp";
renesas,function = "sdhi0";
};
sdhi2_pins: sdhi2 {
sdhi2_pins: sd2 {
renesas,groups = "sdhi2_data4", "sdhi2_ctrl";
renesas,function = "sdhi2";
};

2
arch/arm/boot/dts/sh73a0-kzm9g.dts
View File

@ -9,7 +9,7 @@
*/
/dts-v1/;
/include/ "sh73a0.dtsi"
#include "sh73a0.dtsi"
/ {
model = "KZM-A9-GT";

150
arch/arm/boot/dts/sh73a0.dtsi
View File

@ -10,6 +10,8 @@
/include/ "skeleton.dtsi"
#include <dt-bindings/interrupt-controller/irq.h>
/ {
compatible = "renesas,sh73a0";
@ -40,12 +42,12 @@
pmu {
compatible = "arm,cortex-a9-pmu";
interrupts = <0 55 4>,
<0 56 4>;
interrupts = <0 55 IRQ_TYPE_LEVEL_HIGH>,
<0 56 IRQ_TYPE_LEVEL_HIGH>;
};
irqpin0: irqpin@e6900000 {
compatible = "renesas,intc-irqpin";
compatible = "renesas,intc-irqpin-sh73a0", "renesas,intc-irqpin";
#interrupt-cells = <2>;
interrupt-controller;
reg = <0xe6900000 4>,
@ -54,18 +56,18 @@
<0xe6900040 1>,
<0xe6900060 1>;
interrupt-parent = <&gic>;
interrupts = <0 1 0x4
0 2 0x4
0 3 0x4
0 4 0x4
0 5 0x4
0 6 0x4
0 7 0x4
0 8 0x4>;
interrupts = <0 1 IRQ_TYPE_LEVEL_HIGH
0 2 IRQ_TYPE_LEVEL_HIGH
0 3 IRQ_TYPE_LEVEL_HIGH
0 4 IRQ_TYPE_LEVEL_HIGH
0 5 IRQ_TYPE_LEVEL_HIGH
0 6 IRQ_TYPE_LEVEL_HIGH
0 7 IRQ_TYPE_LEVEL_HIGH
0 8 IRQ_TYPE_LEVEL_HIGH>;
};
irqpin1: irqpin@e6900004 {
compatible = "renesas,intc-irqpin";
compatible = "renesas,intc-irqpin-sh73a0", "renesas,intc-irqpin";
#interrupt-cells = <2>;
interrupt-controller;
reg = <0xe6900004 4>,
@ -74,19 +76,19 @@
<0xe6900044 1>,
<0xe6900064 1>;
interrupt-parent = <&gic>;
interrupts = <0 9 0x4
0 10 0x4
0 11 0x4
0 12 0x4
0 13 0x4
0 14 0x4
0 15 0x4
0 16 0x4>;
interrupts = <0 9 IRQ_TYPE_LEVEL_HIGH
0 10 IRQ_TYPE_LEVEL_HIGH
0 11 IRQ_TYPE_LEVEL_HIGH
0 12 IRQ_TYPE_LEVEL_HIGH
0 13 IRQ_TYPE_LEVEL_HIGH
0 14 IRQ_TYPE_LEVEL_HIGH
0 15 IRQ_TYPE_LEVEL_HIGH
0 16 IRQ_TYPE_LEVEL_HIGH>;
control-parent;
};
irqpin2: irqpin@e6900008 {
compatible = "renesas,intc-irqpin";
compatible = "renesas,intc-irqpin-sh73a0", "renesas,intc-irqpin";
#interrupt-cells = <2>;
interrupt-controller;
reg = <0xe6900008 4>,
@ -95,18 +97,18 @@
<0xe6900048 1>,
<0xe6900068 1>;
interrupt-parent = <&gic>;
interrupts = <0 17 0x4
0 18 0x4
0 19 0x4
0 20 0x4
0 21 0x4
0 22 0x4
0 23 0x4
0 24 0x4>;
interrupts = <0 17 IRQ_TYPE_LEVEL_HIGH
0 18 IRQ_TYPE_LEVEL_HIGH
0 19 IRQ_TYPE_LEVEL_HIGH
0 20 IRQ_TYPE_LEVEL_HIGH
0 21 IRQ_TYPE_LEVEL_HIGH
0 22 IRQ_TYPE_LEVEL_HIGH
0 23 IRQ_TYPE_LEVEL_HIGH
0 24 IRQ_TYPE_LEVEL_HIGH>;
};
irqpin3: irqpin@e690000c {
compatible = "renesas,intc-irqpin";
compatible = "renesas,intc-irqpin-sh73a0", "renesas,intc-irqpin";
#interrupt-cells = <2>;
interrupt-controller;
reg = <0xe690000c 4>,
@ -115,14 +117,14 @@
<0xe690004c 1>,
<0xe690006c 1>;
interrupt-parent = <&gic>;
interrupts = <0 25 0x4
0 26 0x4
0 27 0x4
0 28 0x4
0 29 0x4
0 30 0x4
0 31 0x4
0 32 0x4>;
interrupts = <0 25 IRQ_TYPE_LEVEL_HIGH
0 26 IRQ_TYPE_LEVEL_HIGH
0 27 IRQ_TYPE_LEVEL_HIGH
0 28 IRQ_TYPE_LEVEL_HIGH
0 29 IRQ_TYPE_LEVEL_HIGH
0 30 IRQ_TYPE_LEVEL_HIGH
0 31 IRQ_TYPE_LEVEL_HIGH
0 32 IRQ_TYPE_LEVEL_HIGH>;
};
i2c0: i2c@e6820000 {
@ -131,10 +133,10 @@
compatible = "renesas,rmobile-iic";
reg = <0xe6820000 0x425>;
interrupt-parent = <&gic>;
interrupts = <0 167 0x4
0 168 0x4
0 169 0x4
0 170 0x4>;
interrupts = <0 167 IRQ_TYPE_LEVEL_HIGH
0 168 IRQ_TYPE_LEVEL_HIGH
0 169 IRQ_TYPE_LEVEL_HIGH
0 170 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
@ -144,10 +146,10 @@
compatible = "renesas,rmobile-iic";
reg = <0xe6822000 0x425>;
interrupt-parent = <&gic>;
interrupts = <0 51 0x4
0 52 0x4
0 53 0x4
0 54 0x4>;
interrupts = <0 51 IRQ_TYPE_LEVEL_HIGH
0 52 IRQ_TYPE_LEVEL_HIGH
0 53 IRQ_TYPE_LEVEL_HIGH
0 54 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
@ -157,10 +159,10 @@
compatible = "renesas,rmobile-iic";
reg = <0xe6824000 0x425>;
interrupt-parent = <&gic>;
interrupts = <0 171 0x4
0 172 0x4
0 173 0x4
0 174 0x4>;
interrupts = <0 171 IRQ_TYPE_LEVEL_HIGH
0 172 IRQ_TYPE_LEVEL_HIGH
0 173 IRQ_TYPE_LEVEL_HIGH
0 174 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
@ -170,10 +172,10 @@
compatible = "renesas,rmobile-iic";
reg = <0xe6826000 0x425>;
interrupt-parent = <&gic>;
interrupts = <0 183 0x4
0 184 0x4
0 185 0x4
0 186 0x4>;
interrupts = <0 183 IRQ_TYPE_LEVEL_HIGH
0 184 IRQ_TYPE_LEVEL_HIGH
0 185 IRQ_TYPE_LEVEL_HIGH
0 186 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
@ -183,52 +185,52 @@
compatible = "renesas,rmobile-iic";
reg = <0xe6828000 0x425>;
interrupt-parent = <&gic>;
interrupts = <0 187 0x4
0 188 0x4
0 189 0x4
0 190 0x4>;
interrupts = <0 187 IRQ_TYPE_LEVEL_HIGH
0 188 IRQ_TYPE_LEVEL_HIGH
0 189 IRQ_TYPE_LEVEL_HIGH
0 190 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
mmcif: mmcif@e6bd0000 {
mmcif: mmc@e6bd0000 {
compatible = "renesas,sh-mmcif";
reg = <0xe6bd0000 0x100>;
interrupt-parent = <&gic>;
interrupts = <0 140 0x4
0 141 0x4>;
interrupts = <0 140 IRQ_TYPE_LEVEL_HIGH
0 141 IRQ_TYPE_LEVEL_HIGH>;
reg-io-width = <4>;
status = "disabled";
};
sdhi0: sdhi@ee100000 {
compatible = "renesas,sdhi-r8a7740";
sdhi0: sd@ee100000 {
compatible = "renesas,sdhi-sh73a0";
reg = <0xee100000 0x100>;
interrupt-parent = <&gic>;
interrupts = <0 83 4
0 84 4
0 85 4>;
interrupts = <0 83 IRQ_TYPE_LEVEL_HIGH
0 84 IRQ_TYPE_LEVEL_HIGH
0 85 IRQ_TYPE_LEVEL_HIGH>;
cap-sd-highspeed;
status = "disabled";
};
/* SDHI1 and SDHI2 have no CD pins, no need for CD IRQ */
sdhi1: sdhi@ee120000 {
compatible = "renesas,sdhi-r8a7740";
sdhi1: sd@ee120000 {
compatible = "renesas,sdhi-sh73a0";
reg = <0xee120000 0x100>;
interrupt-parent = <&gic>;
interrupts = <0 88 4
0 89 4>;
interrupts = <0 88 IRQ_TYPE_LEVEL_HIGH
0 89 IRQ_TYPE_LEVEL_HIGH>;
toshiba,mmc-wrprotect-disable;
cap-sd-highspeed;
status = "disabled";
};
sdhi2: sdhi@ee140000 {
compatible = "renesas,sdhi-r8a7740";
sdhi2: sd@ee140000 {
compatible = "renesas,sdhi-sh73a0";
reg = <0xee140000 0x100>;
interrupt-parent = <&gic>;
interrupts = <0 104 4
0 105 4>;
interrupts = <0 104 IRQ_TYPE_LEVEL_HIGH
0 105 IRQ_TYPE_LEVEL_HIGH>;
toshiba,mmc-wrprotect-disable;
cap-sd-highspeed;
status = "disabled";

2
arch/arm/configs/ape6evm_defconfig
View File

@ -13,7 +13,7 @@ CONFIG_EMBEDDED=y
CONFIG_PERF_EVENTS=y
CONFIG_SLAB=y
# CONFIG_BLOCK is not set
CONFIG_ARCH_SHMOBILE=y
CONFIG_ARCH_SHMOBILE_LEGACY=y
CONFIG_ARCH_R8A73A4=y
CONFIG_MACH_APE6EVM=y
# CONFIG_ARM_THUMB is not set

2
arch/arm/configs/armadillo800eva_defconfig
View File

@ -15,7 +15,7 @@ CONFIG_MODULE_FORCE_UNLOAD=y
# CONFIG_BLK_DEV_BSG is not set
# CONFIG_IOSCHED_DEADLINE is not set
# CONFIG_IOSCHED_CFQ is not set
CONFIG_ARCH_SHMOBILE=y
CONFIG_ARCH_SHMOBILE_LEGACY=y
CONFIG_ARCH_R8A7740=y
CONFIG_MACH_ARMADILLO800EVA=y
# CONFIG_SH_TIMER_TMU is not set

2
arch/arm/configs/bockw_defconfig
View File

@ -8,7 +8,7 @@ CONFIG_SYSCTL_SYSCALL=y
CONFIG_EMBEDDED=y
CONFIG_SLAB=y
# CONFIG_IOSCHED_CFQ is not set
CONFIG_ARCH_SHMOBILE=y
CONFIG_ARCH_SHMOBILE_LEGACY=y
CONFIG_ARCH_R8A7778=y
CONFIG_MACH_BOCKW=y
CONFIG_MEMORY_START=0x60000000

2
arch/arm/configs/koelsch_defconfig
View File

@ -9,7 +9,7 @@ CONFIG_EMBEDDED=y
CONFIG_PERF_EVENTS=y
CONFIG_SLAB=y
# CONFIG_BLOCK is not set
CONFIG_ARCH_SHMOBILE=y
CONFIG_ARCH_SHMOBILE_LEGACY=y
CONFIG_ARCH_R8A7791=y
CONFIG_MACH_KOELSCH=y
# CONFIG_SWP_EMULATE is not set

2
arch/arm/configs/kzm9d_defconfig
View File

@ -13,7 +13,7 @@ CONFIG_SLAB=y
# CONFIG_BLK_DEV_BSG is not set
# CONFIG_IOSCHED_DEADLINE is not set
# CONFIG_IOSCHED_CFQ is not set
CONFIG_ARCH_SHMOBILE=y
CONFIG_ARCH_SHMOBILE_LEGACY=y
CONFIG_ARCH_EMEV2=y
CONFIG_MACH_KZM9D=y
CONFIG_MEMORY_START=0x40000000

2
arch/arm/configs/kzm9g_defconfig
View File

@ -22,7 +22,7 @@ CONFIG_MODULE_UNLOAD=y
# CONFIG_BLK_DEV_BSG is not set
# CONFIG_IOSCHED_DEADLINE is not set
# CONFIG_IOSCHED_CFQ is not set
CONFIG_ARCH_SHMOBILE=y
CONFIG_ARCH_SHMOBILE_LEGACY=y
CONFIG_ARCH_SH73A0=y
CONFIG_MACH_KZM9G=y
CONFIG_MEMORY_START=0x41000000

2
arch/arm/configs/lager_defconfig
View File

@ -12,7 +12,7 @@ CONFIG_SLAB=y
# CONFIG_BLK_DEV_BSG is not set
# CONFIG_IOSCHED_DEADLINE is not set
# CONFIG_IOSCHED_CFQ is not set
CONFIG_ARCH_SHMOBILE=y
CONFIG_ARCH_SHMOBILE_LEGACY=y
CONFIG_ARCH_R8A7790=y
CONFIG_MACH_LAGER=y
# CONFIG_SH_TIMER_TMU is not set

2
arch/arm/configs/mackerel_defconfig
View File

@ -14,7 +14,7 @@ CONFIG_MODULE_UNLOAD=y
# CONFIG_BLK_DEV_BSG is not set
# CONFIG_IOSCHED_DEADLINE is not set
# CONFIG_IOSCHED_CFQ is not set
CONFIG_ARCH_SHMOBILE=y
CONFIG_ARCH_SHMOBILE_LEGACY=y
CONFIG_ARCH_SH7372=y
CONFIG_MACH_MACKEREL=y
CONFIG_MEMORY_SIZE=0x10000000

2
arch/arm/configs/marzen_defconfig
View File

@ -9,7 +9,7 @@ CONFIG_SYSCTL_SYSCALL=y
CONFIG_EMBEDDED=y
CONFIG_SLAB=y
# CONFIG_IOSCHED_CFQ is not set
CONFIG_ARCH_SHMOBILE=y
CONFIG_ARCH_SHMOBILE_LEGACY=y
CONFIG_ARCH_R8A7779=y
CONFIG_MACH_MARZEN=y
CONFIG_MEMORY_START=0x60000000

19
arch/arm/mach-shmobile/Kconfig
View File

@ -1,6 +1,10 @@
config ARCH_SHMOBILE
bool
config ARCH_SHMOBILE_MULTI
bool "SH-Mobile Series" if ARCH_MULTI_V7
depends on MMU
select ARCH_SHMOBILE
select CPU_V7
select GENERIC_CLOCKEVENTS
select HAVE_ARM_SCU if SMP
@ -30,7 +34,7 @@ config MACH_KZM9D
comment "SH-Mobile System Configuration"
endif
if ARCH_SHMOBILE
if ARCH_SHMOBILE_LEGACY
comment "SH-Mobile System Type"
@ -97,18 +101,23 @@ config ARCH_R8A7790
config ARCH_R8A7791
bool "R-Car M2 (R8A77910)"
select ARCH_WANT_OPTIONAL_GPIOLIB
select ARM_GIC
select CPU_V7
select SH_CLK_CPG
select RENESAS_IRQC
config ARCH_EMEV2
bool "Emma Mobile EV2"
select ARCH_WANT_OPTIONAL_GPIOLIB
select ARM_GIC
select CPU_V7
select USE_OF
select AUTO_ZRELADDR
config ARCH_R7S72100
bool "RZ/A1H (R7S72100)"
select ARCH_WANT_OPTIONAL_GPIOLIB
select ARM_GIC
select CPU_V7
select SH_CLK_CPG
@ -231,12 +240,6 @@ config MACH_KOELSCH
depends on ARCH_R8A7791
select USE_OF
config MACH_KZM9D
bool "KZM9D board"
depends on ARCH_EMEV2
select REGULATOR_FIXED_VOLTAGE if REGULATOR
select USE_OF
config MACH_KZM9G
bool "KZM-A9-GT board"
depends on ARCH_SH73A0
@ -274,7 +277,7 @@ source "drivers/sh/Kconfig"
endif
if ARCH_SHMOBILE || ARCH_SHMOBILE_MULTI
if ARCH_SHMOBILE
menu "Timer and clock configuration"

1
arch/arm/mach-shmobile/Makefile
View File

@ -71,7 +71,6 @@ obj-$(CONFIG_MACH_LAGER_REFERENCE) += board-lager-reference.o
obj-$(CONFIG_MACH_ARMADILLO800EVA) += board-armadillo800eva.o
obj-$(CONFIG_MACH_ARMADILLO800EVA_REFERENCE) += board-armadillo800eva-reference.o
obj-$(CONFIG_MACH_KOELSCH) += board-koelsch.o
obj-$(CONFIG_MACH_KZM9D) += board-kzm9d.o
obj-$(CONFIG_MACH_KZM9G) += board-kzm9g.o
obj-$(CONFIG_MACH_KZM9G_REFERENCE) += board-kzm9g-reference.o
endif

1
arch/arm/mach-shmobile/Makefile.boot
View File

@ -8,7 +8,6 @@ loadaddr-$(CONFIG_MACH_BOCKW) += 0x60008000
loadaddr-$(CONFIG_MACH_BOCKW_REFERENCE) += 0x60008000
loadaddr-$(CONFIG_MACH_GENMAI) += 0x8008000
loadaddr-$(CONFIG_MACH_KOELSCH) += 0x40008000
loadaddr-$(CONFIG_MACH_KZM9D) += 0x40008000
loadaddr-$(CONFIG_MACH_KZM9G) += 0x41008000
loadaddr-$(CONFIG_MACH_KZM9G_REFERENCE) += 0x41008000
loadaddr-$(CONFIG_MACH_LAGER) += 0x40008000

12
arch/arm/mach-shmobile/board-bockw-reference.c
View File

@ -27,14 +27,6 @@
* see board-bock.c for checking detail of dip-switch
*/
static const struct pinctrl_map bockw_pinctrl_map[] = {
/* SCIF0 */
PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.0", "pfc-r8a7778",
"scif0_data_a", "scif0"),
PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.0", "pfc-r8a7778",
"scif0_ctrl", "scif0"),
};
#define FPGA 0x18200000
#define IRQ0MR 0x30
#define COMCTLR 0x101c
@ -44,10 +36,6 @@ static void __init bockw_init(void)
r8a7778_clock_init();
r8a7778_init_irq_extpin_dt(1);
pinctrl_register_mappings(bockw_pinctrl_map,
ARRAY_SIZE(bockw_pinctrl_map));
r8a7778_pinmux_init();
r8a7778_add_dt_devices();
fpga = ioremap_nocache(FPGA, SZ_1M);

92
arch/arm/mach-shmobile/board-kzm9d.c
View File

@ -1,92 +0,0 @@
/*
* kzm9d board support
*
* Copyright (C) 2012 Renesas Solutions Corp.
* Copyright (C) 2012 Magnus Damm
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <linux/kernel.h>
#include <linux/interrupt.h>
#include <linux/platform_device.h>
#include <linux/regulator/fixed.h>
#include <linux/regulator/machine.h>
#include <linux/smsc911x.h>
#include <mach/common.h>
#include <mach/emev2.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
/* Dummy supplies, where voltage doesn't matter */
static struct regulator_consumer_supply dummy_supplies[] = {
REGULATOR_SUPPLY("vddvario", "smsc911x"),
REGULATOR_SUPPLY("vdd33a", "smsc911x"),
};
/* Ether */
static struct resource smsc911x_resources[] = {
[0] = {
.start = 0x20000000,
.end = 0x2000ffff,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = EMEV2_GPIO_IRQ(1),
.flags = IORESOURCE_IRQ | IRQF_TRIGGER_HIGH,
},
};
static struct smsc911x_platform_config smsc911x_platdata = {
.flags = SMSC911X_USE_32BIT,
.irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
.irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH,
};
static struct platform_device smsc91x_device = {
.name = "smsc911x",
.id = -1,
.dev = {
.platform_data = &smsc911x_platdata,
},
.num_resources = ARRAY_SIZE(smsc911x_resources),
.resource = smsc911x_resources,
};
static struct platform_device *kzm9d_devices[] __initdata = {
&smsc91x_device,
};
void __init kzm9d_add_standard_devices(void)
{
regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
emev2_add_standard_devices();
platform_add_devices(kzm9d_devices, ARRAY_SIZE(kzm9d_devices));
}
static const char *kzm9d_boards_compat_dt[] __initdata = {
"renesas,kzm9d",
NULL,
};
DT_MACHINE_START(KZM9D_DT, "kzm9d")
.smp = smp_ops(emev2_smp_ops),
.map_io = emev2_map_io,
.init_early = emev2_init_delay,
.init_machine = kzm9d_add_standard_devices,
.init_late = shmobile_init_late,
.dt_compat = kzm9d_boards_compat_dt,
MACHINE_END

2
arch/arm/mach-shmobile/board-marzen.c
View File

@ -347,8 +347,6 @@ static const struct pinctrl_map marzen_pinctrl_map[] = {
"sdhi0_ctrl", "sdhi0"),
PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7779",
"sdhi0_cd", "sdhi0"),
PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7779",
"sdhi0_wp", "sdhi0"),
/* SMSC */
PIN_MAP_MUX_GROUP_DEFAULT("smsc911x", "pfc-r8a7779",
"intc_irq1_b", "intc"),

1
arch/arm/mach-shmobile/clock-r7s72100.c
View File

@ -181,6 +181,7 @@ static struct clk_lookup lookups[] = {
CLKDEV_ICK_ID("sci_fck", "sh-sci.5", &mstp_clks[MSTP42]),
CLKDEV_ICK_ID("sci_fck", "sh-sci.6", &mstp_clks[MSTP41]),
CLKDEV_ICK_ID("sci_fck", "sh-sci.7", &mstp_clks[MSTP40]),
CLKDEV_CON_ID("mtu2_fck", &mstp_clks[MSTP33]),
};
void __init r7s72100_clock_init(void)

10
arch/arm/mach-shmobile/clock-r8a73a4.c
View File

@ -584,15 +584,15 @@ static struct clk_lookup lookups[] = {
CLKDEV_DEV_ID("rcar_thermal", &mstp_clks[MSTP522]),
CLKDEV_DEV_ID("e6520000.i2c", &mstp_clks[MSTP300]),
CLKDEV_DEV_ID("sh_mmcif.1", &mstp_clks[MSTP305]),
CLKDEV_DEV_ID("ee220000.mmcif", &mstp_clks[MSTP305]),
CLKDEV_DEV_ID("ee220000.mmc", &mstp_clks[MSTP305]),
CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP312]),
CLKDEV_DEV_ID("ee140000.sdhi", &mstp_clks[MSTP312]),
CLKDEV_DEV_ID("ee140000.sd", &mstp_clks[MSTP312]),
CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP313]),
CLKDEV_DEV_ID("ee120000.sdhi", &mstp_clks[MSTP313]),
CLKDEV_DEV_ID("ee120000.sd", &mstp_clks[MSTP313]),
CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP314]),
CLKDEV_DEV_ID("ee100000.sdhi", &mstp_clks[MSTP314]),
CLKDEV_DEV_ID("ee100000.sd", &mstp_clks[MSTP314]),
CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP315]),
CLKDEV_DEV_ID("ee200000.mmcif", &mstp_clks[MSTP315]),
CLKDEV_DEV_ID("ee200000.mmc", &mstp_clks[MSTP315]),
CLKDEV_DEV_ID("e6550000.i2c", &mstp_clks[MSTP316]),
CLKDEV_DEV_ID("e6560000.i2c", &mstp_clks[MSTP317]),
CLKDEV_DEV_ID("e6500000.i2c", &mstp_clks[MSTP318]),

9
arch/arm/mach-shmobile/clock-r8a7740.c
View File

@ -585,22 +585,23 @@ static struct clk_lookup lookups[] = {
CLKDEV_DEV_ID("sh_cmt.10", &mstp_clks[MSTP329]),
CLKDEV_DEV_ID("sh_fsi2", &mstp_clks[MSTP328]),
CLKDEV_DEV_ID("fe1f0000.sound", &mstp_clks[MSTP328]),
CLKDEV_DEV_ID("i2c-sh_mobile.1", &mstp_clks[MSTP323]),
CLKDEV_DEV_ID("e6c20000.i2c", &mstp_clks[MSTP323]),
CLKDEV_DEV_ID("renesas_usbhs", &mstp_clks[MSTP320]),
CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP314]),
CLKDEV_DEV_ID("e6850000.sdhi", &mstp_clks[MSTP314]),
CLKDEV_DEV_ID("e6850000.sd", &mstp_clks[MSTP314]),
CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP313]),
CLKDEV_DEV_ID("e6860000.sdhi", &mstp_clks[MSTP313]),
CLKDEV_DEV_ID("e6860000.sd", &mstp_clks[MSTP313]),
CLKDEV_DEV_ID("sh_mmcif", &mstp_clks[MSTP312]),
CLKDEV_DEV_ID("e6bd0000.mmcif", &mstp_clks[MSTP312]),
CLKDEV_DEV_ID("e6bd0000.mmc", &mstp_clks[MSTP312]),
CLKDEV_DEV_ID("r8a7740-gether", &mstp_clks[MSTP309]),
CLKDEV_DEV_ID("e9a00000.sh-eth", &mstp_clks[MSTP309]),
CLKDEV_DEV_ID("renesas-tpu-pwm", &mstp_clks[MSTP304]),
CLKDEV_DEV_ID("e6600000.pwm", &mstp_clks[MSTP304]),
CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP415]),
CLKDEV_DEV_ID("e6870000.sdhi", &mstp_clks[MSTP415]),
CLKDEV_DEV_ID("e6870000.sd", &mstp_clks[MSTP415]),
/* ICK */
CLKDEV_ICK_ID("host", "renesas_usbhs", &mstp_clks[MSTP416]),

11
arch/arm/mach-shmobile/clock-r8a7778.c
View File

@ -173,9 +173,13 @@ static struct clk_lookup lookups[] = {
/* MSTP32 clocks */
CLKDEV_DEV_ID("sh_mmcif", &mstp_clks[MSTP331]), /* MMC */
CLKDEV_DEV_ID("ffe4e000.mmc", &mstp_clks[MSTP331]), /* MMC */
CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP323]), /* SDHI0 */
CLKDEV_DEV_ID("ffe4c000.sd", &mstp_clks[MSTP323]), /* SDHI0 */
CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP322]), /* SDHI1 */
CLKDEV_DEV_ID("ffe4d000.sd", &mstp_clks[MSTP322]), /* SDHI1 */
CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP321]), /* SDHI2 */
CLKDEV_DEV_ID("ffe4f000.sd", &mstp_clks[MSTP321]), /* SDHI2 */
CLKDEV_DEV_ID("r8a777x-ether", &mstp_clks[MSTP114]), /* Ether */
CLKDEV_DEV_ID("r8a7778-vin.0", &mstp_clks[MSTP110]), /* VIN0 */
CLKDEV_DEV_ID("r8a7778-vin.1", &mstp_clks[MSTP109]), /* VIN1 */
@ -183,9 +187,13 @@ static struct clk_lookup lookups[] = {
CLKDEV_DEV_ID("ohci-platform", &mstp_clks[MSTP100]), /* USB OHCI port0/1 */
CLKDEV_DEV_ID("renesas_usbhs", &mstp_clks[MSTP100]), /* USB FUNC */
CLKDEV_DEV_ID("i2c-rcar.0", &mstp_clks[MSTP030]), /* I2C0 */
CLKDEV_DEV_ID("ffc70000.i2c", &mstp_clks[MSTP030]), /* I2C0 */
CLKDEV_DEV_ID("i2c-rcar.1", &mstp_clks[MSTP029]), /* I2C1 */
CLKDEV_DEV_ID("ffc71000.i2c", &mstp_clks[MSTP029]), /* I2C1 */
CLKDEV_DEV_ID("i2c-rcar.2", &mstp_clks[MSTP028]), /* I2C2 */
CLKDEV_DEV_ID("ffc72000.i2c", &mstp_clks[MSTP028]), /* I2C2 */
CLKDEV_DEV_ID("i2c-rcar.3", &mstp_clks[MSTP027]), /* I2C3 */
CLKDEV_DEV_ID("ffc73000.i2c", &mstp_clks[MSTP027]), /* I2C3 */
CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP026]), /* SCIF0 */
CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[MSTP025]), /* SCIF1 */
CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[MSTP024]), /* SCIF2 */
@ -195,8 +203,11 @@ static struct clk_lookup lookups[] = {
CLKDEV_DEV_ID("sh_tmu.0", &mstp_clks[MSTP016]), /* TMU00 */
CLKDEV_DEV_ID("sh_tmu.1", &mstp_clks[MSTP015]), /* TMU01 */
CLKDEV_DEV_ID("sh-hspi.0", &mstp_clks[MSTP007]), /* HSPI0 */
CLKDEV_DEV_ID("fffc7000.spi", &mstp_clks[MSTP007]), /* HSPI0 */
CLKDEV_DEV_ID("sh-hspi.1", &mstp_clks[MSTP007]), /* HSPI1 */
CLKDEV_DEV_ID("fffc8000.spi", &mstp_clks[MSTP007]), /* HSPI1 */
CLKDEV_DEV_ID("sh-hspi.2", &mstp_clks[MSTP007]), /* HSPI2 */
CLKDEV_DEV_ID("fffc6000.spi", &mstp_clks[MSTP007]), /* HSPI2 */
CLKDEV_DEV_ID("rcar_sound", &mstp_clks[MSTP008]), /* SRU */
CLKDEV_ICK_ID("ssi.0", "rcar_sound", &mstp_clks[MSTP012]),

11
arch/arm/mach-shmobile/clock-r8a7779.c
View File

@ -184,9 +184,13 @@ static struct clk_lookup lookups[] = {
CLKDEV_DEV_ID("sh_tmu.1", &mstp_clks[MSTP016]), /* TMU01 */
CLKDEV_DEV_ID("sh_tmu.2", &mstp_clks[MSTP016]), /* TMU02 */
CLKDEV_DEV_ID("i2c-rcar.0", &mstp_clks[MSTP030]), /* I2C0 */
CLKDEV_DEV_ID("ffc70000.i2c", &mstp_clks[MSTP030]), /* I2C0 */
CLKDEV_DEV_ID("i2c-rcar.1", &mstp_clks[MSTP029]), /* I2C1 */
CLKDEV_DEV_ID("ffc71000.i2c", &mstp_clks[MSTP029]), /* I2C1 */
CLKDEV_DEV_ID("i2c-rcar.2", &mstp_clks[MSTP028]), /* I2C2 */
CLKDEV_DEV_ID("ffc72000.i2c", &mstp_clks[MSTP028]), /* I2C2 */
CLKDEV_DEV_ID("i2c-rcar.3", &mstp_clks[MSTP027]), /* I2C3 */
CLKDEV_DEV_ID("ffc73000.i2c", &mstp_clks[MSTP027]), /* I2C3 */
CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP026]), /* SCIF0 */
CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[MSTP025]), /* SCIF1 */
CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[MSTP024]), /* SCIF2 */
@ -194,12 +198,19 @@ static struct clk_lookup lookups[] = {
CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[MSTP022]), /* SCIF4 */
CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP021]), /* SCIF6 */
CLKDEV_DEV_ID("sh-hspi.0", &mstp_clks[MSTP007]), /* HSPI0 */
CLKDEV_DEV_ID("fffc7000.spi", &mstp_clks[MSTP007]), /* HSPI0 */
CLKDEV_DEV_ID("sh-hspi.1", &mstp_clks[MSTP007]), /* HSPI1 */
CLKDEV_DEV_ID("fffc8000.spi", &mstp_clks[MSTP007]), /* HSPI1 */
CLKDEV_DEV_ID("sh-hspi.2", &mstp_clks[MSTP007]), /* HSPI2 */
CLKDEV_DEV_ID("fffc6000.spi", &mstp_clks[MSTP007]), /* HSPI2 */
CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP323]), /* SDHI0 */
CLKDEV_DEV_ID("ffe4c000.sd", &mstp_clks[MSTP323]), /* SDHI0 */
CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP322]), /* SDHI1 */
CLKDEV_DEV_ID("ffe4d000.sd", &mstp_clks[MSTP322]), /* SDHI1 */
CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP321]), /* SDHI2 */
CLKDEV_DEV_ID("ffe4e000.sd", &mstp_clks[MSTP321]), /* SDHI2 */
CLKDEV_DEV_ID("sh_mobile_sdhi.3", &mstp_clks[MSTP320]), /* SDHI3 */
CLKDEV_DEV_ID("ffe4f000.sd", &mstp_clks[MSTP320]), /* SDHI3 */
CLKDEV_DEV_ID("rcar-du-r8a7779", &mstp_clks[MSTP103]), /* DU */
};

70
arch/arm/mach-shmobile/clock-r8a7790.c
View File

@ -53,6 +53,7 @@
#define SMSTPCR7 0xe615014c
#define SMSTPCR8 0xe6150990
#define SMSTPCR9 0xe6150994
#define SMSTPCR10 0xe6150998
#define SDCKCR 0xE6150074
#define SD2CKCR 0xE6150078
@ -182,10 +183,14 @@ static struct clk div6_clks[DIV6_NR] = {
/* MSTP */
enum {
MSTP1015, MSTP1014, MSTP1013, MSTP1012, MSTP1011, MSTP1010,
MSTP1009, MSTP1008, MSTP1007, MSTP1006, MSTP1005,
MSTP931, MSTP930, MSTP929, MSTP928,
MSTP917,
MSTP813,
MSTP726, MSTP725, MSTP724, MSTP723, MSTP722, MSTP721, MSTP720,
MSTP717, MSTP716,
MSTP704,
MSTP522,
MSTP315, MSTP314, MSTP313, MSTP312, MSTP311, MSTP305, MSTP304,
MSTP216, MSTP207, MSTP206, MSTP204, MSTP203, MSTP202,
@ -194,10 +199,22 @@ enum {
};
static struct clk mstp_clks[MSTP_NR] = {
[MSTP931] = SH_CLK_MSTP32(&hp_clk, SMSTPCR9, 31, 0), /* I2C0 */
[MSTP930] = SH_CLK_MSTP32(&hp_clk, SMSTPCR9, 30, 0), /* I2C1 */
[MSTP929] = SH_CLK_MSTP32(&hp_clk, SMSTPCR9, 29, 0), /* I2C2 */
[MSTP928] = SH_CLK_MSTP32(&hp_clk, SMSTPCR9, 28, 0), /* I2C3 */
[MSTP1015] = SH_CLK_MSTP32(&p_clk, SMSTPCR10, 15, 0), /* SSI0 */
[MSTP1014] = SH_CLK_MSTP32(&p_clk, SMSTPCR10, 14, 0), /* SSI1 */
[MSTP1013] = SH_CLK_MSTP32(&p_clk, SMSTPCR10, 13, 0), /* SSI2 */
[MSTP1012] = SH_CLK_MSTP32(&p_clk, SMSTPCR10, 12, 0), /* SSI3 */
[MSTP1011] = SH_CLK_MSTP32(&p_clk, SMSTPCR10, 11, 0), /* SSI4 */
[MSTP1010] = SH_CLK_MSTP32(&p_clk, SMSTPCR10, 10, 0), /* SSI5 */
[MSTP1009] = SH_CLK_MSTP32(&p_clk, SMSTPCR10, 9, 0), /* SSI6 */
[MSTP1008] = SH_CLK_MSTP32(&p_clk, SMSTPCR10, 8, 0), /* SSI7 */
[MSTP1007] = SH_CLK_MSTP32(&p_clk, SMSTPCR10, 7, 0), /* SSI8 */
[MSTP1006] = SH_CLK_MSTP32(&p_clk, SMSTPCR10, 6, 0), /* SSI9 */
[MSTP1005] = SH_CLK_MSTP32(&p_clk, SMSTPCR10, 5, 0), /* SSI ALL */
[MSTP931] = SH_CLK_MSTP32(&p_clk, SMSTPCR9, 31, 0), /* I2C0 */
[MSTP930] = SH_CLK_MSTP32(&p_clk, SMSTPCR9, 30, 0), /* I2C1 */
[MSTP929] = SH_CLK_MSTP32(&p_clk, SMSTPCR9, 29, 0), /* I2C2 */
[MSTP928] = SH_CLK_MSTP32(&p_clk, SMSTPCR9, 28, 0), /* I2C3 */
[MSTP917] = SH_CLK_MSTP32(&qspi_clk, SMSTPCR9, 17, 0), /* QSPI */
[MSTP813] = SH_CLK_MSTP32(&p_clk, SMSTPCR8, 13, 0), /* Ether */
[MSTP726] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 26, 0), /* LVDS0 */
[MSTP725] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 25, 0), /* LVDS1 */
@ -208,6 +225,7 @@ static struct clk mstp_clks[MSTP_NR] = {
[MSTP720] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 20, 0), /* SCIF1 */
[MSTP717] = SH_CLK_MSTP32(&zs_clk, SMSTPCR7, 17, 0), /* HSCIF0 */
[MSTP716] = SH_CLK_MSTP32(&zs_clk, SMSTPCR7, 16, 0), /* HSCIF1 */
[MSTP704] = SH_CLK_MSTP32(&mp_clk, SMSTPCR7, 4, 0), /* HSUSB */
[MSTP522] = SH_CLK_MSTP32(&extal_clk, SMSTPCR5, 22, 0), /* Thermal */
[MSTP315] = SH_CLK_MSTP32(&div6_clks[DIV6_MMC0], SMSTPCR3, 15, 0), /* MMC0 */
[MSTP314] = SH_CLK_MSTP32(&div4_clks[DIV4_SD0], SMSTPCR3, 14, 0), /* SDHI0 */
@ -262,11 +280,7 @@ static struct clk_lookup lookups[] = {
CLKDEV_CON_ID("ssprs", &div6_clks[DIV6_SSPRS]),
/* MSTP */
CLKDEV_ICK_ID("lvds.0", "rcar-du-r8a7790", &mstp_clks[MSTP726]),
CLKDEV_ICK_ID("lvds.1", "rcar-du-r8a7790", &mstp_clks[MSTP725]),
CLKDEV_ICK_ID("du.0", "rcar-du-r8a7790", &mstp_clks[MSTP724]),
CLKDEV_ICK_ID("du.1", "rcar-du-r8a7790", &mstp_clks[MSTP723]),
CLKDEV_ICK_ID("du.2", "rcar-du-r8a7790", &mstp_clks[MSTP722]),
CLKDEV_DEV_ID("rcar_sound", &mstp_clks[MSTP1005]),
CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP204]),
CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[MSTP203]),
CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[MSTP206]),
@ -282,20 +296,42 @@ static struct clk_lookup lookups[] = {
CLKDEV_DEV_ID("e6530000.i2c", &mstp_clks[MSTP929]),
CLKDEV_DEV_ID("e6540000.i2c", &mstp_clks[MSTP928]),
CLKDEV_DEV_ID("r8a7790-ether", &mstp_clks[MSTP813]),
CLKDEV_DEV_ID("e61f0000.thermal", &mstp_clks[MSTP522]),
CLKDEV_DEV_ID("rcar_thermal", &mstp_clks[MSTP522]),
CLKDEV_DEV_ID("ee200000.mmcif", &mstp_clks[MSTP315]),
CLKDEV_DEV_ID("ee200000.mmc", &mstp_clks[MSTP315]),
CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP315]),
CLKDEV_DEV_ID("ee100000.sdhi", &mstp_clks[MSTP314]),
CLKDEV_DEV_ID("ee100000.sd", &mstp_clks[MSTP314]),
CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP314]),
CLKDEV_DEV_ID("ee120000.sdhi", &mstp_clks[MSTP313]),
CLKDEV_DEV_ID("ee120000.sd", &mstp_clks[MSTP313]),
CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP313]),
CLKDEV_DEV_ID("ee140000.sdhi", &mstp_clks[MSTP312]),
CLKDEV_DEV_ID("ee140000.sd", &mstp_clks[MSTP312]),
CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP312]),
CLKDEV_DEV_ID("ee160000.sdhi", &mstp_clks[MSTP311]),
CLKDEV_DEV_ID("ee160000.sd", &mstp_clks[MSTP311]),
CLKDEV_DEV_ID("sh_mobile_sdhi.3", &mstp_clks[MSTP311]),
CLKDEV_DEV_ID("ee220000.mmcif", &mstp_clks[MSTP305]),
CLKDEV_DEV_ID("ee220000.mmc", &mstp_clks[MSTP305]),
CLKDEV_DEV_ID("sh_mmcif.1", &mstp_clks[MSTP305]),
CLKDEV_DEV_ID("sh_cmt.0", &mstp_clks[MSTP124]),
CLKDEV_DEV_ID("qspi.0", &mstp_clks[MSTP917]),
CLKDEV_DEV_ID("renesas_usbhs", &mstp_clks[MSTP704]),
/* ICK */
CLKDEV_ICK_ID("usbhs", "usb_phy_rcar_gen2", &mstp_clks[MSTP704]),
CLKDEV_ICK_ID("lvds.0", "rcar-du-r8a7790", &mstp_clks[MSTP726]),
CLKDEV_ICK_ID("lvds.1", "rcar-du-r8a7790", &mstp_clks[MSTP725]),
CLKDEV_ICK_ID("du.0", "rcar-du-r8a7790", &mstp_clks[MSTP724]),
CLKDEV_ICK_ID("du.1", "rcar-du-r8a7790", &mstp_clks[MSTP723]),
CLKDEV_ICK_ID("du.2", "rcar-du-r8a7790", &mstp_clks[MSTP722]),
CLKDEV_ICK_ID("ssi.0", "rcar_sound", &mstp_clks[MSTP1015]),
CLKDEV_ICK_ID("ssi.1", "rcar_sound", &mstp_clks[MSTP1014]),
CLKDEV_ICK_ID("ssi.2", "rcar_sound", &mstp_clks[MSTP1013]),
CLKDEV_ICK_ID("ssi.3", "rcar_sound", &mstp_clks[MSTP1012]),
CLKDEV_ICK_ID("ssi.4", "rcar_sound", &mstp_clks[MSTP1011]),
CLKDEV_ICK_ID("ssi.5", "rcar_sound", &mstp_clks[MSTP1010]),
CLKDEV_ICK_ID("ssi.6", "rcar_sound", &mstp_clks[MSTP1009]),
CLKDEV_ICK_ID("ssi.7", "rcar_sound", &mstp_clks[MSTP1008]),
CLKDEV_ICK_ID("ssi.8", "rcar_sound", &mstp_clks[MSTP1007]),
CLKDEV_ICK_ID("ssi.9", "rcar_sound", &mstp_clks[MSTP1006]),
};
#define R8A7790_CLOCK_ROOT(e, m, p0, p1, p30, p31) \
@ -321,10 +357,10 @@ void __init r8a7790_clock_init(void)
R8A7790_CLOCK_ROOT(20, &extal_clk, 130, 156, 80, 66);
break;
case MD(14):
R8A7790_CLOCK_ROOT(26, &extal_div2_clk, 200, 240, 122, 102);
R8A7790_CLOCK_ROOT(26 / 2, &extal_div2_clk, 200, 240, 122, 102);
break;
case MD(13) | MD(14):
R8A7790_CLOCK_ROOT(30, &extal_div2_clk, 172, 208, 106, 88);
R8A7790_CLOCK_ROOT(30 / 2, &extal_div2_clk, 172, 208, 106, 88);
break;
}

14
arch/arm/mach-shmobile/clock-r8a7791.c
View File

@ -103,6 +103,7 @@ SH_FIXED_RATIO_CLK_SET(hp_clk, pll1_clk, 1, 12);
SH_FIXED_RATIO_CLK_SET(p_clk, pll1_clk, 1, 24);
SH_FIXED_RATIO_CLK_SET(rclk_clk, pll1_clk, 1, (48 * 1024));
SH_FIXED_RATIO_CLK_SET(mp_clk, pll1_div2_clk, 1, 15);
SH_FIXED_RATIO_CLK_SET(zx_clk, pll1_clk, 1, 3);
static struct clk *main_clks[] = {
&extal_clk,
@ -116,12 +117,14 @@ static struct clk *main_clks[] = {
&rclk_clk,
&mp_clk,
&cp_clk,
&zx_clk,
};
/* MSTP */
enum {
MSTP721, MSTP720,
MSTP726, MSTP724, MSTP723, MSTP721, MSTP720,
MSTP719, MSTP718, MSTP715, MSTP714,
MSTP522,
MSTP216, MSTP207, MSTP206,
MSTP204, MSTP203, MSTP202, MSTP1105, MSTP1106, MSTP1107,
MSTP124,
@ -129,12 +132,16 @@ enum {
};
static struct clk mstp_clks[MSTP_NR] = {
[MSTP726] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 26, 0), /* LVDS0 */
[MSTP724] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 24, 0), /* DU0 */
[MSTP723] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 23, 0), /* DU1 */
[MSTP721] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 21, 0), /* SCIF0 */
[MSTP720] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 20, 0), /* SCIF1 */
[MSTP719] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 19, 0), /* SCIF2 */
[MSTP718] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 18, 0), /* SCIF3 */
[MSTP715] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 15, 0), /* SCIF4 */
[MSTP714] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 14, 0), /* SCIF5 */
[MSTP522] = SH_CLK_MSTP32(&extal_clk, SMSTPCR5, 22, 0), /* Thermal */
[MSTP216] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 16, 0), /* SCIFB2 */
[MSTP207] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 7, 0), /* SCIFB1 */
[MSTP206] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 6, 0), /* SCIFB0 */
@ -164,6 +171,9 @@ static struct clk_lookup lookups[] = {
CLKDEV_CON_ID("peripheral_clk", &hp_clk),
/* MSTP */
CLKDEV_ICK_ID("lvds.0", "rcar-du-r8a7791", &mstp_clks[MSTP726]),
CLKDEV_ICK_ID("du.0", "rcar-du-r8a7791", &mstp_clks[MSTP724]),
CLKDEV_ICK_ID("du.1", "rcar-du-r8a7791", &mstp_clks[MSTP723]),
CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP204]), /* SCIFA0 */
CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[MSTP203]), /* SCIFA1 */
CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[MSTP206]), /* SCIFB0 */
@ -180,6 +190,8 @@ static struct clk_lookup lookups[] = {
CLKDEV_DEV_ID("sh-sci.13", &mstp_clks[MSTP1106]), /* SCIFA4 */
CLKDEV_DEV_ID("sh-sci.14", &mstp_clks[MSTP1107]), /* SCIFA5 */
CLKDEV_DEV_ID("sh_cmt.0", &mstp_clks[MSTP124]),
CLKDEV_DEV_ID("e61f0000.thermal", &mstp_clks[MSTP522]),
CLKDEV_DEV_ID("rcar_thermal", &mstp_clks[MSTP522]),
};
#define R8A7791_CLOCK_ROOT(e, m, p0, p1, p30, p31) \

8
arch/arm/mach-shmobile/clock-sh73a0.c
View File

@ -657,13 +657,13 @@ static struct clk_lookup lookups[] = {
CLKDEV_DEV_ID("e6822000.i2c", &mstp_clks[MSTP323]), /* I2C1 */
CLKDEV_DEV_ID("renesas_usbhs", &mstp_clks[MSTP322]), /* USB */
CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP314]), /* SDHI0 */
CLKDEV_DEV_ID("ee100000.sdhi", &mstp_clks[MSTP314]), /* SDHI0 */
CLKDEV_DEV_ID("ee100000.sd", &mstp_clks[MSTP314]), /* SDHI0 */
CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP313]), /* SDHI1 */
CLKDEV_DEV_ID("ee120000.sdhi", &mstp_clks[MSTP313]), /* SDHI1 */
CLKDEV_DEV_ID("ee120000.sd", &mstp_clks[MSTP313]), /* SDHI1 */
CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP312]), /* MMCIF0 */
CLKDEV_DEV_ID("e6bd0000.mmcif", &mstp_clks[MSTP312]), /* MMCIF0 */
CLKDEV_DEV_ID("e6bd0000.mmc", &mstp_clks[MSTP312]), /* MMCIF0 */
CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP311]), /* SDHI2 */
CLKDEV_DEV_ID("ee140000.sdhi", &mstp_clks[MSTP311]), /* SDHI2 */
CLKDEV_DEV_ID("ee140000.sd", &mstp_clks[MSTP311]), /* SDHI2 */
CLKDEV_DEV_ID("renesas-tpu-pwm.0", &mstp_clks[MSTP304]), /* TPU0 */
CLKDEV_DEV_ID("renesas-tpu-pwm.1", &mstp_clks[MSTP303]), /* TPU1 */
CLKDEV_DEV_ID("renesas-tpu-pwm.2", &mstp_clks[MSTP302]), /* TPU2 */

5
arch/arm/mach-shmobile/include/mach/emev2.h
View File

@ -3,12 +3,7 @@
extern void emev2_map_io(void);
extern void emev2_init_delay(void);
extern void emev2_add_standard_devices(void);
extern void emev2_clock_init(void);
#define EMEV2_GPIO_BASE 200
#define EMEV2_GPIO_IRQ(n) (EMEV2_GPIO_BASE + (n))
extern struct smp_operations emev2_smp_ops;
#endif /* __ASM_EMEV2_H__ */

18
arch/arm/mach-shmobile/include/mach/r8a7778.h
View File

@ -27,6 +27,24 @@ enum {
HPBDMA_SLAVE_DUMMY,
HPBDMA_SLAVE_SDHI0_TX,
HPBDMA_SLAVE_SDHI0_RX,
HPBDMA_SLAVE_HPBIF0_TX,
HPBDMA_SLAVE_HPBIF0_RX,
HPBDMA_SLAVE_HPBIF1_TX,
HPBDMA_SLAVE_HPBIF1_RX,
HPBDMA_SLAVE_HPBIF2_TX,
HPBDMA_SLAVE_HPBIF2_RX,
HPBDMA_SLAVE_HPBIF3_TX,
HPBDMA_SLAVE_HPBIF3_RX,
HPBDMA_SLAVE_HPBIF4_TX,
HPBDMA_SLAVE_HPBIF4_RX,
HPBDMA_SLAVE_HPBIF5_TX,
HPBDMA_SLAVE_HPBIF5_RX,
HPBDMA_SLAVE_HPBIF6_TX,
HPBDMA_SLAVE_HPBIF6_RX,
HPBDMA_SLAVE_HPBIF7_TX,
HPBDMA_SLAVE_HPBIF7_RX,
HPBDMA_SLAVE_HPBIF8_TX,
HPBDMA_SLAVE_HPBIF8_RX,
};
extern void r8a7778_add_standard_devices(void);

1
arch/arm/mach-shmobile/include/mach/r8a7791.h
View File

@ -4,6 +4,7 @@
void r8a7791_add_standard_devices(void);
void r8a7791_add_dt_devices(void);
void r8a7791_clock_init(void);
void r8a7791_pinmux_init(void);
void r8a7791_init_early(void);
extern struct smp_operations r8a7791_smp_ops;

163
arch/arm/mach-shmobile/setup-emev2.c
View File

@ -16,24 +16,15 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <linux/clk-provider.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/platform_device.h>
#include <linux/platform_data/gpio-em.h>
#include <linux/of_platform.h>
#include <linux/delay.h>
#include <linux/input.h>
#include <linux/io.h>
#include <linux/irqchip/arm-gic.h>
#include <mach/common.h>
#include <mach/emev2.h>
#include <mach/irqs.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/mach/time.h>
static struct map_desc emev2_io_desc[] __initdata = {
#ifdef CONFIG_SMP
@ -52,150 +43,20 @@ void __init emev2_map_io(void)
iotable_init(emev2_io_desc, ARRAY_SIZE(emev2_io_desc));
}
/* UART */
static struct resource uart0_resources[] = {
DEFINE_RES_MEM(0xe1020000, 0x38),
DEFINE_RES_IRQ(40),
};
static struct resource uart1_resources[] = {
DEFINE_RES_MEM(0xe1030000, 0x38),
DEFINE_RES_IRQ(41),
};
static struct resource uart2_resources[] = {
DEFINE_RES_MEM(0xe1040000, 0x38),
DEFINE_RES_IRQ(42),
};
static struct resource uart3_resources[] = {
DEFINE_RES_MEM(0xe1050000, 0x38),
DEFINE_RES_IRQ(43),
};
#define emev2_register_uart(idx) \
platform_device_register_simple("serial8250-em", idx, \
uart##idx##_resources, \
ARRAY_SIZE(uart##idx##_resources))
/* STI */
static struct resource sti_resources[] = {
DEFINE_RES_MEM(0xe0180000, 0x54),
DEFINE_RES_IRQ(157),
};
#define emev2_register_sti() \
platform_device_register_simple("em_sti", 0, \
sti_resources, \
ARRAY_SIZE(sti_resources))
/* GIO */
static struct gpio_em_config gio0_config = {
.gpio_base = 0,
.irq_base = EMEV2_GPIO_IRQ(0),
.number_of_pins = 32,
};
static struct resource gio0_resources[] = {
DEFINE_RES_MEM(0xe0050000, 0x2c),
DEFINE_RES_MEM(0xe0050040, 0x20),
DEFINE_RES_IRQ(99),
DEFINE_RES_IRQ(100),
};
static struct gpio_em_config gio1_config = {
.gpio_base = 32,
.irq_base = EMEV2_GPIO_IRQ(32),
.number_of_pins = 32,
};
static struct resource gio1_resources[] = {
DEFINE_RES_MEM(0xe0050080, 0x2c),
DEFINE_RES_MEM(0xe00500c0, 0x20),
DEFINE_RES_IRQ(101),
DEFINE_RES_IRQ(102),
};
static struct gpio_em_config gio2_config = {
.gpio_base = 64,
.irq_base = EMEV2_GPIO_IRQ(64),
.number_of_pins = 32,
};
static struct resource gio2_resources[] = {
DEFINE_RES_MEM(0xe0050100, 0x2c),
DEFINE_RES_MEM(0xe0050140, 0x20),
DEFINE_RES_IRQ(103),
DEFINE_RES_IRQ(104),
};
static struct gpio_em_config gio3_config = {
.gpio_base = 96,
.irq_base = EMEV2_GPIO_IRQ(96),
.number_of_pins = 32,
};
static struct resource gio3_resources[] = {
DEFINE_RES_MEM(0xe0050180, 0x2c),
DEFINE_RES_MEM(0xe00501c0, 0x20),
DEFINE_RES_IRQ(105),
DEFINE_RES_IRQ(106),
};
static struct gpio_em_config gio4_config = {
.gpio_base = 128,
.irq_base = EMEV2_GPIO_IRQ(128),
.number_of_pins = 31,
};
static struct resource gio4_resources[] = {
DEFINE_RES_MEM(0xe0050200, 0x2c),
DEFINE_RES_MEM(0xe0050240, 0x20),
DEFINE_RES_IRQ(107),
DEFINE_RES_IRQ(108),
};
#define emev2_register_gio(idx) \
platform_device_register_resndata(&platform_bus, "em_gio", \
idx, gio##idx##_resources, \
ARRAY_SIZE(gio##idx##_resources), \
&gio##idx##_config, \
sizeof(struct gpio_em_config))
static struct resource pmu_resources[] = {
DEFINE_RES_IRQ(152),
DEFINE_RES_IRQ(153),
};
#define emev2_register_pmu() \
platform_device_register_simple("arm-pmu", -1, \
pmu_resources, \
ARRAY_SIZE(pmu_resources))
void __init emev2_add_standard_devices(void)
{
if (!IS_ENABLED(CONFIG_COMMON_CLK))
emev2_clock_init();
emev2_register_uart(0);
emev2_register_uart(1);
emev2_register_uart(2);
emev2_register_uart(3);
emev2_register_sti();
emev2_register_gio(0);
emev2_register_gio(1);
emev2_register_gio(2);
emev2_register_gio(3);
emev2_register_gio(4);
emev2_register_pmu();
}
void __init emev2_init_delay(void)
{
shmobile_setup_delay(533, 1, 3); /* Cortex-A9 @ 533MHz */
}
#ifdef CONFIG_USE_OF
static void __init emev2_add_standard_devices_dt(void)
{
#ifdef CONFIG_COMMON_CLK
of_clk_init(NULL);
#else
emev2_clock_init();
#endif
of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
}
static const char *emev2_boards_compat_dt[] __initdata = {
"renesas,emev2",
@ -206,7 +67,7 @@ DT_MACHINE_START(EMEV2_DT, "Generic Emma Mobile EV2 (Flattened Device Tree)")
.smp = smp_ops(emev2_smp_ops),
.map_io = emev2_map_io,
.init_early = emev2_init_delay,
.init_machine = emev2_add_standard_devices_dt,
.init_late = shmobile_init_late,
.dt_compat = emev2_boards_compat_dt,
MACHINE_END
#endif /* CONFIG_USE_OF */

22
arch/arm/mach-shmobile/setup-r7s72100.c
View File

@ -22,6 +22,7 @@
#include <linux/kernel.h>
#include <linux/of_platform.h>
#include <linux/serial_sci.h>
#include <linux/sh_timer.h>
#include <mach/common.h>
#include <mach/irqs.h>
#include <mach/r7s72100.h>
@ -58,6 +59,26 @@ static inline void r7s72100_register_scif(int idx)
sizeof(struct plat_sci_port));
}
static struct sh_timer_config mtu2_0_platform_data __initdata = {
.name = "MTU2_0",
.timer_bit = 0,
.channel_offset = -0x80,
.clockevent_rating = 200,
};
static struct resource mtu2_0_resources[] __initdata = {
DEFINE_RES_MEM(0xfcff0300, 0x27),
DEFINE_RES_IRQ(gic_iid(139)), /* MTU2 TGI0A */
};
#define r7s72100_register_mtu2(idx) \
platform_device_register_resndata(&platform_bus, "sh_mtu2", \
idx, mtu2_##idx##_resources, \
ARRAY_SIZE(mtu2_##idx##_resources), \
&mtu2_##idx##_platform_data, \
sizeof(struct sh_timer_config))
void __init r7s72100_add_dt_devices(void)
{
r7s72100_register_scif(SCIF0);
@ -68,6 +89,7 @@ void __init r7s72100_add_dt_devices(void)
r7s72100_register_scif(SCIF5);
r7s72100_register_scif(SCIF6);
r7s72100_register_scif(SCIF7);
r7s72100_register_mtu2(0);
}
void __init r7s72100_init_early(void)

2
arch/arm/mach-shmobile/setup-r8a73a4.c
View File

@ -275,7 +275,7 @@ static const struct sh_dmae_pdata dma_pdata = {
static struct resource dma_resources[] = {
DEFINE_RES_MEM(0xe6700020, 0x89e0),
DEFINE_RES_IRQ_NAMED(gic_spi(220), "error_irq"),
DEFINE_RES_IRQ(gic_spi(220)),
{
/* IRQ for channels 0-19 */
.start = gic_spi(200),

51
arch/arm/mach-shmobile/setup-r8a7778.c
View File

@ -319,6 +319,29 @@ void __init r8a7778_add_dt_devices(void)
#define HPB_DMAE_ASYNCMDR_ASMD21_SINGLE BIT(1) /* SDHI0 */
#define HPB_DMAE_ASYNCMDR_ASMD21_MULTI 0 /* SDHI0 */
#define HPBDMA_HPBIF(_id) \
{ \
.id = HPBDMA_SLAVE_HPBIF## _id ##_TX, \
.addr = 0xffda0000 + (_id * 0x1000), \
.dcr = HPB_DMAE_DCR_CT | \
HPB_DMAE_DCR_DIP | \
HPB_DMAE_DCR_SPDS_32BIT | \
HPB_DMAE_DCR_DMDL | \
HPB_DMAE_DCR_DPDS_32BIT, \
.port = 0x1111, \
.dma_ch = (28 + _id), \
}, { \
.id = HPBDMA_SLAVE_HPBIF## _id ##_RX, \
.addr = 0xffda0000 + (_id * 0x1000), \
.dcr = HPB_DMAE_DCR_CT | \
HPB_DMAE_DCR_DIP | \
HPB_DMAE_DCR_SMDL | \
HPB_DMAE_DCR_SPDS_32BIT | \
HPB_DMAE_DCR_DPDS_32BIT, \
.port = 0x1111, \
.dma_ch = (28 + _id), \
}
static const struct hpb_dmae_slave_config hpb_dmae_slaves[] = {
{
.id = HPBDMA_SLAVE_SDHI0_TX,
@ -349,11 +372,39 @@ static const struct hpb_dmae_slave_config hpb_dmae_slaves[] = {
.flags = HPB_DMAE_SET_ASYNC_RESET | HPB_DMAE_SET_ASYNC_MODE,
.dma_ch = 22,
},
HPBDMA_HPBIF(0),
HPBDMA_HPBIF(1),
HPBDMA_HPBIF(2),
HPBDMA_HPBIF(3),
HPBDMA_HPBIF(4),
HPBDMA_HPBIF(5),
HPBDMA_HPBIF(6),
HPBDMA_HPBIF(7),
HPBDMA_HPBIF(8),
};
static const struct hpb_dmae_channel hpb_dmae_channels[] = {
HPB_DMAE_CHANNEL(0x7e, HPBDMA_SLAVE_SDHI0_TX), /* ch. 21 */
HPB_DMAE_CHANNEL(0x7e, HPBDMA_SLAVE_SDHI0_RX), /* ch. 22 */
HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF0_TX), /* ch. 28 */
HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF0_RX), /* ch. 28 */
HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF1_TX), /* ch. 29 */
HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF1_RX), /* ch. 29 */
HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF2_TX), /* ch. 30 */
HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF2_RX), /* ch. 30 */
HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF3_TX), /* ch. 31 */
HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF3_RX), /* ch. 31 */
HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF4_TX), /* ch. 32 */
HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF4_RX), /* ch. 32 */
HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF5_TX), /* ch. 33 */
HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF5_RX), /* ch. 33 */
HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF6_TX), /* ch. 34 */
HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF6_RX), /* ch. 34 */
HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF7_TX), /* ch. 35 */
HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF7_RX), /* ch. 35 */
HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF8_TX), /* ch. 36 */
HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF8_RX), /* ch. 36 */
};
static struct hpb_dmae_pdata dma_platform_data __initdata = {

65
arch/arm/mach-shmobile/setup-r8a7791.c
View File

@ -22,6 +22,7 @@
#include <linux/irq.h>
#include <linux/kernel.h>
#include <linux/of_platform.h>
#include <linux/platform_data/gpio-rcar.h>
#include <linux/platform_data/irq-renesas-irqc.h>
#include <linux/serial_sci.h>
#include <linux/sh_timer.h>
@ -31,6 +32,58 @@
#include <mach/rcar-gen2.h>
#include <asm/mach/arch.h>
static const struct resource pfc_resources[] __initconst = {
DEFINE_RES_MEM(0xe6060000, 0x250),
};
#define r8a7791_register_pfc() \
platform_device_register_simple("pfc-r8a7791", -1, pfc_resources, \
ARRAY_SIZE(pfc_resources))
#define R8A7791_GPIO(idx, base, nr) \
static const struct resource r8a7791_gpio##idx##_resources[] __initconst = { \
DEFINE_RES_MEM((base), 0x50), \
DEFINE_RES_IRQ(gic_spi(4 + (idx))), \
}; \
\
static const struct gpio_rcar_config \
r8a7791_gpio##idx##_platform_data __initconst = { \
.gpio_base = 32 * (idx), \
.irq_base = 0, \
.number_of_pins = (nr), \
.pctl_name = "pfc-r8a7791", \
.has_both_edge_trigger = 1, \
}; \
R8A7791_GPIO(0, 0xe6050000, 32);
R8A7791_GPIO(1, 0xe6051000, 32);
R8A7791_GPIO(2, 0xe6052000, 32);
R8A7791_GPIO(3, 0xe6053000, 32);
R8A7791_GPIO(4, 0xe6054000, 32);
R8A7791_GPIO(5, 0xe6055000, 32);
R8A7791_GPIO(6, 0xe6055400, 32);
R8A7791_GPIO(7, 0xe6055800, 26);
#define r8a7791_register_gpio(idx) \
platform_device_register_resndata(&platform_bus, "gpio_rcar", idx, \
r8a7791_gpio##idx##_resources, \
ARRAY_SIZE(r8a7791_gpio##idx##_resources), \
&r8a7791_gpio##idx##_platform_data, \
sizeof(r8a7791_gpio##idx##_platform_data))
void __init r8a7791_pinmux_init(void)
{
r8a7791_register_pfc();
r8a7791_register_gpio(0);
r8a7791_register_gpio(1);
r8a7791_register_gpio(2);
r8a7791_register_gpio(3);
r8a7791_register_gpio(4);
r8a7791_register_gpio(5);
r8a7791_register_gpio(6);
r8a7791_register_gpio(7);
}
#define SCIF_COMMON(scif_type, baseaddr, irq) \
.type = scif_type, \
.mapbase = baseaddr, \
@ -136,6 +189,17 @@ static struct resource irqc0_resources[] = {
&irqc##idx##_data, \
sizeof(struct renesas_irqc_config))
static const struct resource thermal_resources[] __initconst = {
DEFINE_RES_MEM(0xe61f0000, 0x14),
DEFINE_RES_MEM(0xe61f0100, 0x38),
DEFINE_RES_IRQ(gic_spi(69)),
};
#define r8a7791_register_thermal() \
platform_device_register_simple("rcar_thermal", -1, \
thermal_resources, \
ARRAY_SIZE(thermal_resources))
void __init r8a7791_add_dt_devices(void)
{
r8a7791_register_scif(SCIFA0);
@ -160,6 +224,7 @@ void __init r8a7791_add_standard_devices(void)
{
r8a7791_add_dt_devices();
r8a7791_register_irqc(0);
r8a7791_register_thermal();
}
void __init r8a7791_init_early(void)

2
drivers/Makefile
View File

@ -118,7 +118,7 @@ obj-$(CONFIG_SGI_SN) += sn/
obj-y += firmware/
obj-$(CONFIG_CRYPTO) += crypto/
obj-$(CONFIG_SUPERH) += sh/
obj-$(CONFIG_ARCH_SHMOBILE) += sh/
obj-$(CONFIG_ARCH_SHMOBILE_LEGACY) += sh/
ifndef CONFIG_ARCH_USES_GETTIMEOFFSET
obj-y += clocksource/
endif