ARM: dts: dra72-evm-revc: fix correct phy delay
The current delay settings of the phy are not the optimal value, fix it with correct values. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -59,16 +59,16 @@
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&davinci_mdio {
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&davinci_mdio {
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dp83867_0: ethernet-phy@2 {
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dp83867_0: ethernet-phy@2 {
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reg = <2>;
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reg = <2>;
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ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
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ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;
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ti,tx-internal-delay = <DP83867_RGMIIDCTL_1_NS>;
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ti,tx-internal-delay = <DP83867_RGMIIDCTL_250_PS>;
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ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>;
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ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>;
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ti,min-output-impedance;
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ti,min-output-impedance;
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};
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};
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dp83867_1: ethernet-phy@3 {
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dp83867_1: ethernet-phy@3 {
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reg = <3>;
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reg = <3>;
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ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
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ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;
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ti,tx-internal-delay = <DP83867_RGMIIDCTL_1_NS>;
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ti,tx-internal-delay = <DP83867_RGMIIDCTL_250_PS>;
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ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>;
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ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>;
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ti,min-output-imepdance;
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ti,min-output-imepdance;
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};
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};
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