soc/tegra: Add initial flowctrl support for Tegra132/210
Tegra132 and Tegra210 support the flowctrl module and so add initial support for these devices. Please note that Tegra186 does not support the flowctrl module, so update the initialisation function such that we do not fall back and attempt to map the 'hardcoded' address range for Tegra186. Furthermore 64-bit Tegra devices have always had the flowctrl node defined in their device-tree and so only use the 'hardcoded' addresses for 32-bit Tegra devices. Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
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@ -63,6 +63,7 @@ if ARM64
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config ARCH_TEGRA_132_SOC
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config ARCH_TEGRA_132_SOC
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bool "NVIDIA Tegra132 SoC"
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bool "NVIDIA Tegra132 SoC"
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select PINCTRL_TEGRA124
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select PINCTRL_TEGRA124
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select SOC_TEGRA_FLOWCTRL
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select SOC_TEGRA_PMC
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select SOC_TEGRA_PMC
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help
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help
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Enable support for NVIDIA Tegra132 SoC, based on the Denver
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Enable support for NVIDIA Tegra132 SoC, based on the Denver
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@ -73,6 +74,7 @@ config ARCH_TEGRA_132_SOC
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config ARCH_TEGRA_210_SOC
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config ARCH_TEGRA_210_SOC
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bool "NVIDIA Tegra210 SoC"
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bool "NVIDIA Tegra210 SoC"
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select PINCTRL_TEGRA210
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select PINCTRL_TEGRA210
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select SOC_TEGRA_FLOWCTRL
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select SOC_TEGRA_PMC
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select SOC_TEGRA_PMC
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help
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help
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Enable support for the NVIDIA Tegra210 SoC. Also known as Tegra X1,
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Enable support for the NVIDIA Tegra210 SoC. Also known as Tegra X1,
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@ -165,6 +165,7 @@ static int tegra_flowctrl_probe(struct platform_device *pdev)
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}
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}
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static const struct of_device_id tegra_flowctrl_match[] = {
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static const struct of_device_id tegra_flowctrl_match[] = {
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{ .compatible = "nvidia,tegra210-flowctrl" },
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{ .compatible = "nvidia,tegra124-flowctrl" },
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{ .compatible = "nvidia,tegra124-flowctrl" },
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{ .compatible = "nvidia,tegra114-flowctrl" },
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{ .compatible = "nvidia,tegra114-flowctrl" },
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{ .compatible = "nvidia,tegra30-flowctrl" },
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{ .compatible = "nvidia,tegra30-flowctrl" },
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@ -184,9 +185,7 @@ builtin_platform_driver(tegra_flowctrl_driver);
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static int __init tegra_flowctrl_init(void)
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static int __init tegra_flowctrl_init(void)
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{
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{
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/* hardcoded fallback if device tree node is missing */
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struct resource res;
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unsigned long base = 0x60007000;
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unsigned long size = SZ_4K;
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struct device_node *np;
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struct device_node *np;
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if (!soc_is_tegra())
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if (!soc_is_tegra())
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@ -194,17 +193,29 @@ static int __init tegra_flowctrl_init(void)
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np = of_find_matching_node(NULL, tegra_flowctrl_match);
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np = of_find_matching_node(NULL, tegra_flowctrl_match);
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if (np) {
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if (np) {
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struct resource res;
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if (of_address_to_resource(np, 0, &res) < 0) {
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pr_err("failed to get flowctrl register\n");
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if (of_address_to_resource(np, 0, &res) == 0) {
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return -ENXIO;
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size = resource_size(&res);
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base = res.start;
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}
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}
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of_node_put(np);
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of_node_put(np);
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} else if (IS_ENABLED(CONFIG_ARM)) {
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/*
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* Hardcoded fallback for 32-bit Tegra
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* devices if device tree node is missing.
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*/
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res.start = 0x60007000;
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res.end = 0x60007fff;
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res.flags = IORESOURCE_MEM;
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} else {
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/*
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* At this point we're running on a Tegra,
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* that doesn't support the flow controller
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* (eg. Tegra186), so just return.
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*/
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return 0;
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}
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}
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tegra_flowctrl_base = ioremap_nocache(base, size);
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tegra_flowctrl_base = ioremap_nocache(res.start, resource_size(&res));
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if (!tegra_flowctrl_base)
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if (!tegra_flowctrl_base)
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return -ENXIO;
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return -ENXIO;
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