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pinctrl: qcom: sdm845: Fix UFS_RESET pin 

The UFS_RESET pin is the magical pin #150 now, not 153 per the
sdm845_groups array declared in this file. Fix the order of pins so that
UFS_RESET is 150 and the SDC pins follow after.

Fixes: 53a5372ce3 ("pinctrl: qcom: sdm845: Expose ufs_reset as gpio")
Signed-off-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/20190830060227.12792-1-swboyd@chromium.org
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
Stephen Boyd 2019-08-29 23:02:27 -07:00 committed by Linus Walleij
parent bacada1c3f
commit 1fdbc02ce1
1 changed files with 4 additions and 4 deletions
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8
drivers/pinctrl/qcom/pinctrl-sdm845.c
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@ -262,10 +262,10 @@ static const struct pinctrl_pin_desc sdm845_pins[] = {
PINCTRL_PIN(147, "GPIO_147"),
PINCTRL_PIN(148, "GPIO_148"),
PINCTRL_PIN(149, "GPIO_149"),
PINCTRL_PIN(150, "SDC2_CLK"),
PINCTRL_PIN(151, "SDC2_CMD"),
PINCTRL_PIN(152, "SDC2_DATA"),
PINCTRL_PIN(153, "UFS_RESET"),
PINCTRL_PIN(150, "UFS_RESET"),
PINCTRL_PIN(151, "SDC2_CLK"),
PINCTRL_PIN(152, "SDC2_CMD"),
PINCTRL_PIN(153, "SDC2_DATA"),
};
#define DECLARE_MSM_GPIO_PINS(pin) \