dmaengine: at_xdmac: fix bug about channel configuration
When using descriptor view 2 or higher, we don't write the configuration into AT_XDMAC_CC register because this configuration will be fetch from the descriptor. Unfortunately, the PROT bit is not updated with this method, we have to do it manually before enabling the channel. Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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@ -359,18 +359,19 @@ static void at_xdmac_start_xfer(struct at_xdmac_chan *atchan,
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* descriptor view 2 since some fields of the configuration register
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* depend on transfer size and src/dest addresses.
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*/
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if (at_xdmac_chan_is_cyclic(atchan)) {
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if (at_xdmac_chan_is_cyclic(atchan))
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reg = AT_XDMAC_CNDC_NDVIEW_NDV1;
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at_xdmac_chan_write(atchan, AT_XDMAC_CC, first->lld.mbr_cfg);
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} else if (first->lld.mbr_ubc & AT_XDMAC_MBR_UBC_NDV3) {
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else if (first->lld.mbr_ubc & AT_XDMAC_MBR_UBC_NDV3)
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reg = AT_XDMAC_CNDC_NDVIEW_NDV3;
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} else {
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/*
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* No need to write AT_XDMAC_CC reg, it will be done when the
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* descriptor is fecthed.
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*/
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else
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reg = AT_XDMAC_CNDC_NDVIEW_NDV2;
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}
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/*
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* Even if the register will be updated from the configuration in the
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* descriptor when using view 2 or higher, the PROT bit won't be set
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* properly. This bit can be modified only by using the channel
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* configuration register.
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*/
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at_xdmac_chan_write(atchan, AT_XDMAC_CC, first->lld.mbr_cfg);
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reg |= AT_XDMAC_CNDC_NDDUP
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| AT_XDMAC_CNDC_NDSUP
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