Merge branch 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/gerg/m68knommu

Pull m68k updates from Greg Ungerer:
 "The bulk of the changes are to support the ColdFire 5441x SoC family
  with their MMU enabled. The parts have been supported for a long time
  now, but only in no-MMU mode.

  Angelo Dureghello has a new board with a 5441x and we have ironed out
  the last problems with MMU enabled on it. So there is also some
  changes to properly support that board too.

  Also a fix for a link problem when selecting the traditional 68k beep
  device in no-MMU configurations"

* 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/gerg/m68knommu:
  m68k: add Sysam stmark2 open board support
  m68k: coldfire: add dspi0 module support
  m68k: pull mach_beep in setup.c
  m68k: allow ColdFire m5441x parts to run with MMU enabled
  m68k: fix ColdFire node shift size calculation
  m68k: move coldfire MMU initialization code
This commit is contained in:
Linus Torvalds 2017-11-13 11:39:21 -08:00
commit 2101dd64b3
13 changed files with 238 additions and 14 deletions

View File

@ -284,7 +284,7 @@ config M548x
config M5441x
bool "MCF5441x"
depends on !MMU
select MMU_COLDFIRE if MMU
select GENERIC_CLOCKEVENTS
select HAVE_CACHE_CB
help

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@ -266,6 +266,12 @@ config AMCORE
help
Support for the Sysam AMCORE open-hardware generic board.
config STMARK2
bool "Sysam stmark2 board support"
depends on M5441x
help
Support for the Sysam stmark2 open-hardware generic board.
config FIREBEE
bool "FireBee board support"
depends on M547x

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@ -35,7 +35,8 @@ obj-$(CONFIG_NETtel) += nettel.o
obj-$(CONFIG_CLEOPATRA) += nettel.o
obj-$(CONFIG_FIREBEE) += firebee.o
obj-$(CONFIG_MCF8390) += mcf8390.o
obj-$(CONFIG_AMCORE) += amcore.o
obj-$(CONFIG_AMCORE) += amcore.o
obj-$(CONFIG_STMARK2) += stmark2.o
obj-$(CONFIG_PCI) += pci.o

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@ -27,7 +27,7 @@ DEFINE_CLK(0, "intc.0", 18, MCF_CLK);
DEFINE_CLK(0, "intc.1", 19, MCF_CLK);
DEFINE_CLK(0, "intc.2", 20, MCF_CLK);
DEFINE_CLK(0, "imx1-i2c.0", 22, MCF_CLK);
DEFINE_CLK(0, "mcfdspi.0", 23, MCF_CLK);
DEFINE_CLK(0, "fsl-dspi.0", 23, MCF_CLK);
DEFINE_CLK(0, "mcfuart.0", 24, MCF_BUSCLK);
DEFINE_CLK(0, "mcfuart.1", 25, MCF_BUSCLK);
DEFINE_CLK(0, "mcfuart.2", 26, MCF_BUSCLK);
@ -140,6 +140,7 @@ static struct clk * const enable_clks[] __initconst = {
&__clk_0_18, /* intc0 */
&__clk_0_19, /* intc0 */
&__clk_0_20, /* intc0 */
&__clk_0_23, /* dspi.0 */
&__clk_0_24, /* uart0 */
&__clk_0_25, /* uart1 */
&__clk_0_26, /* uart2 */

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@ -96,10 +96,6 @@ static void mcf54xx_reset(void)
void __init config_BSP(char *commandp, int size)
{
#ifdef CONFIG_MMU
cf_bootmem_alloc();
mmu_context_init();
#endif
mach_reset = mcf54xx_reset;
mach_sched_init = hw_timer_init;
m54xx_uarts_init();

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@ -0,0 +1,119 @@
/*
* stmark2.c -- Support for Sysam AMCORE open board
*
* (C) Copyright 2017, Angelo Dureghello <angelo@sysam.it>
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file COPYING in the main directory of this archive
* for more details.
*/
#include <linux/platform_device.h>
#include <linux/mtd/partitions.h>
#include <linux/spi/spi.h>
#include <linux/spi/spi-fsl-dspi.h>
#include <linux/spi/flash.h>
#include <asm/mcfsim.h>
/*
* Partitioning of parallel NOR flash (39VF3201B)
*/
static struct mtd_partition stmark2_partitions[] = {
{
.name = "U-Boot (1024K)",
.size = 0x100000,
.offset = 0x0
}, {
.name = "Kernel+initramfs (7168K)",
.size = 0x700000,
.offset = MTDPART_OFS_APPEND
}, {
.name = "Flash Free Space (8192K)",
.size = MTDPART_SIZ_FULL,
.offset = MTDPART_OFS_APPEND
}
};
static struct flash_platform_data stmark2_spi_flash_data = {
.name = "is25lp128",
.parts = stmark2_partitions,
.nr_parts = ARRAY_SIZE(stmark2_partitions),
.type = "is25lp128",
};
static struct spi_board_info stmark2_board_info[] __initdata = {
{
.modalias = "m25p80",
.max_speed_hz = 5000000,
.bus_num = 0,
.chip_select = 1,
.platform_data = &stmark2_spi_flash_data,
.mode = SPI_MODE_3,
}
};
/* SPI controller data, SPI (0) */
static struct fsl_dspi_platform_data dspi_spi0_info = {
.cs_num = 4,
.bus_num = 0,
.sck_cs_delay = 100,
.cs_sck_delay = 100,
};
static struct resource dspi_spi0_resource[] = {
[0] = {
.start = MCFDSPI_BASE0,
.end = MCFDSPI_BASE0 + 0xFF,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = 12,
.end = 13,
.flags = IORESOURCE_DMA,
},
[2] = {
.start = MCF_IRQ_DSPI0,
.end = MCF_IRQ_DSPI0,
.flags = IORESOURCE_IRQ,
},
};
/* SPI controller, id = bus number */
static struct platform_device dspi_spi0_device = {
.name = "fsl-dspi",
.id = 0,
.num_resources = ARRAY_SIZE(dspi_spi0_resource),
.resource = dspi_spi0_resource,
.dev = {
.platform_data = &dspi_spi0_info,
},
};
static struct platform_device *stmark2_devices[] __initdata = {
&dspi_spi0_device,
};
/*
* Note: proper pin-mux setup is mandatory for proper SPI functionality.
*/
static int __init init_stmark2(void)
{
/* DSPI0, all pins as DSPI, and using CS1 */
__raw_writeb(0x80, MCFGPIO_PAR_DSPIOWL);
__raw_writeb(0xfc, MCFGPIO_PAR_DSPIOWH);
/* Board gpio setup */
__raw_writeb(0x00, MCFGPIO_PAR_BE);
__raw_writeb(0x00, MCFGPIO_PAR_FBCTL);
__raw_writeb(0x00, MCFGPIO_PAR_CS);
__raw_writeb(0x00, MCFGPIO_PAR_CANI2C);
platform_add_devices(stmark2_devices, ARRAY_SIZE(stmark2_devices));
spi_register_board_info(stmark2_board_info,
ARRAY_SIZE(stmark2_board_info));
return 0;
}
late_initcall(init_stmark2);

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@ -0,0 +1,92 @@
CONFIG_LOCALVERSION="stmark2-001"
CONFIG_DEFAULT_HOSTNAME="stmark2"
CONFIG_SYSVIPC=y
# CONFIG_FHANDLE is not set
CONFIG_LOG_BUF_SHIFT=14
CONFIG_NAMESPACES=y
CONFIG_BLK_DEV_INITRD=y
CONFIG_INITRAMFS_SOURCE="../uClinux-dist/romfs"
# CONFIG_RD_BZIP2 is not set
# CONFIG_RD_LZMA is not set
# CONFIG_RD_XZ is not set
# CONFIG_RD_LZO is not set
# CONFIG_RD_LZ4 is not set
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
# CONFIG_AIO is not set
# CONFIG_ADVISE_SYSCALLS is not set
# CONFIG_MEMBARRIER is not set
CONFIG_EMBEDDED=y
# CONFIG_VM_EVENT_COUNTERS is not set
# CONFIG_COMPAT_BRK is not set
# CONFIG_LBDAF is not set
# CONFIG_BLK_DEV_BSG is not set
CONFIG_BLK_CMDLINE_PARSER=y
# CONFIG_MMU is not set
CONFIG_M5441x=y
CONFIG_CLOCK_FREQ=240000000
CONFIG_STMARK2=y
CONFIG_RAMBASE=0x40000000
CONFIG_RAMSIZE=0x8000000
CONFIG_VECTORBASE=0x40000000
CONFIG_KERNELBASE=0x40001000
CONFIG_BINFMT_FLAT=y
CONFIG_BINFMT_MISC=y
# CONFIG_UEVENT_HELPER is not set
CONFIG_DEVTMPFS=y
CONFIG_DEVTMPFS_MOUNT=y
CONFIG_FW_LOADER_USER_HELPER_FALLBACK=y
# CONFIG_ALLOW_DEV_COREDUMP is not set
CONFIG_MTD=y
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_BLOCK=y
CONFIG_MTD_CFI=y
CONFIG_MTD_JEDECPROBE=y
CONFIG_MTD_CFI_ADV_OPTIONS=y
CONFIG_MTD_CFI_LE_BYTE_SWAP=y
CONFIG_MTD_CFI_GEOMETRY=y
# CONFIG_MTD_CFI_I2 is not set
CONFIG_MTD_CFI_AMDSTD=y
CONFIG_MTD_CFI_STAA=y
CONFIG_MTD_ROM=y
CONFIG_MTD_COMPLEX_MAPPINGS=y
CONFIG_MTD_PLATRAM=y
CONFIG_MTD_M25P80=y
CONFIG_MTD_SPI_NOR=y
# CONFIG_INPUT_KEYBOARD is not set
# CONFIG_INPUT_MOUSE is not set
CONFIG_SERIO_LIBPS2=y
# CONFIG_UNIX98_PTYS is not set
# CONFIG_DEVMEM is not set
CONFIG_SERIAL_MCF=y
CONFIG_SERIAL_MCF_BAUDRATE=115200
CONFIG_SERIAL_MCF_CONSOLE=y
# CONFIG_HW_RANDOM is not set
CONFIG_SPI=y
CONFIG_SPI_DEBUG=y
CONFIG_SPI_FSL_DSPI=y
CONFIG_DEBUG_GPIO=y
CONFIG_GPIO_SYSFS=y
CONFIG_GPIO_GENERIC_PLATFORM=y
# CONFIG_HWMON is not set
# CONFIG_RC_CORE is not set
# CONFIG_HID is not set
# CONFIG_USB_SUPPORT is not set
# CONFIG_FILE_LOCKING is not set
# CONFIG_DNOTIFY is not set
# CONFIG_INOTIFY_USER is not set
CONFIG_FSCACHE=y
# CONFIG_PROC_SYSCTL is not set
CONFIG_PRINTK_TIME=y
# CONFIG_ENABLE_WARN_DEPRECATED is not set
# CONFIG_SECTION_MISMATCH_WARN_ONLY is not set
CONFIG_SLUB_DEBUG_ON=y
CONFIG_PANIC_ON_OOPS=y
# CONFIG_SCHED_DEBUG is not set
# CONFIG_DEBUG_BUGVERBOSE is not set
CONFIG_BOOTPARAM=y
CONFIG_BOOTPARAM_STRING="console=ttyS0,115200 root=/dev/ram0 rw rootfstype=ramfs rdinit=/bin/init devtmpfs.mount=1"
CONFIG_CRYPTO=y
# CONFIG_CRYPTO_ECHAINIV is not set
CONFIG_CRYPTO_ANSI_CPRNG=y
# CONFIG_CRYPTO_HW is not set
CONFIG_CRC16=y

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@ -278,4 +278,10 @@
#define MCFGPIO_IRQ_VECBASE (MCFINT_VECBASE - MCFGPIO_IRQ_MIN)
#define MCFGPIO_PIN_MAX 87
/*
* DSPI module.
*/
#define MCFDSPI_BASE0 0xfc05c000
#define MCF_IRQ_DSPI0 (MCFINT0_VECBASE + MCFINT0_DSPI0)
#endif /* m5441xsim_h */

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@ -106,6 +106,7 @@ static inline void mmu_write(u32 a, u32 v)
}
void cf_bootmem_alloc(void);
void cf_mmu_context_init(void);
int cf_tlb_miss(struct pt_regs *regs, int write, int dtlb, int extension_word);
#endif

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@ -92,7 +92,6 @@ static inline void activate_mm(struct mm_struct *active_mm,
#define deactivate_mm(tsk, mm) do { } while (0)
extern void mmu_context_init(void);
#define prepare_arch_switch(next) load_ksp_mmu(next)
static inline void load_ksp_mmu(struct task_struct *task)

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@ -4,3 +4,8 @@
#else
#include "setup_no.c"
#endif
#if IS_ENABLED(CONFIG_INPUT_M68K_BEEP)
void (*mach_beep)(unsigned int, unsigned int);
EXPORT_SYMBOL(mach_beep);
#endif

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@ -106,10 +106,6 @@ EXPORT_SYMBOL(mach_heartbeat);
#ifdef CONFIG_M68K_L2_CACHE
void (*mach_l2_flush) (int);
#endif
#if IS_ENABLED(CONFIG_INPUT_M68K_BEEP)
void (*mach_beep)(unsigned int, unsigned int);
EXPORT_SYMBOL(mach_beep);
#endif
#if defined(CONFIG_ISA) && defined(MULTI_ISA)
int isa_type;
int isa_sex;
@ -344,6 +340,8 @@ void __init setup_arch(char **cmdline_p)
#ifdef CONFIG_COLDFIRE
case MACH_M54XX:
case MACH_M5441X:
cf_bootmem_alloc();
cf_mmu_context_init();
config_BSP(NULL, 0);
break;
#endif

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@ -170,7 +170,7 @@ void __init cf_bootmem_alloc(void)
max_pfn = max_low_pfn = PFN_DOWN(_ramend);
high_memory = (void *)_ramend;
m68k_virt_to_node_shift = fls(_ramend - _rambase - 1) - 6;
m68k_virt_to_node_shift = fls(_ramend - 1) - 6;
module_fixup(NULL, __start_fixup, __stop_fixup);
/* setup bootmem data */
@ -184,7 +184,7 @@ void __init cf_bootmem_alloc(void)
* Initialize the context management stuff.
* The following was taken from arch/ppc/mmu_context.c
*/
void __init mmu_context_init(void)
void __init cf_mmu_context_init(void)
{
/*
* Some processors have too few contexts to reserve one for