From c807dbedb5e5adbd4e1e2d07574d230df924a5a7 Mon Sep 17 00:00:00 2001 From: Tero Kristo Date: Mon, 23 Feb 2015 21:06:08 +0200 Subject: [PATCH 01/35] clk: ti: fix ti_clk_get_reg_addr error handling There is a case where NULL can be a valid return value for ti_clk_get_reg_addr, specifically the case where both the provider index and register offsets are zero. In this case, the current error checking against a NULL pointer will fail. Thus, change the API to return a ERR_PTR value in an error case, and change all the users of this API to check against IS_ERR instead. Signed-off-by: Tero Kristo Acked-by: Michael Turquette --- drivers/clk/ti/apll.c | 5 +++-- drivers/clk/ti/autoidle.c | 2 +- drivers/clk/ti/clk.c | 7 ++++--- drivers/clk/ti/divider.c | 4 ++-- drivers/clk/ti/dpll.c | 6 +++--- drivers/clk/ti/gate.c | 4 ++-- drivers/clk/ti/interface.c | 2 +- drivers/clk/ti/mux.c | 4 ++-- 8 files changed, 18 insertions(+), 16 deletions(-) diff --git a/drivers/clk/ti/apll.c b/drivers/clk/ti/apll.c index 72d97279eae1..49baf3831546 100644 --- a/drivers/clk/ti/apll.c +++ b/drivers/clk/ti/apll.c @@ -203,7 +203,7 @@ static void __init of_dra7_apll_setup(struct device_node *node) ad->control_reg = ti_clk_get_reg_addr(node, 0); ad->idlest_reg = ti_clk_get_reg_addr(node, 1); - if (!ad->control_reg || !ad->idlest_reg) + if (IS_ERR(ad->control_reg) || IS_ERR(ad->idlest_reg)) goto cleanup; ad->idlest_mask = 0x1; @@ -384,7 +384,8 @@ static void __init of_omap2_apll_setup(struct device_node *node) ad->autoidle_reg = ti_clk_get_reg_addr(node, 1); ad->idlest_reg = ti_clk_get_reg_addr(node, 2); - if (!ad->control_reg || !ad->autoidle_reg || !ad->idlest_reg) + if (IS_ERR(ad->control_reg) || IS_ERR(ad->autoidle_reg) || + IS_ERR(ad->idlest_reg)) goto cleanup; clk = clk_register(NULL, &clk_hw->hw); diff --git a/drivers/clk/ti/autoidle.c b/drivers/clk/ti/autoidle.c index 8912ff80af34..e75c64c9e81c 100644 --- a/drivers/clk/ti/autoidle.c +++ b/drivers/clk/ti/autoidle.c @@ -119,7 +119,7 @@ int __init of_ti_clk_autoidle_setup(struct device_node *node) clk->name = node->name; clk->reg = ti_clk_get_reg_addr(node, 0); - if (!clk->reg) { + if (IS_ERR(clk->reg)) { kfree(clk); return -EINVAL; } diff --git a/drivers/clk/ti/clk.c b/drivers/clk/ti/clk.c index e22b95646e09..0ebe5c51062b 100644 --- a/drivers/clk/ti/clk.c +++ b/drivers/clk/ti/clk.c @@ -103,7 +103,8 @@ int __init ti_clk_retry_init(struct device_node *node, struct clk_hw *hw, * @index: register index from the clock node * * Builds clock register address from device tree information. This - * is a struct of type clk_omap_reg. + * is a struct of type clk_omap_reg. Returns a pointer to the register + * address, or a pointer error value in failure. */ void __iomem *ti_clk_get_reg_addr(struct device_node *node, int index) { @@ -121,14 +122,14 @@ void __iomem *ti_clk_get_reg_addr(struct device_node *node, int index) if (i == CLK_MAX_MEMMAPS) { pr_err("clk-provider not found for %s!\n", node->name); - return NULL; + return ERR_PTR(-ENOENT); } reg->index = i; if (of_property_read_u32_index(node, "reg", index, &val)) { pr_err("%s must have reg[%d]!\n", node->name, index); - return NULL; + return ERR_PTR(-EINVAL); } reg->offset = val; diff --git a/drivers/clk/ti/divider.c b/drivers/clk/ti/divider.c index 6211893c0980..ff5f117950a9 100644 --- a/drivers/clk/ti/divider.c +++ b/drivers/clk/ti/divider.c @@ -530,8 +530,8 @@ static int __init ti_clk_divider_populate(struct device_node *node, u32 val; *reg = ti_clk_get_reg_addr(node, 0); - if (!*reg) - return -EINVAL; + if (IS_ERR(*reg)) + return PTR_ERR(*reg); if (!of_property_read_u32(node, "ti,bit-shift", &val)) *shift = val; diff --git a/drivers/clk/ti/dpll.c b/drivers/clk/ti/dpll.c index 81dc4698dc41..11478a501c30 100644 --- a/drivers/clk/ti/dpll.c +++ b/drivers/clk/ti/dpll.c @@ -390,18 +390,18 @@ static void __init of_ti_dpll_setup(struct device_node *node, #endif } else { dd->idlest_reg = ti_clk_get_reg_addr(node, 1); - if (!dd->idlest_reg) + if (IS_ERR(dd->idlest_reg)) goto cleanup; dd->mult_div1_reg = ti_clk_get_reg_addr(node, 2); } - if (!dd->control_reg || !dd->mult_div1_reg) + if (IS_ERR(dd->control_reg) || IS_ERR(dd->mult_div1_reg)) goto cleanup; if (dd->autoidle_mask) { dd->autoidle_reg = ti_clk_get_reg_addr(node, 3); - if (!dd->autoidle_reg) + if (IS_ERR(dd->autoidle_reg)) goto cleanup; } diff --git a/drivers/clk/ti/gate.c b/drivers/clk/ti/gate.c index d493307b73f4..0c6fdfcd5f93 100644 --- a/drivers/clk/ti/gate.c +++ b/drivers/clk/ti/gate.c @@ -225,7 +225,7 @@ static void __init _of_ti_gate_clk_setup(struct device_node *node, if (ops != &omap_gate_clkdm_clk_ops) { reg = ti_clk_get_reg_addr(node, 0); - if (!reg) + if (IS_ERR(reg)) return; if (!of_property_read_u32(node, "ti,bit-shift", &val)) @@ -264,7 +264,7 @@ _of_ti_composite_gate_clk_setup(struct device_node *node, return; gate->enable_reg = ti_clk_get_reg_addr(node, 0); - if (!gate->enable_reg) + if (IS_ERR(gate->enable_reg)) goto cleanup; of_property_read_u32(node, "ti,bit-shift", &val); diff --git a/drivers/clk/ti/interface.c b/drivers/clk/ti/interface.c index 265d91f071c5..c76230d8dd04 100644 --- a/drivers/clk/ti/interface.c +++ b/drivers/clk/ti/interface.c @@ -111,7 +111,7 @@ static void __init _of_ti_interface_clk_setup(struct device_node *node, u32 val; reg = ti_clk_get_reg_addr(node, 0); - if (!reg) + if (IS_ERR(reg)) return; if (!of_property_read_u32(node, "ti,bit-shift", &val)) diff --git a/drivers/clk/ti/mux.c b/drivers/clk/ti/mux.c index 728e253606bc..5cdeed538b08 100644 --- a/drivers/clk/ti/mux.c +++ b/drivers/clk/ti/mux.c @@ -210,7 +210,7 @@ static void of_mux_clk_setup(struct device_node *node) reg = ti_clk_get_reg_addr(node, 0); - if (!reg) + if (IS_ERR(reg)) goto cleanup; of_property_read_u32(node, "ti,bit-shift", &shift); @@ -283,7 +283,7 @@ static void __init of_ti_composite_mux_clk_setup(struct device_node *node) mux->reg = ti_clk_get_reg_addr(node, 0); - if (!mux->reg) + if (IS_ERR(mux->reg)) goto cleanup; if (!of_property_read_u32(node, "ti,bit-shift", &val)) From 3a1a388e910950553817b71046b00511d6242b06 Mon Sep 17 00:00:00 2001 From: Tero Kristo Date: Tue, 18 Nov 2014 14:59:36 +0200 Subject: [PATCH 02/35] ARM: OMAP2+: PRCM: rename of_prcm_init to omap_prcm_init This avoids conflicts in the global namespace, and is more descriptive of the purpose anyway. Signed-off-by: Tero Kristo --- arch/arm/mach-omap2/io.c | 2 +- arch/arm/mach-omap2/prm.h | 2 +- arch/arm/mach-omap2/prm_common.c | 8 +++++++- 3 files changed, 9 insertions(+), 3 deletions(-) diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c index c4871c55bd8b..f504f7157cbe 100644 --- a/arch/arm/mach-omap2/io.c +++ b/arch/arm/mach-omap2/io.c @@ -764,7 +764,7 @@ int __init omap_clk_init(void) ti_clk_init_features(); if (of_have_populated_dt()) { - ret = of_prcm_init(); + ret = omap_prcm_init(); if (ret) return ret; diff --git a/arch/arm/mach-omap2/prm.h b/arch/arm/mach-omap2/prm.h index b9061a6a2db8..ba9b9336de7c 100644 --- a/arch/arm/mach-omap2/prm.h +++ b/arch/arm/mach-omap2/prm.h @@ -19,7 +19,7 @@ extern void __iomem *prm_base; extern u16 prm_features; extern void omap2_set_globals_prm(void __iomem *prm); -int of_prcm_init(void); +int omap_prcm_init(void); void omap3_prcm_legacy_iomaps_init(void); # endif diff --git a/arch/arm/mach-omap2/prm_common.c b/arch/arm/mach-omap2/prm_common.c index bfaa7ba595cc..c5cfaa98be9e 100644 --- a/arch/arm/mach-omap2/prm_common.c +++ b/arch/arm/mach-omap2/prm_common.c @@ -625,7 +625,13 @@ static struct ti_clk_ll_ops omap_clk_ll_ops = { .clk_writel = prm_clk_writel, }; -int __init of_prcm_init(void) +/** + * omap_prcm_init - low level init for the PRCM drivers + * + * Initializes the low level clock infrastructure for PRCM drivers. + * Returns 0 in success, negative error value in failure. + */ +int __init omap_prcm_init(void) { struct device_node *np; void __iomem *mem; From f0caa5270bcf97c6a51c89d44747da00c0d67bb8 Mon Sep 17 00:00:00 2001 From: Tero Kristo Date: Fri, 4 Apr 2014 12:14:27 +0300 Subject: [PATCH 03/35] ARM: OMAP3: PRM: invert the wkst_mask for the prm_clear_mod_irqs This makes the API the same as used with OMAP2, and makes it possible to implement a generic driver API for the functionality. Signed-off-by: Tero Kristo --- arch/arm/mach-omap2/pm34xx.c | 18 +++++++++--------- arch/arm/mach-omap2/prm3xxx.c | 8 ++++---- arch/arm/mach-omap2/prm3xxx.h | 2 +- 3 files changed, 14 insertions(+), 14 deletions(-) diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c index 88721df6001d..25813293eaa6 100644 --- a/arch/arm/mach-omap2/pm34xx.c +++ b/arch/arm/mach-omap2/pm34xx.c @@ -137,9 +137,8 @@ static irqreturn_t _prcm_int_handle_io(int irq, void *unused) { int c; - c = omap3xxx_prm_clear_mod_irqs(WKUP_MOD, 1, - ~(OMAP3430_ST_IO_MASK | - OMAP3430_ST_IO_CHAIN_MASK)); + c = omap3xxx_prm_clear_mod_irqs(WKUP_MOD, 1, OMAP3430_ST_IO_MASK | + OMAP3430_ST_IO_CHAIN_MASK); return c ? IRQ_HANDLED : IRQ_NONE; } @@ -154,13 +153,14 @@ static irqreturn_t _prcm_int_handle_wakeup(int irq, void *unused) * IO events before parsing in mux code */ c = omap3xxx_prm_clear_mod_irqs(WKUP_MOD, 1, - OMAP3430_ST_IO_MASK | - OMAP3430_ST_IO_CHAIN_MASK); - c += omap3xxx_prm_clear_mod_irqs(CORE_MOD, 1, 0); - c += omap3xxx_prm_clear_mod_irqs(OMAP3430_PER_MOD, 1, 0); + ~(OMAP3430_ST_IO_MASK | + OMAP3430_ST_IO_CHAIN_MASK)); + c += omap3xxx_prm_clear_mod_irqs(CORE_MOD, 1, ~0); + c += omap3xxx_prm_clear_mod_irqs(OMAP3430_PER_MOD, 1, ~0); if (omap_rev() > OMAP3430_REV_ES1_0) { - c += omap3xxx_prm_clear_mod_irqs(CORE_MOD, 3, 0); - c += omap3xxx_prm_clear_mod_irqs(OMAP3430ES2_USBHOST_MOD, 1, 0); + c += omap3xxx_prm_clear_mod_irqs(CORE_MOD, 3, ~0); + c += omap3xxx_prm_clear_mod_irqs(OMAP3430ES2_USBHOST_MOD, 1, + ~0); } return c ? IRQ_HANDLED : IRQ_NONE; diff --git a/arch/arm/mach-omap2/prm3xxx.c b/arch/arm/mach-omap2/prm3xxx.c index 5713bbdf83bc..4cc72e828421 100644 --- a/arch/arm/mach-omap2/prm3xxx.c +++ b/arch/arm/mach-omap2/prm3xxx.c @@ -217,7 +217,7 @@ static void omap3xxx_prm_restore_irqen(u32 *saved_mask) * omap3xxx_prm_clear_mod_irqs - clear wake-up events from PRCM interrupt * @module: PRM module to clear wakeups from * @regs: register set to clear, 1 or 3 - * @ignore_bits: wakeup status bits to ignore + * @wkst_mask: wkst bits to clear * * The purpose of this function is to clear any wake-up events latched * in the PRCM PM_WKST_x registers. It is possible that a wake-up event @@ -226,7 +226,7 @@ static void omap3xxx_prm_restore_irqen(u32 *saved_mask) * that any peripheral wake-up events occurring while attempting to * clear the PM_WKST_x are detected and cleared. */ -int omap3xxx_prm_clear_mod_irqs(s16 module, u8 regs, u32 ignore_bits) +int omap3xxx_prm_clear_mod_irqs(s16 module, u8 regs, u32 wkst_mask) { u32 wkst, fclk, iclk, clken; u16 wkst_off = (regs == 3) ? OMAP3430ES2_PM_WKST3 : PM_WKST1; @@ -238,7 +238,7 @@ int omap3xxx_prm_clear_mod_irqs(s16 module, u8 regs, u32 ignore_bits) wkst = omap2_prm_read_mod_reg(module, wkst_off); wkst &= omap2_prm_read_mod_reg(module, grpsel_off); - wkst &= ~ignore_bits; + wkst &= wkst_mask; if (wkst) { iclk = omap2_cm_read_mod_reg(module, iclk_off); fclk = omap2_cm_read_mod_reg(module, fclk_off); @@ -254,7 +254,7 @@ int omap3xxx_prm_clear_mod_irqs(s16 module, u8 regs, u32 ignore_bits) omap2_cm_set_mod_reg_bits(clken, module, fclk_off); omap2_prm_write_mod_reg(wkst, module, wkst_off); wkst = omap2_prm_read_mod_reg(module, wkst_off); - wkst &= ~ignore_bits; + wkst &= wkst_mask; c++; } omap2_cm_write_mod_reg(iclk, module, iclk_off); diff --git a/arch/arm/mach-omap2/prm3xxx.h b/arch/arm/mach-omap2/prm3xxx.h index ed8a3d8b739a..856f3c5d7f79 100644 --- a/arch/arm/mach-omap2/prm3xxx.h +++ b/arch/arm/mach-omap2/prm3xxx.h @@ -145,7 +145,7 @@ extern void omap3_prm_vcvp_write(u32 val, u8 offset); extern u32 omap3_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset); extern int __init omap3xxx_prm_init(void); -int omap3xxx_prm_clear_mod_irqs(s16 module, u8 regs, u32 ignore_bits); +int omap3xxx_prm_clear_mod_irqs(s16 module, u8 regs, u32 wkst_mask); void omap3xxx_prm_iva_idle(void); void omap3_prm_reset_modem(void); int omap3xxx_prm_clear_global_cold_reset(void); From 9cb6d36371b0a9935de92bf250c7152f5b50fdc1 Mon Sep 17 00:00:00 2001 From: Tero Kristo Date: Fri, 4 Apr 2014 12:31:51 +0300 Subject: [PATCH 04/35] ARM: OMAP2+: PRM: add generic API for clear_mod_irqs OMAP2/3 now use generic API for the prm_clear_mod_irqs, the SoC specific implementation details are provided through prm_ll_data. Signed-off-by: Tero Kristo --- arch/arm/mach-omap2/pm24xx.c | 24 +++++++++++------------- arch/arm/mach-omap2/pm34xx.c | 18 ++++++++---------- arch/arm/mach-omap2/prm.h | 2 ++ arch/arm/mach-omap2/prm2xxx.c | 4 +++- arch/arm/mach-omap2/prm2xxx.h | 2 -- arch/arm/mach-omap2/prm3xxx.c | 3 ++- arch/arm/mach-omap2/prm3xxx.h | 1 - arch/arm/mach-omap2/prm_common.c | 21 +++++++++++++++++++++ 8 files changed, 47 insertions(+), 28 deletions(-) diff --git a/arch/arm/mach-omap2/pm24xx.c b/arch/arm/mach-omap2/pm24xx.c index fe01c5a03aa2..b1aad7e1426c 100644 --- a/arch/arm/mach-omap2/pm24xx.c +++ b/arch/arm/mach-omap2/pm24xx.c @@ -75,9 +75,9 @@ static int omap2_enter_full_retention(void) /* Clear old wake-up events */ /* REVISIT: These write to reserved bits? */ - omap2xxx_prm_clear_mod_irqs(CORE_MOD, PM_WKST1, ~0); - omap2xxx_prm_clear_mod_irqs(CORE_MOD, OMAP24XX_PM_WKST2, ~0); - omap2xxx_prm_clear_mod_irqs(WKUP_MOD, PM_WKST, ~0); + omap_prm_clear_mod_irqs(CORE_MOD, PM_WKST1, ~0); + omap_prm_clear_mod_irqs(CORE_MOD, OMAP24XX_PM_WKST2, ~0); + omap_prm_clear_mod_irqs(WKUP_MOD, PM_WKST, ~0); pwrdm_set_next_pwrst(core_pwrdm, PWRDM_POWER_RET); pwrdm_set_next_pwrst(mpu_pwrdm, PWRDM_POWER_RET); @@ -104,18 +104,16 @@ no_sleep: clk_enable(osc_ck); /* clear CORE wake-up events */ - omap2xxx_prm_clear_mod_irqs(CORE_MOD, PM_WKST1, ~0); - omap2xxx_prm_clear_mod_irqs(CORE_MOD, OMAP24XX_PM_WKST2, ~0); + omap_prm_clear_mod_irqs(CORE_MOD, PM_WKST1, ~0); + omap_prm_clear_mod_irqs(CORE_MOD, OMAP24XX_PM_WKST2, ~0); /* wakeup domain events - bit 1: GPT1, bit5 GPIO */ - omap2xxx_prm_clear_mod_irqs(WKUP_MOD, PM_WKST, 0x4 | 0x1); + omap_prm_clear_mod_irqs(WKUP_MOD, PM_WKST, 0x4 | 0x1); /* MPU domain wake events */ - omap2xxx_prm_clear_mod_irqs(OCP_MOD, OMAP2_PRCM_IRQSTATUS_MPU_OFFSET, - 0x1); + omap_prm_clear_mod_irqs(OCP_MOD, OMAP2_PRCM_IRQSTATUS_MPU_OFFSET, 0x1); - omap2xxx_prm_clear_mod_irqs(OCP_MOD, OMAP2_PRCM_IRQSTATUS_MPU_OFFSET, - 0x20); + omap_prm_clear_mod_irqs(OCP_MOD, OMAP2_PRCM_IRQSTATUS_MPU_OFFSET, 0x20); pwrdm_set_next_pwrst(mpu_pwrdm, PWRDM_POWER_ON); pwrdm_set_next_pwrst(core_pwrdm, PWRDM_POWER_ON); @@ -143,9 +141,9 @@ static void omap2_enter_mpu_retention(void) * it is in retention mode. */ if (omap2_allow_mpu_retention()) { /* REVISIT: These write to reserved bits? */ - omap2xxx_prm_clear_mod_irqs(CORE_MOD, PM_WKST1, ~0); - omap2xxx_prm_clear_mod_irqs(CORE_MOD, OMAP24XX_PM_WKST2, ~0); - omap2xxx_prm_clear_mod_irqs(WKUP_MOD, PM_WKST, ~0); + omap_prm_clear_mod_irqs(CORE_MOD, PM_WKST1, ~0); + omap_prm_clear_mod_irqs(CORE_MOD, OMAP24XX_PM_WKST2, ~0); + omap_prm_clear_mod_irqs(WKUP_MOD, PM_WKST, ~0); /* Try to enter MPU retention */ pwrdm_set_next_pwrst(mpu_pwrdm, PWRDM_POWER_RET); diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c index 25813293eaa6..87b98bf92366 100644 --- a/arch/arm/mach-omap2/pm34xx.c +++ b/arch/arm/mach-omap2/pm34xx.c @@ -137,8 +137,8 @@ static irqreturn_t _prcm_int_handle_io(int irq, void *unused) { int c; - c = omap3xxx_prm_clear_mod_irqs(WKUP_MOD, 1, OMAP3430_ST_IO_MASK | - OMAP3430_ST_IO_CHAIN_MASK); + c = omap_prm_clear_mod_irqs(WKUP_MOD, 1, OMAP3430_ST_IO_MASK | + OMAP3430_ST_IO_CHAIN_MASK); return c ? IRQ_HANDLED : IRQ_NONE; } @@ -152,15 +152,13 @@ static irqreturn_t _prcm_int_handle_wakeup(int irq, void *unused) * these are handled in a separate handler to avoid acking * IO events before parsing in mux code */ - c = omap3xxx_prm_clear_mod_irqs(WKUP_MOD, 1, - ~(OMAP3430_ST_IO_MASK | - OMAP3430_ST_IO_CHAIN_MASK)); - c += omap3xxx_prm_clear_mod_irqs(CORE_MOD, 1, ~0); - c += omap3xxx_prm_clear_mod_irqs(OMAP3430_PER_MOD, 1, ~0); + c = omap_prm_clear_mod_irqs(WKUP_MOD, 1, ~(OMAP3430_ST_IO_MASK | + OMAP3430_ST_IO_CHAIN_MASK)); + c += omap_prm_clear_mod_irqs(CORE_MOD, 1, ~0); + c += omap_prm_clear_mod_irqs(OMAP3430_PER_MOD, 1, ~0); if (omap_rev() > OMAP3430_REV_ES1_0) { - c += omap3xxx_prm_clear_mod_irqs(CORE_MOD, 3, ~0); - c += omap3xxx_prm_clear_mod_irqs(OMAP3430ES2_USBHOST_MOD, 1, - ~0); + c += omap_prm_clear_mod_irqs(CORE_MOD, 3, ~0); + c += omap_prm_clear_mod_irqs(OMAP3430ES2_USBHOST_MOD, 1, ~0); } return c ? IRQ_HANDLED : IRQ_NONE; diff --git a/arch/arm/mach-omap2/prm.h b/arch/arm/mach-omap2/prm.h index ba9b9336de7c..2a01a5885c61 100644 --- a/arch/arm/mach-omap2/prm.h +++ b/arch/arm/mach-omap2/prm.h @@ -146,6 +146,7 @@ struct prm_ll_data { int (*is_hardreset_asserted)(u8 shift, u8 part, s16 prm_mod, u16 offset); void (*reset_system)(void); + int (*clear_mod_irqs)(s16 module, u8 regs, u32 wkst_mask); }; extern int prm_register(struct prm_ll_data *pld); @@ -161,6 +162,7 @@ extern void prm_clear_context_loss_flags_old(u8 part, s16 inst, u16 idx); void omap_prm_reset_system(void); void omap_prm_reconfigure_io_chain(void); +int omap_prm_clear_mod_irqs(s16 module, u8 regs, u32 wkst_mask); #endif diff --git a/arch/arm/mach-omap2/prm2xxx.c b/arch/arm/mach-omap2/prm2xxx.c index af0f15278fc2..bacb05e8cc39 100644 --- a/arch/arm/mach-omap2/prm2xxx.c +++ b/arch/arm/mach-omap2/prm2xxx.c @@ -123,13 +123,14 @@ static void omap2xxx_prm_dpll_reset(void) * Clears wakeup status bits for a given module, so that the device can * re-enter idle. */ -void omap2xxx_prm_clear_mod_irqs(s16 module, u8 regs, u32 wkst_mask) +static int omap2xxx_prm_clear_mod_irqs(s16 module, u8 regs, u32 wkst_mask) { u32 wkst; wkst = omap2_prm_read_mod_reg(module, regs); wkst &= wkst_mask; omap2_prm_write_mod_reg(wkst, module, regs); + return 0; } int omap2xxx_clkdm_sleep(struct clockdomain *clkdm) @@ -216,6 +217,7 @@ static struct prm_ll_data omap2xxx_prm_ll_data = { .deassert_hardreset = &omap2_prm_deassert_hardreset, .is_hardreset_asserted = &omap2_prm_is_hardreset_asserted, .reset_system = &omap2xxx_prm_dpll_reset, + .clear_mod_irqs = &omap2xxx_prm_clear_mod_irqs, }; int __init omap2xxx_prm_init(void) diff --git a/arch/arm/mach-omap2/prm2xxx.h b/arch/arm/mach-omap2/prm2xxx.h index 1d51643062f7..9c91f4fac36d 100644 --- a/arch/arm/mach-omap2/prm2xxx.h +++ b/arch/arm/mach-omap2/prm2xxx.h @@ -124,8 +124,6 @@ extern int omap2xxx_clkdm_sleep(struct clockdomain *clkdm); extern int omap2xxx_clkdm_wakeup(struct clockdomain *clkdm); -void omap2xxx_prm_clear_mod_irqs(s16 module, u8 regs, u32 wkst_mask); - extern int __init omap2xxx_prm_init(void); #endif diff --git a/arch/arm/mach-omap2/prm3xxx.c b/arch/arm/mach-omap2/prm3xxx.c index 4cc72e828421..a4443344affe 100644 --- a/arch/arm/mach-omap2/prm3xxx.c +++ b/arch/arm/mach-omap2/prm3xxx.c @@ -226,7 +226,7 @@ static void omap3xxx_prm_restore_irqen(u32 *saved_mask) * that any peripheral wake-up events occurring while attempting to * clear the PM_WKST_x are detected and cleared. */ -int omap3xxx_prm_clear_mod_irqs(s16 module, u8 regs, u32 wkst_mask) +static int omap3xxx_prm_clear_mod_irqs(s16 module, u8 regs, u32 wkst_mask) { u32 wkst, fclk, iclk, clken; u16 wkst_off = (regs == 3) ? OMAP3430ES2_PM_WKST3 : PM_WKST1; @@ -664,6 +664,7 @@ static struct prm_ll_data omap3xxx_prm_ll_data = { .deassert_hardreset = &omap2_prm_deassert_hardreset, .is_hardreset_asserted = &omap2_prm_is_hardreset_asserted, .reset_system = &omap3xxx_prm_dpll3_reset, + .clear_mod_irqs = &omap3xxx_prm_clear_mod_irqs, }; int __init omap3xxx_prm_init(void) diff --git a/arch/arm/mach-omap2/prm3xxx.h b/arch/arm/mach-omap2/prm3xxx.h index 856f3c5d7f79..5a09a74e7f8f 100644 --- a/arch/arm/mach-omap2/prm3xxx.h +++ b/arch/arm/mach-omap2/prm3xxx.h @@ -145,7 +145,6 @@ extern void omap3_prm_vcvp_write(u32 val, u8 offset); extern u32 omap3_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset); extern int __init omap3xxx_prm_init(void); -int omap3xxx_prm_clear_mod_irqs(s16 module, u8 regs, u32 wkst_mask); void omap3xxx_prm_iva_idle(void); void omap3_prm_reset_modem(void); int omap3xxx_prm_clear_global_cold_reset(void); diff --git a/arch/arm/mach-omap2/prm_common.c b/arch/arm/mach-omap2/prm_common.c index c5cfaa98be9e..2c2e7ed1bc6c 100644 --- a/arch/arm/mach-omap2/prm_common.c +++ b/arch/arm/mach-omap2/prm_common.c @@ -533,6 +533,27 @@ void omap_prm_reset_system(void) cpu_relax(); } +/** + * omap_prm_clear_mod_irqs - clear wake-up events from PRCM interrupt + * @module: PRM module to clear wakeups from + * @regs: register to clear + * @wkst_mask: wkst bits to clear + * + * Clears any wakeup events for the module and register set defined. + * Uses SoC specific implementation to do the actual wakeup status + * clearing. + */ +int omap_prm_clear_mod_irqs(s16 module, u8 regs, u32 wkst_mask) +{ + if (!prm_ll_data->clear_mod_irqs) { + WARN_ONCE(1, "prm: %s: no mapping function defined\n", + __func__); + return -EINVAL; + } + + return prm_ll_data->clear_mod_irqs(module, regs, wkst_mask); +} + /** * prm_register - register per-SoC low-level data with the PRM * @pld: low-level per-SoC OMAP PRM data & function pointers to register From e9f1ddcdec54d32892a0a749de017a39c6c84beb Mon Sep 17 00:00:00 2001 From: Tero Kristo Date: Fri, 4 Apr 2014 15:52:01 +0300 Subject: [PATCH 05/35] ARM: OMAP3+: PRM: add common APIs for prm_vp_check/clear_txdone PRM driver now only exports a generic API for clearing / checking VP txdone status. Signed-off-by: Tero Kristo --- arch/arm/mach-omap2/prm.h | 14 ++++++++++++ arch/arm/mach-omap2/prm3xxx.c | 6 ++++-- arch/arm/mach-omap2/prm3xxx.h | 4 ---- arch/arm/mach-omap2/prm44xx.c | 6 ++++-- arch/arm/mach-omap2/prm44xx_54xx.h | 4 ---- arch/arm/mach-omap2/prm_common.c | 34 ++++++++++++++++++++++++++++++ arch/arm/mach-omap2/vp.h | 9 -------- arch/arm/mach-omap2/vp3xxx_data.c | 4 ++-- arch/arm/mach-omap2/vp44xx_data.c | 4 ++-- 9 files changed, 60 insertions(+), 25 deletions(-) diff --git a/arch/arm/mach-omap2/prm.h b/arch/arm/mach-omap2/prm.h index 2a01a5885c61..4e390ec0ed85 100644 --- a/arch/arm/mach-omap2/prm.h +++ b/arch/arm/mach-omap2/prm.h @@ -147,6 +147,8 @@ struct prm_ll_data { u16 offset); void (*reset_system)(void); int (*clear_mod_irqs)(s16 module, u8 regs, u32 wkst_mask); + u32 (*vp_check_txdone)(u8 vp_id); + void (*vp_clear_txdone)(u8 vp_id); }; extern int prm_register(struct prm_ll_data *pld); @@ -164,6 +166,18 @@ void omap_prm_reset_system(void); void omap_prm_reconfigure_io_chain(void); int omap_prm_clear_mod_irqs(s16 module, u8 regs, u32 wkst_mask); +/* + * Voltage Processor (VP) identifiers + */ +#define OMAP3_VP_VDD_MPU_ID 0 +#define OMAP3_VP_VDD_CORE_ID 1 +#define OMAP4_VP_VDD_CORE_ID 0 +#define OMAP4_VP_VDD_IVA_ID 1 +#define OMAP4_VP_VDD_MPU_ID 2 + +u32 omap_prm_vp_check_txdone(u8 vp_id); +void omap_prm_vp_clear_txdone(u8 vp_id); + #endif diff --git a/arch/arm/mach-omap2/prm3xxx.c b/arch/arm/mach-omap2/prm3xxx.c index a4443344affe..2b478adc337d 100644 --- a/arch/arm/mach-omap2/prm3xxx.c +++ b/arch/arm/mach-omap2/prm3xxx.c @@ -96,7 +96,7 @@ static struct omap3_vp omap3_vp[] = { #define MAX_VP_ID ARRAY_SIZE(omap3_vp); -u32 omap3_prm_vp_check_txdone(u8 vp_id) +static u32 omap3_prm_vp_check_txdone(u8 vp_id) { struct omap3_vp *vp = &omap3_vp[vp_id]; u32 irqstatus; @@ -106,7 +106,7 @@ u32 omap3_prm_vp_check_txdone(u8 vp_id) return irqstatus & vp->tranxdone_status; } -void omap3_prm_vp_clear_txdone(u8 vp_id) +static void omap3_prm_vp_clear_txdone(u8 vp_id) { struct omap3_vp *vp = &omap3_vp[vp_id]; @@ -665,6 +665,8 @@ static struct prm_ll_data omap3xxx_prm_ll_data = { .is_hardreset_asserted = &omap2_prm_is_hardreset_asserted, .reset_system = &omap3xxx_prm_dpll3_reset, .clear_mod_irqs = &omap3xxx_prm_clear_mod_irqs, + .vp_check_txdone = &omap3_prm_vp_check_txdone, + .vp_clear_txdone = &omap3_prm_vp_clear_txdone, }; int __init omap3xxx_prm_init(void) diff --git a/arch/arm/mach-omap2/prm3xxx.h b/arch/arm/mach-omap2/prm3xxx.h index 5a09a74e7f8f..55e4c898ba25 100644 --- a/arch/arm/mach-omap2/prm3xxx.h +++ b/arch/arm/mach-omap2/prm3xxx.h @@ -132,10 +132,6 @@ #ifndef __ASSEMBLER__ -/* OMAP3-specific VP functions */ -u32 omap3_prm_vp_check_txdone(u8 vp_id); -void omap3_prm_vp_clear_txdone(u8 vp_id); - /* * OMAP3 access functions for voltage controller (VC) and * voltage proccessor (VP) in the PRM. diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c index a08a617a6c11..1af0137e8283 100644 --- a/arch/arm/mach-omap2/prm44xx.c +++ b/arch/arm/mach-omap2/prm44xx.c @@ -138,7 +138,7 @@ static struct omap4_vp omap4_vp[] = { }, }; -u32 omap4_prm_vp_check_txdone(u8 vp_id) +static u32 omap4_prm_vp_check_txdone(u8 vp_id) { struct omap4_vp *vp = &omap4_vp[vp_id]; u32 irqstatus; @@ -149,7 +149,7 @@ u32 omap4_prm_vp_check_txdone(u8 vp_id) return irqstatus & vp->tranxdone_status; } -void omap4_prm_vp_clear_txdone(u8 vp_id) +static void omap4_prm_vp_clear_txdone(u8 vp_id) { struct omap4_vp *vp = &omap4_vp[vp_id]; @@ -699,6 +699,8 @@ static struct prm_ll_data omap44xx_prm_ll_data = { .deassert_hardreset = omap4_prminst_deassert_hardreset, .is_hardreset_asserted = omap4_prminst_is_hardreset_asserted, .reset_system = omap4_prminst_global_warm_sw_reset, + .vp_check_txdone = omap4_prm_vp_check_txdone, + .vp_clear_txdone = omap4_prm_vp_clear_txdone, }; int __init omap44xx_prm_init(void) diff --git a/arch/arm/mach-omap2/prm44xx_54xx.h b/arch/arm/mach-omap2/prm44xx_54xx.h index 714329565b90..a470185d9ede 100644 --- a/arch/arm/mach-omap2/prm44xx_54xx.h +++ b/arch/arm/mach-omap2/prm44xx_54xx.h @@ -26,10 +26,6 @@ /* Function prototypes */ #ifndef __ASSEMBLER__ -/* OMAP4/OMAP5-specific VP functions */ -u32 omap4_prm_vp_check_txdone(u8 vp_id); -void omap4_prm_vp_clear_txdone(u8 vp_id); - /* * OMAP4/OMAP5 access functions for voltage controller (VC) and * voltage proccessor (VP) in the PRM. diff --git a/arch/arm/mach-omap2/prm_common.c b/arch/arm/mach-omap2/prm_common.c index 2c2e7ed1bc6c..79cee117f971 100644 --- a/arch/arm/mach-omap2/prm_common.c +++ b/arch/arm/mach-omap2/prm_common.c @@ -554,6 +554,40 @@ int omap_prm_clear_mod_irqs(s16 module, u8 regs, u32 wkst_mask) return prm_ll_data->clear_mod_irqs(module, regs, wkst_mask); } +/** + * omap_prm_vp_check_txdone - check voltage processor TX done status + * + * Checks if voltage processor transmission has been completed. + * Returns non-zero if a transmission has completed, 0 otherwise. + */ +u32 omap_prm_vp_check_txdone(u8 vp_id) +{ + if (!prm_ll_data->vp_check_txdone) { + WARN_ONCE(1, "prm: %s: no mapping function defined\n", + __func__); + return 0; + } + + return prm_ll_data->vp_check_txdone(vp_id); +} + +/** + * omap_prm_vp_clear_txdone - clears voltage processor TX done status + * + * Clears the status bit for completed voltage processor transmission + * returned by prm_vp_check_txdone. + */ +void omap_prm_vp_clear_txdone(u8 vp_id) +{ + if (!prm_ll_data->vp_clear_txdone) { + WARN_ONCE(1, "prm: %s: no mapping function defined\n", + __func__); + return; + } + + prm_ll_data->vp_clear_txdone(vp_id); +} + /** * prm_register - register per-SoC low-level data with the PRM * @pld: low-level per-SoC OMAP PRM data & function pointers to register diff --git a/arch/arm/mach-omap2/vp.h b/arch/arm/mach-omap2/vp.h index 0fdf7080e4a6..7e0829682bd0 100644 --- a/arch/arm/mach-omap2/vp.h +++ b/arch/arm/mach-omap2/vp.h @@ -21,15 +21,6 @@ struct voltagedomain; -/* - * Voltage Processor (VP) identifiers - */ -#define OMAP3_VP_VDD_MPU_ID 0 -#define OMAP3_VP_VDD_CORE_ID 1 -#define OMAP4_VP_VDD_CORE_ID 0 -#define OMAP4_VP_VDD_IVA_ID 1 -#define OMAP4_VP_VDD_MPU_ID 2 - /* XXX document */ #define VP_IDLE_TIMEOUT 200 #define VP_TRANXDONE_TIMEOUT 300 diff --git a/arch/arm/mach-omap2/vp3xxx_data.c b/arch/arm/mach-omap2/vp3xxx_data.c index 1914e026245e..b0590fe6ab01 100644 --- a/arch/arm/mach-omap2/vp3xxx_data.c +++ b/arch/arm/mach-omap2/vp3xxx_data.c @@ -28,8 +28,8 @@ #include "prm2xxx_3xxx.h" static const struct omap_vp_ops omap3_vp_ops = { - .check_txdone = omap3_prm_vp_check_txdone, - .clear_txdone = omap3_prm_vp_clear_txdone, + .check_txdone = omap_prm_vp_check_txdone, + .clear_txdone = omap_prm_vp_clear_txdone, }; /* diff --git a/arch/arm/mach-omap2/vp44xx_data.c b/arch/arm/mach-omap2/vp44xx_data.c index e62f6b018beb..2448bb9a8716 100644 --- a/arch/arm/mach-omap2/vp44xx_data.c +++ b/arch/arm/mach-omap2/vp44xx_data.c @@ -28,8 +28,8 @@ #include "vp.h" static const struct omap_vp_ops omap4_vp_ops = { - .check_txdone = omap4_prm_vp_check_txdone, - .clear_txdone = omap4_prm_vp_clear_txdone, + .check_txdone = omap_prm_vp_check_txdone, + .clear_txdone = omap_prm_vp_clear_txdone, }; /* From 4e3870f3f62b18d92ff1ec5e7ff408afed0766f0 Mon Sep 17 00:00:00 2001 From: Tero Kristo Date: Thu, 6 Nov 2014 14:34:32 +0200 Subject: [PATCH 06/35] ARM: OMAP4+: PRM: move omap_prm_base_init under OMAP4 PRM driver There is no need to call this separately from io.c, rather this can be done commonly under the PRM driver. Signed-off-by: Tero Kristo --- arch/arm/mach-omap2/io.c | 4 ---- arch/arm/mach-omap2/prm44xx.c | 2 ++ 2 files changed, 2 insertions(+), 4 deletions(-) diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c index f504f7157cbe..5569c2f63acf 100644 --- a/arch/arm/mach-omap2/io.c +++ b/arch/arm/mach-omap2/io.c @@ -623,7 +623,6 @@ void __init am43xx_init_early(void) NULL); omap2_set_globals_prm(AM33XX_L4_WK_IO_ADDRESS(AM43XX_PRCM_BASE)); omap2_set_globals_cm(AM33XX_L4_WK_IO_ADDRESS(AM43XX_PRCM_BASE), NULL); - omap_prm_base_init(); omap_cm_base_init(); omap3xxx_check_revision(); am33xx_check_features(); @@ -654,7 +653,6 @@ void __init omap4430_init_early(void) omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP4430_CM_BASE), OMAP2_L4_IO_ADDRESS(OMAP4430_CM2_BASE)); omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP4430_PRCM_MPU_BASE)); - omap_prm_base_init(); omap_cm_base_init(); omap4xxx_check_revision(); omap4xxx_check_features(); @@ -690,7 +688,6 @@ void __init omap5_init_early(void) OMAP2_L4_IO_ADDRESS(OMAP54XX_CM_CORE_BASE)); omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRCM_MPU_BASE)); omap4_pm_init_early(); - omap_prm_base_init(); omap_cm_base_init(); omap44xx_prm_init(); omap5xxx_check_revision(); @@ -722,7 +719,6 @@ void __init dra7xx_init_early(void) OMAP2_L4_IO_ADDRESS(OMAP54XX_CM_CORE_BASE)); omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRCM_MPU_BASE)); omap4_pm_init_early(); - omap_prm_base_init(); omap_cm_base_init(); omap44xx_prm_init(); dra7xxx_check_revision(); diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c index 1af0137e8283..6f647f698467 100644 --- a/arch/arm/mach-omap2/prm44xx.c +++ b/arch/arm/mach-omap2/prm44xx.c @@ -705,6 +705,8 @@ static struct prm_ll_data omap44xx_prm_ll_data = { int __init omap44xx_prm_init(void) { + omap_prm_base_init(); + if (cpu_is_omap44xx() || soc_is_omap54xx() || soc_is_dra7xx()) prm_features |= PRM_HAS_IO_WAKEUP; From 66db6428d5dccac9f38d92d521a9b3de8d9d0b0b Mon Sep 17 00:00:00 2001 From: Tero Kristo Date: Thu, 6 Nov 2014 14:39:40 +0200 Subject: [PATCH 07/35] ARM: OMAP4+: CM: move omap_cm_base_init under OMAP4 CM driver There is no need to call this separately from io.c, rather this can be done commonly under the CM driver. Also, this patch makes the API static, as it is no longer used outside the driver file. Signed-off-by: Tero Kristo --- arch/arm/mach-omap2/cm44xx.h | 1 - arch/arm/mach-omap2/cminst44xx.c | 4 +++- arch/arm/mach-omap2/io.c | 4 ---- 3 files changed, 3 insertions(+), 6 deletions(-) diff --git a/arch/arm/mach-omap2/cm44xx.h b/arch/arm/mach-omap2/cm44xx.h index 728d06a4af19..ad6e263c5a6b 100644 --- a/arch/arm/mach-omap2/cm44xx.h +++ b/arch/arm/mach-omap2/cm44xx.h @@ -23,7 +23,6 @@ #define OMAP4_CM_CLKSTCTRL 0x0000 #define OMAP4_CM_STATICDEP 0x0004 -void omap_cm_base_init(void); int omap4_cm_init(void); #endif diff --git a/arch/arm/mach-omap2/cminst44xx.c b/arch/arm/mach-omap2/cminst44xx.c index 95a8cff66aff..9319034bebff 100644 --- a/arch/arm/mach-omap2/cminst44xx.c +++ b/arch/arm/mach-omap2/cminst44xx.c @@ -63,7 +63,7 @@ static void __iomem *_cm_bases[OMAP4_MAX_PRCM_PARTITIONS]; * Populates the base addresses of the _cm_bases * array used for read/write of cm module registers. */ -void omap_cm_base_init(void) +static void omap_cm_base_init(void) { _cm_bases[OMAP4430_PRM_PARTITION] = prm_base; _cm_bases[OMAP4430_CM1_PARTITION] = cm_base; @@ -516,6 +516,8 @@ static struct cm_ll_data omap4xxx_cm_ll_data = { int __init omap4_cm_init(void) { + omap_cm_base_init(); + return cm_register(&omap4xxx_cm_ll_data); } diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c index 5569c2f63acf..364b530bf029 100644 --- a/arch/arm/mach-omap2/io.c +++ b/arch/arm/mach-omap2/io.c @@ -623,7 +623,6 @@ void __init am43xx_init_early(void) NULL); omap2_set_globals_prm(AM33XX_L4_WK_IO_ADDRESS(AM43XX_PRCM_BASE)); omap2_set_globals_cm(AM33XX_L4_WK_IO_ADDRESS(AM43XX_PRCM_BASE), NULL); - omap_cm_base_init(); omap3xxx_check_revision(); am33xx_check_features(); omap44xx_prm_init(); @@ -653,7 +652,6 @@ void __init omap4430_init_early(void) omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP4430_CM_BASE), OMAP2_L4_IO_ADDRESS(OMAP4430_CM2_BASE)); omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP4430_PRCM_MPU_BASE)); - omap_cm_base_init(); omap4xxx_check_revision(); omap4xxx_check_features(); omap4_cm_init(); @@ -688,7 +686,6 @@ void __init omap5_init_early(void) OMAP2_L4_IO_ADDRESS(OMAP54XX_CM_CORE_BASE)); omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRCM_MPU_BASE)); omap4_pm_init_early(); - omap_cm_base_init(); omap44xx_prm_init(); omap5xxx_check_revision(); omap4_cm_init(); @@ -719,7 +716,6 @@ void __init dra7xx_init_early(void) OMAP2_L4_IO_ADDRESS(OMAP54XX_CM_CORE_BASE)); omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRCM_MPU_BASE)); omap4_pm_init_early(); - omap_cm_base_init(); omap44xx_prm_init(); dra7xxx_check_revision(); omap4_cm_init(); From b22df89fcc470f27ac442b5c0e8cdfc21d51de9b Mon Sep 17 00:00:00 2001 From: Tero Kristo Date: Wed, 19 Nov 2014 16:13:57 +0200 Subject: [PATCH 08/35] ARM: OMAP4: PRM: move omap4xxx_prm_init earlier in init order OMAP4 has different ordering of PRM and CM init calls in the early init. Re-oder these accordingly for OMAP4 also. This is needed so that we can do some optimizations in the following patches for the PRCM init. Signed-off-by: Tero Kristo --- arch/arm/mach-omap2/io.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c index 364b530bf029..460da22a005c 100644 --- a/arch/arm/mach-omap2/io.c +++ b/arch/arm/mach-omap2/io.c @@ -654,9 +654,9 @@ void __init omap4430_init_early(void) omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP4430_PRCM_MPU_BASE)); omap4xxx_check_revision(); omap4xxx_check_features(); + omap44xx_prm_init(); omap4_cm_init(); omap4_pm_init_early(); - omap44xx_prm_init(); omap44xx_voltagedomains_init(); omap44xx_powerdomains_init(); omap44xx_clockdomains_init(); From e8e8f7e41b86c3d89e6db2cf9e54cf2b17ff112a Mon Sep 17 00:00:00 2001 From: Tero Kristo Date: Wed, 25 Feb 2015 15:09:21 +0200 Subject: [PATCH 09/35] Documentation: DT: document PRCM compatible strings for dm81x SoCs These PRCM nodes were earlier added in patch 7800064ba5 ("ARM: dts: Add basic dm816x device tree configuration"), but the documentation for the same wasn't added. Fix this by adding the missing compatible strings under the generic prcm.txt document. Signed-off-by: Tero Kristo --- Documentation/devicetree/bindings/arm/omap/prcm.txt | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/omap/prcm.txt b/Documentation/devicetree/bindings/arm/omap/prcm.txt index 79074dac684a..68f96f8d3947 100644 --- a/Documentation/devicetree/bindings/arm/omap/prcm.txt +++ b/Documentation/devicetree/bindings/arm/omap/prcm.txt @@ -29,6 +29,10 @@ Required properties: "ti,dra7-prm" "ti,dra7-cm-core-aon" "ti,dra7-cm-core" + "ti,dm814-prcm" + "ti,dm814-scrm" + "ti,dm816-prcm" + "ti,dm816-scrm" - reg: Contains PRCM module register address range (base address and length) - clocks: clocks for this module From 3a3e1c88362429ca3a6ef84d232e56b197294ce0 Mon Sep 17 00:00:00 2001 From: Tero Kristo Date: Mon, 23 Feb 2015 15:57:32 +0200 Subject: [PATCH 10/35] ARM: OMAP2+: PRCM: add support for static clock memmap indices All clock provider related drivers will now register their iomaps with a static index. This makes it easier to split up the individual drivers to their own files in subsequent patches. Signed-off-by: Tero Kristo --- arch/arm/mach-omap2/prcm-common.h | 8 ++++ arch/arm/mach-omap2/prm_common.c | 79 +++++++++++++++++++------------ include/linux/clk/ti.h | 1 + 3 files changed, 59 insertions(+), 29 deletions(-) diff --git a/arch/arm/mach-omap2/prcm-common.h b/arch/arm/mach-omap2/prcm-common.h index 6163d66102a3..ee38356b3601 100644 --- a/arch/arm/mach-omap2/prcm-common.h +++ b/arch/arm/mach-omap2/prcm-common.h @@ -518,6 +518,14 @@ struct omap_prcm_irq_setup { .priority = _priority \ } +/** + * struct omap_prcm_init_data - PRCM driver init data + * @index: clock memory mapping index to be used + */ +struct omap_prcm_init_data { + int index; +}; + extern void omap_prcm_irq_cleanup(void); extern int omap_prcm_register_chain_handler( struct omap_prcm_irq_setup *irq_setup); diff --git a/arch/arm/mach-omap2/prm_common.c b/arch/arm/mach-omap2/prm_common.c index 79cee117f971..8ec52012f85d 100644 --- a/arch/arm/mach-omap2/prm_common.c +++ b/arch/arm/mach-omap2/prm_common.c @@ -633,31 +633,47 @@ int prm_unregister(struct prm_ll_data *pld) return 0; } +static struct omap_prcm_init_data prm_data = { + .index = TI_CLKM_PRM, +}; + +static struct omap_prcm_init_data cm_data = { + .index = TI_CLKM_CM, +}; + +static struct omap_prcm_init_data cm2_data = { + .index = TI_CLKM_CM2, +}; + +static struct omap_prcm_init_data scrm_data = { + .index = TI_CLKM_SCRM, +}; + static const struct of_device_id omap_prcm_dt_match_table[] = { - { .compatible = "ti,am3-prcm" }, - { .compatible = "ti,am3-scrm" }, - { .compatible = "ti,am4-prcm" }, - { .compatible = "ti,am4-scrm" }, - { .compatible = "ti,dm814-prcm" }, - { .compatible = "ti,dm814-scrm" }, - { .compatible = "ti,dm816-prcm" }, - { .compatible = "ti,dm816-scrm" }, - { .compatible = "ti,omap2-prcm" }, - { .compatible = "ti,omap2-scrm" }, - { .compatible = "ti,omap3-prm" }, - { .compatible = "ti,omap3-cm" }, - { .compatible = "ti,omap3-scrm" }, - { .compatible = "ti,omap4-cm1" }, - { .compatible = "ti,omap4-prm" }, - { .compatible = "ti,omap4-cm2" }, - { .compatible = "ti,omap4-scrm" }, - { .compatible = "ti,omap5-prm" }, - { .compatible = "ti,omap5-cm-core-aon" }, - { .compatible = "ti,omap5-scrm" }, - { .compatible = "ti,omap5-cm-core" }, - { .compatible = "ti,dra7-prm" }, - { .compatible = "ti,dra7-cm-core-aon" }, - { .compatible = "ti,dra7-cm-core" }, + { .compatible = "ti,am3-prcm", .data = &prm_data }, + { .compatible = "ti,am3-scrm", .data = &scrm_data }, + { .compatible = "ti,am4-prcm", .data = &prm_data }, + { .compatible = "ti,am4-scrm", .data = &scrm_data }, + { .compatible = "ti,dm814-prcm", .data = &prm_data }, + { .compatible = "ti,dm814-scrm", .data = &scrm_data }, + { .compatible = "ti,dm816-prcm", .data = &prm_data }, + { .compatible = "ti,dm816-scrm", .data = &scrm_data }, + { .compatible = "ti,omap2-prcm", .data = &prm_data }, + { .compatible = "ti,omap2-scrm", .data = &scrm_data }, + { .compatible = "ti,omap3-prm", .data = &prm_data }, + { .compatible = "ti,omap3-cm", .data = &cm_data }, + { .compatible = "ti,omap3-scrm", .data = &scrm_data }, + { .compatible = "ti,omap4-cm1", .data = &cm_data }, + { .compatible = "ti,omap4-prm", .data = &prm_data }, + { .compatible = "ti,omap4-cm2", .data = &cm2_data }, + { .compatible = "ti,omap4-scrm", .data = &scrm_data }, + { .compatible = "ti,omap5-prm", .data = &prm_data }, + { .compatible = "ti,omap5-cm-core-aon", .data = &cm_data }, + { .compatible = "ti,omap5-scrm", .data = &scrm_data }, + { .compatible = "ti,omap5-cm-core", .data = &cm2_data }, + { .compatible = "ti,dra7-prm", .data = &prm_data }, + { .compatible = "ti,dra7-cm-core-aon", .data = &cm_data }, + { .compatible = "ti,dra7-cm-core", .data = &cm2_data }, { } }; @@ -690,15 +706,20 @@ int __init omap_prcm_init(void) { struct device_node *np; void __iomem *mem; - int memmap_index = 0; + const struct of_device_id *match; + const struct omap_prcm_init_data *data; ti_clk_ll_ops = &omap_clk_ll_ops; - for_each_matching_node(np, omap_prcm_dt_match_table) { + for_each_matching_node_and_match(np, omap_prcm_dt_match_table, &match) { + data = match->data; + mem = of_iomap(np, 0); - clk_memmaps[memmap_index] = mem; - ti_dt_clk_init_provider(np, memmap_index); - memmap_index++; + if (!mem) + return -ENOMEM; + + clk_memmaps[data->index] = mem; + ti_dt_clk_init_provider(np, data->index); } return 0; diff --git a/include/linux/clk/ti.h b/include/linux/clk/ti.h index 67844003493d..19895a3f48b7 100644 --- a/include/linux/clk/ti.h +++ b/include/linux/clk/ti.h @@ -221,6 +221,7 @@ struct ti_dt_clk { /* Static memmap indices */ enum { TI_CLKM_CM = 0, + TI_CLKM_CM2, TI_CLKM_PRM, TI_CLKM_SCRM, }; From 9f029b1579b2dfe291006e5bfe8e7d0c4ef20828 Mon Sep 17 00:00:00 2001 From: Tero Kristo Date: Wed, 22 Oct 2014 15:15:36 +0300 Subject: [PATCH 11/35] ARM: OMAP2+: clock: move clock provider infrastructure to clock driver Splits the clock provider init out of the PRM driver and moves it to clock driver. This is needed so that once the PRCM drivers are separated, they can logically just access the clock driver not needing to go through common PRM code. This would be wrong in the case of control module for example. Signed-off-by: Tero Kristo --- arch/arm/mach-omap2/clock.c | 77 ++++++++++++++++++++++++++------ arch/arm/mach-omap2/clock.h | 6 ++- arch/arm/mach-omap2/prm_common.c | 36 ++++----------- 3 files changed, 75 insertions(+), 44 deletions(-) diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c index 6124db5c37ae..94080fba02f6 100644 --- a/arch/arm/mach-omap2/clock.c +++ b/arch/arm/mach-omap2/clock.c @@ -23,6 +23,7 @@ #include #include #include +#include #include #include @@ -72,30 +73,78 @@ struct ti_clk_features ti_clk_features; static bool clkdm_control = true; static LIST_HEAD(clk_hw_omap_clocks); -void __iomem *clk_memmaps[CLK_MAX_MEMMAPS]; +static void __iomem *clk_memmaps[CLK_MAX_MEMMAPS]; + +static void clk_memmap_writel(u32 val, void __iomem *reg) +{ + struct clk_omap_reg *r = (struct clk_omap_reg *)® + + writel_relaxed(val, clk_memmaps[r->index] + r->offset); +} + +static u32 clk_memmap_readl(void __iomem *reg) +{ + struct clk_omap_reg *r = (struct clk_omap_reg *)® + + return readl_relaxed(clk_memmaps[r->index] + r->offset); +} void omap2_clk_writel(u32 val, struct clk_hw_omap *clk, void __iomem *reg) { - if (clk->flags & MEMMAP_ADDRESSING) { - struct clk_omap_reg *r = (struct clk_omap_reg *)® - writel_relaxed(val, clk_memmaps[r->index] + r->offset); - } else { + if (WARN_ON_ONCE(!(clk->flags & MEMMAP_ADDRESSING))) writel_relaxed(val, reg); - } + else + clk_memmap_writel(val, reg); } u32 omap2_clk_readl(struct clk_hw_omap *clk, void __iomem *reg) { - u32 val; + if (WARN_ON_ONCE(!(clk->flags & MEMMAP_ADDRESSING))) + return readl_relaxed(reg); + else + return clk_memmap_readl(reg); +} - if (clk->flags & MEMMAP_ADDRESSING) { - struct clk_omap_reg *r = (struct clk_omap_reg *)® - val = readl_relaxed(clk_memmaps[r->index] + r->offset); - } else { - val = readl_relaxed(reg); - } +static struct ti_clk_ll_ops omap_clk_ll_ops = { + .clk_readl = clk_memmap_readl, + .clk_writel = clk_memmap_writel, +}; - return val; +/** + * omap2_clk_provider_init - initialize a clock provider + * @match_table: DT device table to match for devices to init + * @np: device node pointer for the this clock provider + * @index: index for the clock provider + * @mem: iomem pointer for the clock provider memory area + * + * Initializes a clock provider module (CM/PRM etc.), registering + * the memory mapping at specified index and initializing the + * low level driver infrastructure. Returns 0 in success. + */ +int __init omap2_clk_provider_init(struct device_node *np, int index, + void __iomem *mem) +{ + ti_clk_ll_ops = &omap_clk_ll_ops; + + clk_memmaps[index] = mem; + + ti_dt_clk_init_provider(np, index); + + return 0; +} + +/** + * omap2_clk_legacy_provider_init - initialize a legacy clock provider + * @index: index for the clock provider + * @mem: iomem pointer for the clock provider memory area + * + * Initializes a legacy clock provider memory mapping. + */ +void __init omap2_clk_legacy_provider_init(int index, void __iomem *mem) +{ + ti_clk_ll_ops = &omap_clk_ll_ops; + + clk_memmaps[index] = mem; } /* diff --git a/arch/arm/mach-omap2/clock.h b/arch/arm/mach-omap2/clock.h index a56742f96000..b6433fc284ce 100644 --- a/arch/arm/mach-omap2/clock.h +++ b/arch/arm/mach-omap2/clock.h @@ -271,10 +271,12 @@ extern const struct clksel_rate div_1_3_rates[]; extern const struct clksel_rate div_1_4_rates[]; extern const struct clksel_rate div31_1to31_rates[]; -extern void __iomem *clk_memmaps[]; - extern int omap2_clkops_enable_clkdm(struct clk_hw *hw); extern void omap2_clkops_disable_clkdm(struct clk_hw *hw); +int __init omap2_clk_provider_init(struct device_node *np, int index, + void __iomem *mem); +void __init omap2_clk_legacy_provider_init(int index, void __iomem *mem); + void __init ti_clk_init_features(void); #endif diff --git a/arch/arm/mach-omap2/prm_common.c b/arch/arm/mach-omap2/prm_common.c index 8ec52012f85d..1bfd00e10f76 100644 --- a/arch/arm/mach-omap2/prm_common.c +++ b/arch/arm/mach-omap2/prm_common.c @@ -677,25 +677,6 @@ static const struct of_device_id omap_prcm_dt_match_table[] = { { } }; -static struct clk_hw_omap memmap_dummy_ck = { - .flags = MEMMAP_ADDRESSING, -}; - -static u32 prm_clk_readl(void __iomem *reg) -{ - return omap2_clk_readl(&memmap_dummy_ck, reg); -} - -static void prm_clk_writel(u32 val, void __iomem *reg) -{ - omap2_clk_writel(val, &memmap_dummy_ck, reg); -} - -static struct ti_clk_ll_ops omap_clk_ll_ops = { - .clk_readl = prm_clk_readl, - .clk_writel = prm_clk_writel, -}; - /** * omap_prcm_init - low level init for the PRCM drivers * @@ -708,8 +689,7 @@ int __init omap_prcm_init(void) void __iomem *mem; const struct of_device_id *match; const struct omap_prcm_init_data *data; - - ti_clk_ll_ops = &omap_clk_ll_ops; + int ret; for_each_matching_node_and_match(np, omap_prcm_dt_match_table, &match) { data = match->data; @@ -718,8 +698,9 @@ int __init omap_prcm_init(void) if (!mem) return -ENOMEM; - clk_memmaps[data->index] = mem; - ti_dt_clk_init_provider(np, data->index); + ret = omap2_clk_provider_init(np, data->index, mem); + if (ret) + return ret; } return 0; @@ -727,11 +708,10 @@ int __init omap_prcm_init(void) void __init omap3_prcm_legacy_iomaps_init(void) { - ti_clk_ll_ops = &omap_clk_ll_ops; - - clk_memmaps[TI_CLKM_CM] = cm_base + OMAP3430_IVA2_MOD; - clk_memmaps[TI_CLKM_PRM] = prm_base + OMAP3430_IVA2_MOD; - clk_memmaps[TI_CLKM_SCRM] = omap_ctrl_base_get(); + omap2_clk_legacy_provider_init(TI_CLKM_CM, cm_base + OMAP3430_IVA2_MOD); + omap2_clk_legacy_provider_init(TI_CLKM_PRM, + prm_base + OMAP3430_IVA2_MOD); + omap2_clk_legacy_provider_init(TI_CLKM_SCRM, omap_ctrl_base_get()); } static int __init prm_late_init(void) From fe87414f71d0035756cf91a80ac256557d16b488 Mon Sep 17 00:00:00 2001 From: Tero Kristo Date: Wed, 12 Mar 2014 18:33:45 +0200 Subject: [PATCH 12/35] ARM: OMAP2+: PRCM: split PRCM module init to their own driver files Splits the clock related provider module inits under their own driver files. Previously this was done for all modules under the common PRM driver. Signed-off-by: Tero Kristo --- arch/arm/mach-omap2/cm.h | 1 + arch/arm/mach-omap2/cm_common.c | 51 ++++++++++++++++++++++++++++++++ arch/arm/mach-omap2/control.c | 47 +++++++++++++++++++++++++++++ arch/arm/mach-omap2/control.h | 1 + arch/arm/mach-omap2/io.c | 4 +++ arch/arm/mach-omap2/prm_common.c | 23 ++------------ include/linux/clk/ti.h | 5 ++-- 7 files changed, 108 insertions(+), 24 deletions(-) diff --git a/arch/arm/mach-omap2/cm.h b/arch/arm/mach-omap2/cm.h index 6222e87a79b6..748ac338812b 100644 --- a/arch/arm/mach-omap2/cm.h +++ b/arch/arm/mach-omap2/cm.h @@ -70,6 +70,7 @@ int omap_cm_module_enable(u8 mode, u8 part, u16 inst, u16 clkctrl_offs); int omap_cm_module_disable(u8 part, u16 inst, u16 clkctrl_offs); extern int cm_register(struct cm_ll_data *cld); extern int cm_unregister(struct cm_ll_data *cld); +int omap_cm_init(void); # endif diff --git a/arch/arm/mach-omap2/cm_common.c b/arch/arm/mach-omap2/cm_common.c index 8fe02fcedc48..f3d578be3272 100644 --- a/arch/arm/mach-omap2/cm_common.c +++ b/arch/arm/mach-omap2/cm_common.c @@ -15,10 +15,13 @@ #include #include #include +#include +#include #include "cm2xxx.h" #include "cm3xxx.h" #include "cm44xx.h" +#include "clock.h" /* * cm_ll_data: function pointers to SoC-specific implementations of @@ -212,3 +215,51 @@ int cm_unregister(struct cm_ll_data *cld) return 0; } + +static struct omap_prcm_init_data cm_data = { + .index = TI_CLKM_CM, +}; + +static struct omap_prcm_init_data cm2_data = { + .index = TI_CLKM_CM2, +}; + +static const struct of_device_id omap_cm_dt_match_table[] = { + { .compatible = "ti,omap3-cm", .data = &cm_data }, + { .compatible = "ti,omap4-cm1", .data = &cm_data }, + { .compatible = "ti,omap4-cm2", .data = &cm2_data }, + { .compatible = "ti,omap5-cm-core-aon", .data = &cm_data }, + { .compatible = "ti,omap5-cm-core", .data = &cm2_data }, + { .compatible = "ti,dra7-cm-core-aon", .data = &cm_data }, + { .compatible = "ti,dra7-cm-core", .data = &cm2_data }, + { } +}; + +/** + * omap_cm_init - low level init for the CM drivers + * + * Initializes the low level clock infrastructure for CM drivers. + * Returns 0 in success, negative error value in failure. + */ +int __init omap_cm_init(void) +{ + struct device_node *np; + void __iomem *mem; + const struct of_device_id *match; + const struct omap_prcm_init_data *data; + int ret; + + for_each_matching_node_and_match(np, omap_cm_dt_match_table, &match) { + data = match->data; + + mem = of_iomap(np, 0); + if (!mem) + return -ENOMEM; + + ret = omap2_clk_provider_init(np, data->index, mem); + if (ret) + return ret; + } + + return 0; +} diff --git a/arch/arm/mach-omap2/control.c b/arch/arm/mach-omap2/control.c index da041b4ab29c..e8818242f968 100644 --- a/arch/arm/mach-omap2/control.c +++ b/arch/arm/mach-omap2/control.c @@ -14,6 +14,7 @@ #include #include +#include #include "soc.h" #include "iomap.h" @@ -25,6 +26,7 @@ #include "sdrc.h" #include "pm.h" #include "control.h" +#include "clock.h" /* Used by omap3_ctrl_save_padconf() */ #define START_PADCONF_SAVE 0x2 @@ -611,3 +613,48 @@ void __init omap3_ctrl_init(void) omap3_ctrl_setup_d2d_padconf(); } #endif /* CONFIG_ARCH_OMAP3 && CONFIG_PM */ + +struct control_init_data { + int index; +}; + +static struct control_init_data ctrl_data = { + .index = TI_CLKM_CTRL, +}; + +static const struct of_device_id omap_scrm_dt_match_table[] = { + { .compatible = "ti,am3-scrm", .data = &ctrl_data }, + { .compatible = "ti,am4-scrm", .data = &ctrl_data }, + { .compatible = "ti,omap2-scrm", .data = &ctrl_data }, + { .compatible = "ti,omap3-scrm", .data = &ctrl_data }, + { } +}; + +/** + * omap_control_init - low level init for the control driver + * + * Initializes the low level clock infrastructure for control driver. + * Returns 0 in success, negative error value in failure. + */ +int __init omap_control_init(void) +{ + struct device_node *np; + void __iomem *mem; + const struct of_device_id *match; + const struct omap_prcm_init_data *data; + int ret; + + for_each_matching_node_and_match(np, omap_scrm_dt_match_table, &match) { + data = match->data; + + mem = of_iomap(np, 0); + if (!mem) + return -ENOMEM; + + ret = omap2_clk_provider_init(np, data->index, mem); + if (ret) + return ret; + } + + return 0; +} diff --git a/arch/arm/mach-omap2/control.h b/arch/arm/mach-omap2/control.h index b8a487181210..baf5783cb05d 100644 --- a/arch/arm/mach-omap2/control.h +++ b/arch/arm/mach-omap2/control.h @@ -464,6 +464,7 @@ extern void omap_ctrl_write_dsp_boot_mode(u8 bootmode); extern void omap3630_ctrl_disable_rta(void); extern int omap3_ctrl_save_padconf(void); void omap3_ctrl_init(void); +int omap_control_init(void); extern void omap2_set_globals_control(void __iomem *ctrl, void __iomem *ctrl_pad); #else diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c index 460da22a005c..46640c0ddc0f 100644 --- a/arch/arm/mach-omap2/io.c +++ b/arch/arm/mach-omap2/io.c @@ -756,6 +756,10 @@ int __init omap_clk_init(void) ti_clk_init_features(); if (of_have_populated_dt()) { + ret = omap_control_init(); + if (ret) + return ret; + ret = omap_prcm_init(); if (ret) return ret; diff --git a/arch/arm/mach-omap2/prm_common.c b/arch/arm/mach-omap2/prm_common.c index 1bfd00e10f76..6cbebbe252c4 100644 --- a/arch/arm/mach-omap2/prm_common.c +++ b/arch/arm/mach-omap2/prm_common.c @@ -637,43 +637,22 @@ static struct omap_prcm_init_data prm_data = { .index = TI_CLKM_PRM, }; -static struct omap_prcm_init_data cm_data = { - .index = TI_CLKM_CM, -}; - -static struct omap_prcm_init_data cm2_data = { - .index = TI_CLKM_CM2, -}; - static struct omap_prcm_init_data scrm_data = { .index = TI_CLKM_SCRM, }; static const struct of_device_id omap_prcm_dt_match_table[] = { { .compatible = "ti,am3-prcm", .data = &prm_data }, - { .compatible = "ti,am3-scrm", .data = &scrm_data }, { .compatible = "ti,am4-prcm", .data = &prm_data }, - { .compatible = "ti,am4-scrm", .data = &scrm_data }, { .compatible = "ti,dm814-prcm", .data = &prm_data }, - { .compatible = "ti,dm814-scrm", .data = &scrm_data }, { .compatible = "ti,dm816-prcm", .data = &prm_data }, - { .compatible = "ti,dm816-scrm", .data = &scrm_data }, { .compatible = "ti,omap2-prcm", .data = &prm_data }, - { .compatible = "ti,omap2-scrm", .data = &scrm_data }, { .compatible = "ti,omap3-prm", .data = &prm_data }, - { .compatible = "ti,omap3-cm", .data = &cm_data }, - { .compatible = "ti,omap3-scrm", .data = &scrm_data }, - { .compatible = "ti,omap4-cm1", .data = &cm_data }, { .compatible = "ti,omap4-prm", .data = &prm_data }, - { .compatible = "ti,omap4-cm2", .data = &cm2_data }, { .compatible = "ti,omap4-scrm", .data = &scrm_data }, { .compatible = "ti,omap5-prm", .data = &prm_data }, - { .compatible = "ti,omap5-cm-core-aon", .data = &cm_data }, { .compatible = "ti,omap5-scrm", .data = &scrm_data }, - { .compatible = "ti,omap5-cm-core", .data = &cm2_data }, { .compatible = "ti,dra7-prm", .data = &prm_data }, - { .compatible = "ti,dra7-cm-core-aon", .data = &cm_data }, - { .compatible = "ti,dra7-cm-core", .data = &cm2_data }, { } }; @@ -703,6 +682,8 @@ int __init omap_prcm_init(void) return ret; } + omap_cm_init(); + return 0; } diff --git a/include/linux/clk/ti.h b/include/linux/clk/ti.h index 19895a3f48b7..79b76e13d904 100644 --- a/include/linux/clk/ti.h +++ b/include/linux/clk/ti.h @@ -215,15 +215,14 @@ struct ti_dt_clk { .node_name = name, \ } -/* Maximum number of clock memmaps */ -#define CLK_MAX_MEMMAPS 4 - /* Static memmap indices */ enum { TI_CLKM_CM = 0, TI_CLKM_CM2, TI_CLKM_PRM, TI_CLKM_SCRM, + TI_CLKM_CTRL, + CLK_MAX_MEMMAPS }; typedef void (*ti_of_clk_init_cb_t)(struct clk_hw *, struct device_node *); From 5970ca2db960b2c14e077d27950e402e063298e6 Mon Sep 17 00:00:00 2001 From: Tero Kristo Date: Tue, 11 Nov 2014 16:51:52 +0200 Subject: [PATCH 13/35] ARM: OMAP2+: CM: determine CM base address from device tree There is no need to provide the CM base address through a low-level API from the low-level IO init, as this information is available through DT. Re-routed the parsing function to be called from the CM drivers also to simplify the implementation under io.c. Signed-off-by: Tero Kristo --- arch/arm/mach-omap2/cm.h | 1 + arch/arm/mach-omap2/cm2xxx.c | 1 + arch/arm/mach-omap2/cm33xx.c | 1 + arch/arm/mach-omap2/cm3xxx.c | 2 + arch/arm/mach-omap2/cm_common.c | 73 ++++++++++++++++++++++++++++--- arch/arm/mach-omap2/cminst44xx.c | 1 + arch/arm/mach-omap2/io.c | 14 +----- arch/arm/mach-omap2/prcm-common.h | 6 +++ arch/arm/mach-omap2/prm_common.c | 1 - 9 files changed, 81 insertions(+), 19 deletions(-) diff --git a/arch/arm/mach-omap2/cm.h b/arch/arm/mach-omap2/cm.h index 748ac338812b..1fe3e6b833d2 100644 --- a/arch/arm/mach-omap2/cm.h +++ b/arch/arm/mach-omap2/cm.h @@ -71,6 +71,7 @@ int omap_cm_module_disable(u8 part, u16 inst, u16 clkctrl_offs); extern int cm_register(struct cm_ll_data *cld); extern int cm_unregister(struct cm_ll_data *cld); int omap_cm_init(void); +int omap2_cm_base_init(void); # endif diff --git a/arch/arm/mach-omap2/cm2xxx.c b/arch/arm/mach-omap2/cm2xxx.c index ef62ac9dcd05..f18c844353bc 100644 --- a/arch/arm/mach-omap2/cm2xxx.c +++ b/arch/arm/mach-omap2/cm2xxx.c @@ -395,6 +395,7 @@ static struct cm_ll_data omap2xxx_cm_ll_data = { int __init omap2xxx_cm_init(void) { + omap2_cm_base_init(); return cm_register(&omap2xxx_cm_ll_data); } diff --git a/arch/arm/mach-omap2/cm33xx.c b/arch/arm/mach-omap2/cm33xx.c index cc5aac784278..221bca3fbfa6 100644 --- a/arch/arm/mach-omap2/cm33xx.c +++ b/arch/arm/mach-omap2/cm33xx.c @@ -354,6 +354,7 @@ static struct cm_ll_data am33xx_cm_ll_data = { int __init am33xx_cm_init(void) { + omap2_cm_base_init(); return cm_register(&am33xx_cm_ll_data); } diff --git a/arch/arm/mach-omap2/cm3xxx.c b/arch/arm/mach-omap2/cm3xxx.c index ebead8f035f9..88e6cb619861 100644 --- a/arch/arm/mach-omap2/cm3xxx.c +++ b/arch/arm/mach-omap2/cm3xxx.c @@ -673,6 +673,8 @@ static struct cm_ll_data omap3xxx_cm_ll_data = { int __init omap3xxx_cm_init(void) { + omap2_clk_legacy_provider_init(TI_CLKM_CM, cm_base + OMAP3430_IVA2_MOD); + omap2_cm_base_init(); return cm_register(&omap3xxx_cm_ll_data); } diff --git a/arch/arm/mach-omap2/cm_common.c b/arch/arm/mach-omap2/cm_common.c index f3d578be3272..32af8fc749f0 100644 --- a/arch/arm/mach-omap2/cm_common.c +++ b/arch/arm/mach-omap2/cm_common.c @@ -36,6 +36,8 @@ void __iomem *cm_base; /* cm2_base: base virtual address of the CM2 IP block (OMAP44xx only) */ void __iomem *cm2_base; +#define CM_NO_CLOCKS 0x1 + /** * omap2_set_globals_cm - set the CM/CM2 base addresses (for early use) * @cm: CM base virtual address @@ -224,17 +226,78 @@ static struct omap_prcm_init_data cm2_data = { .index = TI_CLKM_CM2, }; +static struct omap_prcm_init_data omap2_prcm_data = { + .index = TI_CLKM_CM, + .flags = CM_NO_CLOCKS, +}; + +static struct omap_prcm_init_data omap3_cm_data = { + .index = TI_CLKM_CM, + + /* + * IVA2 offset is a negative value, must offset the cm_base address + * by this to get it to positive side on the iomap + */ + .offset = -OMAP3430_IVA2_MOD, +}; + +static struct omap_prcm_init_data am3_prcm_data = { + .index = TI_CLKM_CM, + .flags = CM_NO_CLOCKS, +}; + +static struct omap_prcm_init_data am4_prcm_data = { + .index = TI_CLKM_CM, + .flags = CM_NO_CLOCKS, +}; + static const struct of_device_id omap_cm_dt_match_table[] = { - { .compatible = "ti,omap3-cm", .data = &cm_data }, + { .compatible = "ti,omap2-prcm", .data = &omap2_prcm_data }, + { .compatible = "ti,omap3-cm", .data = &omap3_cm_data }, { .compatible = "ti,omap4-cm1", .data = &cm_data }, { .compatible = "ti,omap4-cm2", .data = &cm2_data }, { .compatible = "ti,omap5-cm-core-aon", .data = &cm_data }, { .compatible = "ti,omap5-cm-core", .data = &cm2_data }, { .compatible = "ti,dra7-cm-core-aon", .data = &cm_data }, { .compatible = "ti,dra7-cm-core", .data = &cm2_data }, + { .compatible = "ti,am3-prcm", .data = &am3_prcm_data }, + { .compatible = "ti,am4-prcm", .data = &am4_prcm_data }, { } }; +/** + * omap2_cm_base_init - initialize iomappings for the CM drivers + * + * Detects and initializes the iomappings for the CM driver, based + * on the DT data. Returns 0 in success, negative error value + * otherwise. + */ +int __init omap2_cm_base_init(void) +{ + struct device_node *np; + const struct of_device_id *match; + struct omap_prcm_init_data *data; + void __iomem *mem; + + for_each_matching_node_and_match(np, omap_cm_dt_match_table, &match) { + data = (struct omap_prcm_init_data *)match->data; + + mem = of_iomap(np, 0); + if (!mem) + return -ENOMEM; + + if (data->index == TI_CLKM_CM) + cm_base = mem + data->offset; + + if (data->index == TI_CLKM_CM2) + cm2_base = mem + data->offset; + + data->mem = mem; + } + + return 0; +} + /** * omap_cm_init - low level init for the CM drivers * @@ -244,7 +307,6 @@ static const struct of_device_id omap_cm_dt_match_table[] = { int __init omap_cm_init(void) { struct device_node *np; - void __iomem *mem; const struct of_device_id *match; const struct omap_prcm_init_data *data; int ret; @@ -252,11 +314,10 @@ int __init omap_cm_init(void) for_each_matching_node_and_match(np, omap_cm_dt_match_table, &match) { data = match->data; - mem = of_iomap(np, 0); - if (!mem) - return -ENOMEM; + if (data->flags & CM_NO_CLOCKS) + continue; - ret = omap2_clk_provider_init(np, data->index, mem); + ret = omap2_clk_provider_init(np, data->index, data->mem); if (ret) return ret; } diff --git a/arch/arm/mach-omap2/cminst44xx.c b/arch/arm/mach-omap2/cminst44xx.c index 9319034bebff..4aed22dbe558 100644 --- a/arch/arm/mach-omap2/cminst44xx.c +++ b/arch/arm/mach-omap2/cminst44xx.c @@ -516,6 +516,7 @@ static struct cm_ll_data omap4xxx_cm_ll_data = { int __init omap4_cm_init(void) { + omap2_cm_base_init(); omap_cm_base_init(); return cm_register(&omap4xxx_cm_ll_data); diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c index 46640c0ddc0f..b43e09da8038 100644 --- a/arch/arm/mach-omap2/io.c +++ b/arch/arm/mach-omap2/io.c @@ -387,7 +387,6 @@ void __init omap2420_init_early(void) omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP242X_CTRL_BASE), NULL); omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP2420_PRM_BASE)); - omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP2420_CM_BASE), NULL); omap2xxx_check_revision(); omap2xxx_prm_init(); omap2xxx_cm_init(); @@ -417,7 +416,6 @@ void __init omap2430_init_early(void) omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP243X_CTRL_BASE), NULL); omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP2430_PRM_BASE)); - omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP2430_CM_BASE), NULL); omap2xxx_check_revision(); omap2xxx_prm_init(); omap2xxx_cm_init(); @@ -451,6 +449,8 @@ void __init omap3_init_early(void) omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP343X_CTRL_BASE), NULL); omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP3430_PRM_BASE)); + + /* XXX: remove this once OMAP3 is DT only */ omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP3430_CM_BASE), NULL); omap3xxx_check_revision(); omap3xxx_check_features(); @@ -552,7 +552,6 @@ void __init ti814x_init_early(void) omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(TI81XX_CTRL_BASE), NULL); omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE)); - omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE), NULL); omap3xxx_check_revision(); ti81xx_check_features(); am33xx_prm_init(); @@ -573,7 +572,6 @@ void __init ti816x_init_early(void) omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(TI81XX_CTRL_BASE), NULL); omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE)); - omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE), NULL); omap3xxx_check_revision(); ti81xx_check_features(); am33xx_prm_init(); @@ -596,7 +594,6 @@ void __init am33xx_init_early(void) omap2_set_globals_control(AM33XX_L4_WK_IO_ADDRESS(AM33XX_CTRL_BASE), NULL); omap2_set_globals_prm(AM33XX_L4_WK_IO_ADDRESS(AM33XX_PRCM_BASE)); - omap2_set_globals_cm(AM33XX_L4_WK_IO_ADDRESS(AM33XX_PRCM_BASE), NULL); omap3xxx_check_revision(); am33xx_check_features(); am33xx_prm_init(); @@ -622,7 +619,6 @@ void __init am43xx_init_early(void) omap2_set_globals_control(AM33XX_L4_WK_IO_ADDRESS(AM33XX_CTRL_BASE), NULL); omap2_set_globals_prm(AM33XX_L4_WK_IO_ADDRESS(AM43XX_PRCM_BASE)); - omap2_set_globals_cm(AM33XX_L4_WK_IO_ADDRESS(AM43XX_PRCM_BASE), NULL); omap3xxx_check_revision(); am33xx_check_features(); omap44xx_prm_init(); @@ -649,8 +645,6 @@ void __init omap4430_init_early(void) omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE), OMAP2_L4_IO_ADDRESS(OMAP443X_CTRL_BASE)); omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP4430_PRM_BASE)); - omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP4430_CM_BASE), - OMAP2_L4_IO_ADDRESS(OMAP4430_CM2_BASE)); omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP4430_PRCM_MPU_BASE)); omap4xxx_check_revision(); omap4xxx_check_features(); @@ -682,8 +676,6 @@ void __init omap5_init_early(void) omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP54XX_SCM_BASE), OMAP2_L4_IO_ADDRESS(OMAP54XX_CTRL_BASE)); omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRM_BASE)); - omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP54XX_CM_CORE_AON_BASE), - OMAP2_L4_IO_ADDRESS(OMAP54XX_CM_CORE_BASE)); omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRCM_MPU_BASE)); omap4_pm_init_early(); omap44xx_prm_init(); @@ -712,8 +704,6 @@ void __init dra7xx_init_early(void) omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP54XX_SCM_BASE), OMAP2_L4_IO_ADDRESS(DRA7XX_CTRL_BASE)); omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRM_BASE)); - omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(DRA7XX_CM_CORE_AON_BASE), - OMAP2_L4_IO_ADDRESS(OMAP54XX_CM_CORE_BASE)); omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRCM_MPU_BASE)); omap4_pm_init_early(); omap44xx_prm_init(); diff --git a/arch/arm/mach-omap2/prcm-common.h b/arch/arm/mach-omap2/prcm-common.h index ee38356b3601..9e4dd0b7dd6a 100644 --- a/arch/arm/mach-omap2/prcm-common.h +++ b/arch/arm/mach-omap2/prcm-common.h @@ -521,9 +521,15 @@ struct omap_prcm_irq_setup { /** * struct omap_prcm_init_data - PRCM driver init data * @index: clock memory mapping index to be used + * @mem: IO mem pointer for this module + * @offset: module base address offset from the IO base + * @flags: PRCM module init flags */ struct omap_prcm_init_data { int index; + void __iomem *mem; + s16 offset; + u16 flags; }; extern void omap_prcm_irq_cleanup(void); diff --git a/arch/arm/mach-omap2/prm_common.c b/arch/arm/mach-omap2/prm_common.c index 6cbebbe252c4..9f9c816ef59f 100644 --- a/arch/arm/mach-omap2/prm_common.c +++ b/arch/arm/mach-omap2/prm_common.c @@ -689,7 +689,6 @@ int __init omap_prcm_init(void) void __init omap3_prcm_legacy_iomaps_init(void) { - omap2_clk_legacy_provider_init(TI_CLKM_CM, cm_base + OMAP3430_IVA2_MOD); omap2_clk_legacy_provider_init(TI_CLKM_PRM, prm_base + OMAP3430_IVA2_MOD); omap2_clk_legacy_provider_init(TI_CLKM_SCRM, omap_ctrl_base_get()); From ae521d4d9c54995df1e0fb53ef6820374a3cae4e Mon Sep 17 00:00:00 2001 From: Tero Kristo Date: Tue, 11 Nov 2014 17:17:18 +0200 Subject: [PATCH 14/35] ARM: OMAP2+: PRM: determine PRM base address from device tree There is no need to provide the PRM base address through a low-level API from the low-level IO init, as this information is available through DT. Re-routed the parsing function to be called from the PRM drivers also to simplify the implementation under io.c. Signed-off-by: Tero Kristo --- arch/arm/mach-omap2/io.c | 12 +------- arch/arm/mach-omap2/prm.h | 1 + arch/arm/mach-omap2/prm2xxx.c | 1 + arch/arm/mach-omap2/prm33xx.c | 1 + arch/arm/mach-omap2/prm3xxx.c | 5 ++++ arch/arm/mach-omap2/prm44xx.c | 1 + arch/arm/mach-omap2/prm_common.c | 51 ++++++++++++++++++++++++++------ 7 files changed, 52 insertions(+), 20 deletions(-) diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c index b43e09da8038..712dd42bb5c2 100644 --- a/arch/arm/mach-omap2/io.c +++ b/arch/arm/mach-omap2/io.c @@ -386,7 +386,6 @@ void __init omap2420_init_early(void) OMAP2_L3_IO_ADDRESS(OMAP2420_SMS_BASE)); omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP242X_CTRL_BASE), NULL); - omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP2420_PRM_BASE)); omap2xxx_check_revision(); omap2xxx_prm_init(); omap2xxx_cm_init(); @@ -415,7 +414,6 @@ void __init omap2430_init_early(void) OMAP2_L3_IO_ADDRESS(OMAP243X_SMS_BASE)); omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP243X_CTRL_BASE), NULL); - omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP2430_PRM_BASE)); omap2xxx_check_revision(); omap2xxx_prm_init(); omap2xxx_cm_init(); @@ -448,9 +446,8 @@ void __init omap3_init_early(void) OMAP2_L3_IO_ADDRESS(OMAP343X_SMS_BASE)); omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP343X_CTRL_BASE), NULL); + /* XXX: remove these two once OMAP3 is DT only */ omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP3430_PRM_BASE)); - - /* XXX: remove this once OMAP3 is DT only */ omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP3430_CM_BASE), NULL); omap3xxx_check_revision(); omap3xxx_check_features(); @@ -551,7 +548,6 @@ void __init ti814x_init_early(void) OMAP2_L4_IO_ADDRESS(TI81XX_TAP_BASE)); omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(TI81XX_CTRL_BASE), NULL); - omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE)); omap3xxx_check_revision(); ti81xx_check_features(); am33xx_prm_init(); @@ -571,7 +567,6 @@ void __init ti816x_init_early(void) OMAP2_L4_IO_ADDRESS(TI81XX_TAP_BASE)); omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(TI81XX_CTRL_BASE), NULL); - omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE)); omap3xxx_check_revision(); ti81xx_check_features(); am33xx_prm_init(); @@ -593,7 +588,6 @@ void __init am33xx_init_early(void) AM33XX_L4_WK_IO_ADDRESS(AM33XX_TAP_BASE)); omap2_set_globals_control(AM33XX_L4_WK_IO_ADDRESS(AM33XX_CTRL_BASE), NULL); - omap2_set_globals_prm(AM33XX_L4_WK_IO_ADDRESS(AM33XX_PRCM_BASE)); omap3xxx_check_revision(); am33xx_check_features(); am33xx_prm_init(); @@ -618,7 +612,6 @@ void __init am43xx_init_early(void) AM33XX_L4_WK_IO_ADDRESS(AM33XX_TAP_BASE)); omap2_set_globals_control(AM33XX_L4_WK_IO_ADDRESS(AM33XX_CTRL_BASE), NULL); - omap2_set_globals_prm(AM33XX_L4_WK_IO_ADDRESS(AM43XX_PRCM_BASE)); omap3xxx_check_revision(); am33xx_check_features(); omap44xx_prm_init(); @@ -644,7 +637,6 @@ void __init omap4430_init_early(void) OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE)); omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE), OMAP2_L4_IO_ADDRESS(OMAP443X_CTRL_BASE)); - omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP4430_PRM_BASE)); omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP4430_PRCM_MPU_BASE)); omap4xxx_check_revision(); omap4xxx_check_features(); @@ -675,7 +667,6 @@ void __init omap5_init_early(void) OMAP2_L4_IO_ADDRESS(OMAP54XX_SCM_BASE)); omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP54XX_SCM_BASE), OMAP2_L4_IO_ADDRESS(OMAP54XX_CTRL_BASE)); - omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRM_BASE)); omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRCM_MPU_BASE)); omap4_pm_init_early(); omap44xx_prm_init(); @@ -703,7 +694,6 @@ void __init dra7xx_init_early(void) omap2_set_globals_tap(-1, OMAP2_L4_IO_ADDRESS(DRA7XX_TAP_BASE)); omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP54XX_SCM_BASE), OMAP2_L4_IO_ADDRESS(DRA7XX_CTRL_BASE)); - omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRM_BASE)); omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRCM_MPU_BASE)); omap4_pm_init_early(); omap44xx_prm_init(); diff --git a/arch/arm/mach-omap2/prm.h b/arch/arm/mach-omap2/prm.h index 4e390ec0ed85..6d0a808f33f7 100644 --- a/arch/arm/mach-omap2/prm.h +++ b/arch/arm/mach-omap2/prm.h @@ -20,6 +20,7 @@ extern void __iomem *prm_base; extern u16 prm_features; extern void omap2_set_globals_prm(void __iomem *prm); int omap_prcm_init(void); +int omap2_prm_base_init(void); void omap3_prcm_legacy_iomaps_init(void); # endif diff --git a/arch/arm/mach-omap2/prm2xxx.c b/arch/arm/mach-omap2/prm2xxx.c index bacb05e8cc39..29e203f38d07 100644 --- a/arch/arm/mach-omap2/prm2xxx.c +++ b/arch/arm/mach-omap2/prm2xxx.c @@ -222,6 +222,7 @@ static struct prm_ll_data omap2xxx_prm_ll_data = { int __init omap2xxx_prm_init(void) { + omap2_prm_base_init(); return prm_register(&omap2xxx_prm_ll_data); } diff --git a/arch/arm/mach-omap2/prm33xx.c b/arch/arm/mach-omap2/prm33xx.c index 02f628601b09..1e052aaf92cd 100644 --- a/arch/arm/mach-omap2/prm33xx.c +++ b/arch/arm/mach-omap2/prm33xx.c @@ -380,6 +380,7 @@ static struct prm_ll_data am33xx_prm_ll_data = { int __init am33xx_prm_init(void) { + omap2_prm_base_init(); return prm_register(&am33xx_prm_ll_data); } diff --git a/arch/arm/mach-omap2/prm3xxx.c b/arch/arm/mach-omap2/prm3xxx.c index 2b478adc337d..a347993a7bfe 100644 --- a/arch/arm/mach-omap2/prm3xxx.c +++ b/arch/arm/mach-omap2/prm3xxx.c @@ -29,6 +29,7 @@ #include "prm-regbits-34xx.h" #include "cm3xxx.h" #include "cm-regbits-34xx.h" +#include "clock.h" static void omap3xxx_prm_read_pending_irqs(unsigned long *events); static void omap3xxx_prm_ocp_barrier(void); @@ -671,6 +672,10 @@ static struct prm_ll_data omap3xxx_prm_ll_data = { int __init omap3xxx_prm_init(void) { + omap2_clk_legacy_provider_init(TI_CLKM_PRM, + prm_base + OMAP3430_IVA2_MOD); + omap2_prm_base_init(); + if (omap3_has_io_wakeup()) prm_features |= PRM_HAS_IO_WAKEUP; diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c index 6f647f698467..b479a33eacfd 100644 --- a/arch/arm/mach-omap2/prm44xx.c +++ b/arch/arm/mach-omap2/prm44xx.c @@ -705,6 +705,7 @@ static struct prm_ll_data omap44xx_prm_ll_data = { int __init omap44xx_prm_init(void) { + omap2_prm_base_init(); omap_prm_base_init(); if (cpu_is_omap44xx() || soc_is_omap54xx() || soc_is_dra7xx()) diff --git a/arch/arm/mach-omap2/prm_common.c b/arch/arm/mach-omap2/prm_common.c index 9f9c816ef59f..b23d2327bafe 100644 --- a/arch/arm/mach-omap2/prm_common.c +++ b/arch/arm/mach-omap2/prm_common.c @@ -637,6 +637,16 @@ static struct omap_prcm_init_data prm_data = { .index = TI_CLKM_PRM, }; +static struct omap_prcm_init_data omap3_prm_data = { + .index = TI_CLKM_PRM, + + /* + * IVA2 offset is a negative value, must offset the prm_base + * address by this to get it to positive + */ + .offset = -OMAP3430_IVA2_MOD, +}; + static struct omap_prcm_init_data scrm_data = { .index = TI_CLKM_SCRM, }; @@ -647,7 +657,7 @@ static const struct of_device_id omap_prcm_dt_match_table[] = { { .compatible = "ti,dm814-prcm", .data = &prm_data }, { .compatible = "ti,dm816-prcm", .data = &prm_data }, { .compatible = "ti,omap2-prcm", .data = &prm_data }, - { .compatible = "ti,omap3-prm", .data = &prm_data }, + { .compatible = "ti,omap3-prm", .data = &omap3_prm_data }, { .compatible = "ti,omap4-prm", .data = &prm_data }, { .compatible = "ti,omap4-scrm", .data = &scrm_data }, { .compatible = "ti,omap5-prm", .data = &prm_data }, @@ -656,6 +666,36 @@ static const struct of_device_id omap_prcm_dt_match_table[] = { { } }; +/** + * omap2_prm_base_init - initialize iomappings for the PRM driver + * + * Detects and initializes the iomappings for the PRM driver, based + * on the DT data. Returns 0 in success, negative error value + * otherwise. + */ +int __init omap2_prm_base_init(void) +{ + struct device_node *np; + const struct of_device_id *match; + struct omap_prcm_init_data *data; + void __iomem *mem; + + for_each_matching_node_and_match(np, omap_prcm_dt_match_table, &match) { + data = (struct omap_prcm_init_data *)match->data; + + mem = of_iomap(np, 0); + if (!mem) + return -ENOMEM; + + if (data->index == TI_CLKM_PRM) + prm_base = mem + data->offset; + + data->mem = mem; + } + + return 0; +} + /** * omap_prcm_init - low level init for the PRCM drivers * @@ -665,7 +705,6 @@ static const struct of_device_id omap_prcm_dt_match_table[] = { int __init omap_prcm_init(void) { struct device_node *np; - void __iomem *mem; const struct of_device_id *match; const struct omap_prcm_init_data *data; int ret; @@ -673,11 +712,7 @@ int __init omap_prcm_init(void) for_each_matching_node_and_match(np, omap_prcm_dt_match_table, &match) { data = match->data; - mem = of_iomap(np, 0); - if (!mem) - return -ENOMEM; - - ret = omap2_clk_provider_init(np, data->index, mem); + ret = omap2_clk_provider_init(np, data->index, data->mem); if (ret) return ret; } @@ -689,8 +724,6 @@ int __init omap_prcm_init(void) void __init omap3_prcm_legacy_iomaps_init(void) { - omap2_clk_legacy_provider_init(TI_CLKM_PRM, - prm_base + OMAP3430_IVA2_MOD); omap2_clk_legacy_provider_init(TI_CLKM_SCRM, omap_ctrl_base_get()); } From 2208bf115fecae211480ea41d25e6d56ec20d405 Mon Sep 17 00:00:00 2001 From: Tero Kristo Date: Thu, 13 Nov 2014 19:17:34 +0200 Subject: [PATCH 15/35] ARM: OMAP2+: control: determine control module base address from DT There is no need to provide the control module base address through a low-level API from the low-level IO init, as this information is available through DT. This patch adds a new API to initialize the control module though, but mostly makes the old API obsolete. The old API can be completely removed once OMAP3 is made DT only. Signed-off-by: Tero Kristo --- arch/arm/mach-omap2/control.c | 49 ++++++++++++++++++++++++++++---- arch/arm/mach-omap2/control.h | 2 ++ arch/arm/mach-omap2/io.c | 34 +++++++++++----------- arch/arm/mach-omap2/prm.h | 1 - arch/arm/mach-omap2/prm_common.c | 5 ---- 5 files changed, 61 insertions(+), 30 deletions(-) diff --git a/arch/arm/mach-omap2/control.c b/arch/arm/mach-omap2/control.c index e8818242f968..21ff32c6001a 100644 --- a/arch/arm/mach-omap2/control.c +++ b/arch/arm/mach-omap2/control.c @@ -616,6 +616,7 @@ void __init omap3_ctrl_init(void) struct control_init_data { int index; + void __iomem *mem; }; static struct control_init_data ctrl_data = { @@ -627,9 +628,38 @@ static const struct of_device_id omap_scrm_dt_match_table[] = { { .compatible = "ti,am4-scrm", .data = &ctrl_data }, { .compatible = "ti,omap2-scrm", .data = &ctrl_data }, { .compatible = "ti,omap3-scrm", .data = &ctrl_data }, + { .compatible = "ti,dm816-scrm", .data = &ctrl_data }, { } }; +/** + * omap2_control_base_init - initialize iomappings for the control driver + * + * Detects and initializes the iomappings for the control driver, based + * on the DT data. Returns 0 in success, negative error value + * otherwise. + */ +int __init omap2_control_base_init(void) +{ + struct device_node *np; + const struct of_device_id *match; + struct control_init_data *data; + void __iomem *mem; + + for_each_matching_node_and_match(np, omap_scrm_dt_match_table, &match) { + data = (struct control_init_data *)match->data; + + mem = of_iomap(np, 0); + if (!mem) + return -ENOMEM; + + omap2_ctrl_base = mem; + data->mem = mem; + } + + return 0; +} + /** * omap_control_init - low level init for the control driver * @@ -639,7 +669,6 @@ static const struct of_device_id omap_scrm_dt_match_table[] = { int __init omap_control_init(void) { struct device_node *np; - void __iomem *mem; const struct of_device_id *match; const struct omap_prcm_init_data *data; int ret; @@ -647,14 +676,22 @@ int __init omap_control_init(void) for_each_matching_node_and_match(np, omap_scrm_dt_match_table, &match) { data = match->data; - mem = of_iomap(np, 0); - if (!mem) - return -ENOMEM; - - ret = omap2_clk_provider_init(np, data->index, mem); + ret = omap2_clk_provider_init(np, data->index, data->mem); if (ret) return ret; } return 0; } + +/** + * omap3_control_legacy_iomap_init - legacy iomap init for clock providers + * + * Legacy iomap init for clock provider. Needed only by legacy boot mode, + * where the base addresses are not parsed from DT, but still required + * by the clock driver to be setup properly. + */ +void __init omap3_control_legacy_iomap_init(void) +{ + omap2_clk_legacy_provider_init(TI_CLKM_SCRM, omap2_ctrl_base); +} diff --git a/arch/arm/mach-omap2/control.h b/arch/arm/mach-omap2/control.h index baf5783cb05d..c1057eb9d4e4 100644 --- a/arch/arm/mach-omap2/control.h +++ b/arch/arm/mach-omap2/control.h @@ -464,9 +464,11 @@ extern void omap_ctrl_write_dsp_boot_mode(u8 bootmode); extern void omap3630_ctrl_disable_rta(void); extern int omap3_ctrl_save_padconf(void); void omap3_ctrl_init(void); +int omap2_control_base_init(void); int omap_control_init(void); extern void omap2_set_globals_control(void __iomem *ctrl, void __iomem *ctrl_pad); +void __init omap3_control_legacy_iomap_init(void); #else #define omap_ctrl_base_get() 0 #define omap_ctrl_readb(x) 0 diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c index 712dd42bb5c2..622ee3bddd32 100644 --- a/arch/arm/mach-omap2/io.c +++ b/arch/arm/mach-omap2/io.c @@ -384,8 +384,7 @@ void __init omap2420_init_early(void) omap2_set_globals_tap(OMAP242X_CLASS, OMAP2_L4_IO_ADDRESS(0x48014000)); omap2_set_globals_sdrc(OMAP2_L3_IO_ADDRESS(OMAP2420_SDRC_BASE), OMAP2_L3_IO_ADDRESS(OMAP2420_SMS_BASE)); - omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP242X_CTRL_BASE), - NULL); + omap2_control_base_init(); omap2xxx_check_revision(); omap2xxx_prm_init(); omap2xxx_cm_init(); @@ -412,8 +411,7 @@ void __init omap2430_init_early(void) omap2_set_globals_tap(OMAP243X_CLASS, OMAP2_L4_IO_ADDRESS(0x4900a000)); omap2_set_globals_sdrc(OMAP2_L3_IO_ADDRESS(OMAP243X_SDRC_BASE), OMAP2_L3_IO_ADDRESS(OMAP243X_SMS_BASE)); - omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP243X_CTRL_BASE), - NULL); + omap2_control_base_init(); omap2xxx_check_revision(); omap2xxx_prm_init(); omap2xxx_cm_init(); @@ -444,11 +442,15 @@ void __init omap3_init_early(void) omap2_set_globals_tap(OMAP343X_CLASS, OMAP2_L4_IO_ADDRESS(0x4830A000)); omap2_set_globals_sdrc(OMAP2_L3_IO_ADDRESS(OMAP343X_SDRC_BASE), OMAP2_L3_IO_ADDRESS(OMAP343X_SMS_BASE)); - omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP343X_CTRL_BASE), - NULL); - /* XXX: remove these two once OMAP3 is DT only */ - omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP3430_PRM_BASE)); - omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP3430_CM_BASE), NULL); + /* XXX: remove these once OMAP3 is DT only */ + if (!of_have_populated_dt()) { + omap2_set_globals_control( + OMAP2_L4_IO_ADDRESS(OMAP343X_CTRL_BASE), NULL); + omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP3430_PRM_BASE)); + omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP3430_CM_BASE), + NULL); + } + omap2_control_base_init(); omap3xxx_check_revision(); omap3xxx_check_features(); omap3xxx_prm_init(); @@ -459,7 +461,7 @@ void __init omap3_init_early(void) omap3xxx_hwmod_init(); omap_hwmod_init_postsetup(); if (!of_have_populated_dt()) { - omap3_prcm_legacy_iomaps_init(); + omap3_control_legacy_iomap_init(); if (soc_is_am35xx()) omap_clk_soc_init = am35xx_clk_legacy_init; else if (cpu_is_omap3630()) @@ -546,8 +548,7 @@ void __init ti814x_init_early(void) { omap2_set_globals_tap(TI814X_CLASS, OMAP2_L4_IO_ADDRESS(TI81XX_TAP_BASE)); - omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(TI81XX_CTRL_BASE), - NULL); + omap2_control_base_init(); omap3xxx_check_revision(); ti81xx_check_features(); am33xx_prm_init(); @@ -565,8 +566,7 @@ void __init ti816x_init_early(void) { omap2_set_globals_tap(TI816X_CLASS, OMAP2_L4_IO_ADDRESS(TI81XX_TAP_BASE)); - omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(TI81XX_CTRL_BASE), - NULL); + omap2_control_base_init(); omap3xxx_check_revision(); ti81xx_check_features(); am33xx_prm_init(); @@ -586,8 +586,7 @@ void __init am33xx_init_early(void) { omap2_set_globals_tap(AM335X_CLASS, AM33XX_L4_WK_IO_ADDRESS(AM33XX_TAP_BASE)); - omap2_set_globals_control(AM33XX_L4_WK_IO_ADDRESS(AM33XX_CTRL_BASE), - NULL); + omap2_control_base_init(); omap3xxx_check_revision(); am33xx_check_features(); am33xx_prm_init(); @@ -610,8 +609,7 @@ void __init am43xx_init_early(void) { omap2_set_globals_tap(AM335X_CLASS, AM33XX_L4_WK_IO_ADDRESS(AM33XX_TAP_BASE)); - omap2_set_globals_control(AM33XX_L4_WK_IO_ADDRESS(AM33XX_CTRL_BASE), - NULL); + omap2_control_base_init(); omap3xxx_check_revision(); am33xx_check_features(); omap44xx_prm_init(); diff --git a/arch/arm/mach-omap2/prm.h b/arch/arm/mach-omap2/prm.h index 6d0a808f33f7..670733365287 100644 --- a/arch/arm/mach-omap2/prm.h +++ b/arch/arm/mach-omap2/prm.h @@ -21,7 +21,6 @@ extern u16 prm_features; extern void omap2_set_globals_prm(void __iomem *prm); int omap_prcm_init(void); int omap2_prm_base_init(void); -void omap3_prcm_legacy_iomaps_init(void); # endif /* diff --git a/arch/arm/mach-omap2/prm_common.c b/arch/arm/mach-omap2/prm_common.c index b23d2327bafe..a943e1447536 100644 --- a/arch/arm/mach-omap2/prm_common.c +++ b/arch/arm/mach-omap2/prm_common.c @@ -722,11 +722,6 @@ int __init omap_prcm_init(void) return 0; } -void __init omap3_prcm_legacy_iomaps_init(void) -{ - omap2_clk_legacy_provider_init(TI_CLKM_SCRM, omap_ctrl_base_get()); -} - static int __init prm_late_init(void) { if (prm_ll_data->late_init) From ab7b2ffcf576a49b51c240dcd68ca4b7cd60b84d Mon Sep 17 00:00:00 2001 From: Tero Kristo Date: Thu, 20 Nov 2014 15:02:59 +0200 Subject: [PATCH 16/35] ARM: OMAP2+: PRM: move SoC specific init calls within a generic API This gets rid of need for some exported driver APIs, and simplifies the initialization of the PRM driver. Done in preparation to make PRM a separate driver. The init data is now also passed to the SoC specific implementations, allowing future expansion to add feature flags etc. Signed-off-by: Tero Kristo --- arch/arm/mach-omap2/io.c | 21 +++++---- arch/arm/mach-omap2/prcm-common.h | 4 ++ arch/arm/mach-omap2/prm.h | 1 + arch/arm/mach-omap2/prm2xxx.c | 3 +- arch/arm/mach-omap2/prm2xxx.h | 2 +- arch/arm/mach-omap2/prm33xx.c | 3 +- arch/arm/mach-omap2/prm33xx.h | 2 +- arch/arm/mach-omap2/prm3xxx.c | 4 +- arch/arm/mach-omap2/prm3xxx.h | 2 +- arch/arm/mach-omap2/prm44xx.c | 3 +- arch/arm/mach-omap2/prm44xx.h | 1 - arch/arm/mach-omap2/prm44xx_54xx.h | 4 +- arch/arm/mach-omap2/prm54xx.h | 1 - arch/arm/mach-omap2/prm7xx.h | 2 +- arch/arm/mach-omap2/prm_common.c | 74 +++++++++++++++++++++++++----- 15 files changed, 89 insertions(+), 38 deletions(-) diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c index 622ee3bddd32..7632dfead166 100644 --- a/arch/arm/mach-omap2/io.c +++ b/arch/arm/mach-omap2/io.c @@ -386,7 +386,7 @@ void __init omap2420_init_early(void) OMAP2_L3_IO_ADDRESS(OMAP2420_SMS_BASE)); omap2_control_base_init(); omap2xxx_check_revision(); - omap2xxx_prm_init(); + omap2_prcm_base_init(); omap2xxx_cm_init(); omap2xxx_voltagedomains_init(); omap242x_powerdomains_init(); @@ -413,7 +413,7 @@ void __init omap2430_init_early(void) OMAP2_L3_IO_ADDRESS(OMAP243X_SMS_BASE)); omap2_control_base_init(); omap2xxx_check_revision(); - omap2xxx_prm_init(); + omap2_prcm_base_init(); omap2xxx_cm_init(); omap2xxx_voltagedomains_init(); omap243x_powerdomains_init(); @@ -453,7 +453,8 @@ void __init omap3_init_early(void) omap2_control_base_init(); omap3xxx_check_revision(); omap3xxx_check_features(); - omap3xxx_prm_init(); + omap2_prcm_base_init(); + omap3xxx_prm_init(NULL); omap3xxx_cm_init(); omap3xxx_voltagedomains_init(); omap3xxx_powerdomains_init(); @@ -551,7 +552,7 @@ void __init ti814x_init_early(void) omap2_control_base_init(); omap3xxx_check_revision(); ti81xx_check_features(); - am33xx_prm_init(); + omap2_prcm_base_init(); am33xx_cm_init(); omap3xxx_voltagedomains_init(); omap3xxx_powerdomains_init(); @@ -569,7 +570,7 @@ void __init ti816x_init_early(void) omap2_control_base_init(); omap3xxx_check_revision(); ti81xx_check_features(); - am33xx_prm_init(); + omap2_prcm_base_init(); am33xx_cm_init(); omap3xxx_voltagedomains_init(); omap3xxx_powerdomains_init(); @@ -589,7 +590,7 @@ void __init am33xx_init_early(void) omap2_control_base_init(); omap3xxx_check_revision(); am33xx_check_features(); - am33xx_prm_init(); + omap2_prcm_base_init(); am33xx_cm_init(); am33xx_powerdomains_init(); am33xx_clockdomains_init(); @@ -612,7 +613,7 @@ void __init am43xx_init_early(void) omap2_control_base_init(); omap3xxx_check_revision(); am33xx_check_features(); - omap44xx_prm_init(); + omap2_prcm_base_init(); omap4_cm_init(); am43xx_powerdomains_init(); am43xx_clockdomains_init(); @@ -638,7 +639,7 @@ void __init omap4430_init_early(void) omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP4430_PRCM_MPU_BASE)); omap4xxx_check_revision(); omap4xxx_check_features(); - omap44xx_prm_init(); + omap2_prcm_base_init(); omap4_cm_init(); omap4_pm_init_early(); omap44xx_voltagedomains_init(); @@ -667,7 +668,7 @@ void __init omap5_init_early(void) OMAP2_L4_IO_ADDRESS(OMAP54XX_CTRL_BASE)); omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRCM_MPU_BASE)); omap4_pm_init_early(); - omap44xx_prm_init(); + omap2_prcm_base_init(); omap5xxx_check_revision(); omap4_cm_init(); omap54xx_voltagedomains_init(); @@ -694,7 +695,7 @@ void __init dra7xx_init_early(void) OMAP2_L4_IO_ADDRESS(DRA7XX_CTRL_BASE)); omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRCM_MPU_BASE)); omap4_pm_init_early(); - omap44xx_prm_init(); + omap2_prcm_base_init(); dra7xxx_check_revision(); omap4_cm_init(); dra7xx_powerdomains_init(); diff --git a/arch/arm/mach-omap2/prcm-common.h b/arch/arm/mach-omap2/prcm-common.h index 9e4dd0b7dd6a..461bdc4ea8ec 100644 --- a/arch/arm/mach-omap2/prcm-common.h +++ b/arch/arm/mach-omap2/prcm-common.h @@ -524,12 +524,16 @@ struct omap_prcm_irq_setup { * @mem: IO mem pointer for this module * @offset: module base address offset from the IO base * @flags: PRCM module init flags + * @init: low level PRCM init function for this module + * @np: device node for this PRCM module */ struct omap_prcm_init_data { int index; void __iomem *mem; s16 offset; u16 flags; + int (*init)(const struct omap_prcm_init_data *data); + struct device_node *np; }; extern void omap_prcm_irq_cleanup(void); diff --git a/arch/arm/mach-omap2/prm.h b/arch/arm/mach-omap2/prm.h index 670733365287..3936e6c38cea 100644 --- a/arch/arm/mach-omap2/prm.h +++ b/arch/arm/mach-omap2/prm.h @@ -21,6 +21,7 @@ extern u16 prm_features; extern void omap2_set_globals_prm(void __iomem *prm); int omap_prcm_init(void); int omap2_prm_base_init(void); +int omap2_prcm_base_init(void); # endif /* diff --git a/arch/arm/mach-omap2/prm2xxx.c b/arch/arm/mach-omap2/prm2xxx.c index 29e203f38d07..752018ce129c 100644 --- a/arch/arm/mach-omap2/prm2xxx.c +++ b/arch/arm/mach-omap2/prm2xxx.c @@ -220,9 +220,8 @@ static struct prm_ll_data omap2xxx_prm_ll_data = { .clear_mod_irqs = &omap2xxx_prm_clear_mod_irqs, }; -int __init omap2xxx_prm_init(void) +int __init omap2xxx_prm_init(const struct omap_prcm_init_data *data) { - omap2_prm_base_init(); return prm_register(&omap2xxx_prm_ll_data); } diff --git a/arch/arm/mach-omap2/prm2xxx.h b/arch/arm/mach-omap2/prm2xxx.h index 9c91f4fac36d..9008a9e55a1a 100644 --- a/arch/arm/mach-omap2/prm2xxx.h +++ b/arch/arm/mach-omap2/prm2xxx.h @@ -124,7 +124,7 @@ extern int omap2xxx_clkdm_sleep(struct clockdomain *clkdm); extern int omap2xxx_clkdm_wakeup(struct clockdomain *clkdm); -extern int __init omap2xxx_prm_init(void); +int __init omap2xxx_prm_init(const struct omap_prcm_init_data *data); #endif diff --git a/arch/arm/mach-omap2/prm33xx.c b/arch/arm/mach-omap2/prm33xx.c index 1e052aaf92cd..dcb5001d77da 100644 --- a/arch/arm/mach-omap2/prm33xx.c +++ b/arch/arm/mach-omap2/prm33xx.c @@ -378,9 +378,8 @@ static struct prm_ll_data am33xx_prm_ll_data = { .reset_system = am33xx_prm_global_warm_sw_reset, }; -int __init am33xx_prm_init(void) +int __init am33xx_prm_init(const struct omap_prcm_init_data *data) { - omap2_prm_base_init(); return prm_register(&am33xx_prm_ll_data); } diff --git a/arch/arm/mach-omap2/prm33xx.h b/arch/arm/mach-omap2/prm33xx.h index 98ac41f271da..2bc4ec52ba78 100644 --- a/arch/arm/mach-omap2/prm33xx.h +++ b/arch/arm/mach-omap2/prm33xx.h @@ -118,7 +118,7 @@ #define AM33XX_PM_CEFUSE_PWRSTST AM33XX_PRM_REGADDR(AM33XX_PRM_CEFUSE_MOD, 0x0004) #ifndef __ASSEMBLER__ -int am33xx_prm_init(void); +int am33xx_prm_init(const struct omap_prcm_init_data *data); #endif /* ASSEMBLER */ #endif diff --git a/arch/arm/mach-omap2/prm3xxx.c b/arch/arm/mach-omap2/prm3xxx.c index a347993a7bfe..62680aad2126 100644 --- a/arch/arm/mach-omap2/prm3xxx.c +++ b/arch/arm/mach-omap2/prm3xxx.c @@ -670,12 +670,10 @@ static struct prm_ll_data omap3xxx_prm_ll_data = { .vp_clear_txdone = &omap3_prm_vp_clear_txdone, }; -int __init omap3xxx_prm_init(void) +int __init omap3xxx_prm_init(const struct omap_prcm_init_data *data) { omap2_clk_legacy_provider_init(TI_CLKM_PRM, prm_base + OMAP3430_IVA2_MOD); - omap2_prm_base_init(); - if (omap3_has_io_wakeup()) prm_features |= PRM_HAS_IO_WAKEUP; diff --git a/arch/arm/mach-omap2/prm3xxx.h b/arch/arm/mach-omap2/prm3xxx.h index 55e4c898ba25..5f095eec339c 100644 --- a/arch/arm/mach-omap2/prm3xxx.h +++ b/arch/arm/mach-omap2/prm3xxx.h @@ -140,7 +140,7 @@ extern u32 omap3_prm_vcvp_read(u8 offset); extern void omap3_prm_vcvp_write(u32 val, u8 offset); extern u32 omap3_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset); -extern int __init omap3xxx_prm_init(void); +int __init omap3xxx_prm_init(const struct omap_prcm_init_data *data); void omap3xxx_prm_iva_idle(void); void omap3_prm_reset_modem(void); int omap3xxx_prm_clear_global_cold_reset(void); diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c index b479a33eacfd..e3f2d313e341 100644 --- a/arch/arm/mach-omap2/prm44xx.c +++ b/arch/arm/mach-omap2/prm44xx.c @@ -703,9 +703,8 @@ static struct prm_ll_data omap44xx_prm_ll_data = { .vp_clear_txdone = omap4_prm_vp_clear_txdone, }; -int __init omap44xx_prm_init(void) +int __init omap44xx_prm_init(const struct omap_prcm_init_data *data) { - omap2_prm_base_init(); omap_prm_base_init(); if (cpu_is_omap44xx() || soc_is_omap54xx() || soc_is_dra7xx()) diff --git a/arch/arm/mach-omap2/prm44xx.h b/arch/arm/mach-omap2/prm44xx.h index 7db2422faa16..efd6035d0871 100644 --- a/arch/arm/mach-omap2/prm44xx.h +++ b/arch/arm/mach-omap2/prm44xx.h @@ -26,7 +26,6 @@ #define __ARCH_ARM_MACH_OMAP2_PRM44XX_H #include "prm44xx_54xx.h" -#include "prcm-common.h" #include "prm.h" #define OMAP4430_PRM_BASE 0x4a306000 diff --git a/arch/arm/mach-omap2/prm44xx_54xx.h b/arch/arm/mach-omap2/prm44xx_54xx.h index a470185d9ede..3f139ebc8398 100644 --- a/arch/arm/mach-omap2/prm44xx_54xx.h +++ b/arch/arm/mach-omap2/prm44xx_54xx.h @@ -23,6 +23,8 @@ #ifndef __ARCH_ARM_MACH_OMAP2_PRM44XX_54XX_H #define __ARCH_ARM_MACH_OMAP2_PRM44XX_54XX_H +#include "prcm-common.h" + /* Function prototypes */ #ifndef __ASSEMBLER__ @@ -34,7 +36,7 @@ extern u32 omap4_prm_vcvp_read(u8 offset); extern void omap4_prm_vcvp_write(u32 val, u8 offset); extern u32 omap4_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset); -extern int __init omap44xx_prm_init(void); +int __init omap44xx_prm_init(const struct omap_prcm_init_data *data); #endif diff --git a/arch/arm/mach-omap2/prm54xx.h b/arch/arm/mach-omap2/prm54xx.h index e4411010309c..1eb22ff087dc 100644 --- a/arch/arm/mach-omap2/prm54xx.h +++ b/arch/arm/mach-omap2/prm54xx.h @@ -22,7 +22,6 @@ #define __ARCH_ARM_MACH_OMAP2_PRM54XX_H #include "prm44xx_54xx.h" -#include "prcm-common.h" #include "prm.h" #define OMAP54XX_PRM_BASE 0x4ae06000 diff --git a/arch/arm/mach-omap2/prm7xx.h b/arch/arm/mach-omap2/prm7xx.h index 4bb50fbf29be..cc1e6a2b97f6 100644 --- a/arch/arm/mach-omap2/prm7xx.h +++ b/arch/arm/mach-omap2/prm7xx.h @@ -22,8 +22,8 @@ #ifndef __ARCH_ARM_MACH_OMAP2_PRM7XX_H #define __ARCH_ARM_MACH_OMAP2_PRM7XX_H -#include "prm44xx_54xx.h" #include "prcm-common.h" +#include "prm44xx_54xx.h" #include "prm.h" #define DRA7XX_PRM_BASE 0x4ae06000 diff --git a/arch/arm/mach-omap2/prm_common.c b/arch/arm/mach-omap2/prm_common.c index a943e1447536..aede589822fb 100644 --- a/arch/arm/mach-omap2/prm_common.c +++ b/arch/arm/mach-omap2/prm_common.c @@ -32,6 +32,7 @@ #include "prm2xxx_3xxx.h" #include "prm2xxx.h" #include "prm3xxx.h" +#include "prm33xx.h" #include "prm44xx.h" #include "common.h" #include "clock.h" @@ -633,12 +634,17 @@ int prm_unregister(struct prm_ll_data *pld) return 0; } -static struct omap_prcm_init_data prm_data = { +#ifdef CONFIG_ARCH_OMAP2 +static struct omap_prcm_init_data omap2_prm_data __initdata = { .index = TI_CLKM_PRM, + .init = omap2xxx_prm_init, }; +#endif -static struct omap_prcm_init_data omap3_prm_data = { +#ifdef CONFIG_ARCH_OMAP3 +static struct omap_prcm_init_data omap3_prm_data __initdata = { .index = TI_CLKM_PRM, + .init = omap3xxx_prm_init, /* * IVA2 offset is a negative value, must offset the prm_base @@ -646,23 +652,57 @@ static struct omap_prcm_init_data omap3_prm_data = { */ .offset = -OMAP3430_IVA2_MOD, }; +#endif -static struct omap_prcm_init_data scrm_data = { +#if defined(CONFIG_SOC_AM33XX) || defined(CONFIG_SOC_TI81XX) +static struct omap_prcm_init_data am3_prm_data __initdata = { + .index = TI_CLKM_PRM, + .init = am33xx_prm_init, +}; +#endif + +#if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5) || \ + defined(CONFIG_SOC_DRA7XX) || defined(CONFIG_SOC_AM43XX) +static struct omap_prcm_init_data omap4_prm_data __initdata = { + .index = TI_CLKM_PRM, + .init = omap44xx_prm_init, +}; +#endif + +#if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5) +static struct omap_prcm_init_data scrm_data __initdata = { .index = TI_CLKM_SCRM, }; +#endif -static const struct of_device_id omap_prcm_dt_match_table[] = { - { .compatible = "ti,am3-prcm", .data = &prm_data }, - { .compatible = "ti,am4-prcm", .data = &prm_data }, - { .compatible = "ti,dm814-prcm", .data = &prm_data }, - { .compatible = "ti,dm816-prcm", .data = &prm_data }, - { .compatible = "ti,omap2-prcm", .data = &prm_data }, +static const struct of_device_id omap_prcm_dt_match_table[] __initconst = { +#ifdef CONFIG_SOC_AM33XX + { .compatible = "ti,am3-prcm", .data = &am3_prm_data }, +#endif +#ifdef CONFIG_SOC_AM43XX + { .compatible = "ti,am4-prcm", .data = &omap4_prm_data }, +#endif +#ifdef CONFIG_SOC_TI81XX + { .compatible = "ti,dm814-prcm", .data = &am3_prm_data }, + { .compatible = "ti,dm816-prcm", .data = &am3_prm_data }, +#endif +#ifdef CONFIG_ARCH_OMAP2 + { .compatible = "ti,omap2-prcm", .data = &omap2_prm_data }, +#endif +#ifdef CONFIG_ARCH_OMAP3 { .compatible = "ti,omap3-prm", .data = &omap3_prm_data }, - { .compatible = "ti,omap4-prm", .data = &prm_data }, +#endif +#ifdef CONFIG_ARCH_OMAP4 + { .compatible = "ti,omap4-prm", .data = &omap4_prm_data }, { .compatible = "ti,omap4-scrm", .data = &scrm_data }, - { .compatible = "ti,omap5-prm", .data = &prm_data }, +#endif +#ifdef CONFIG_SOC_OMAP5 + { .compatible = "ti,omap5-prm", .data = &omap4_prm_data }, { .compatible = "ti,omap5-scrm", .data = &scrm_data }, - { .compatible = "ti,dra7-prm", .data = &prm_data }, +#endif +#ifdef CONFIG_SOC_DRA7XX + { .compatible = "ti,dra7-prm", .data = &omap4_prm_data }, +#endif { } }; @@ -691,11 +731,21 @@ int __init omap2_prm_base_init(void) prm_base = mem + data->offset; data->mem = mem; + + data->np = np; + + if (data->init) + data->init(data); } return 0; } +int __init omap2_prcm_base_init(void) +{ + return omap2_prm_base_init(); +} + /** * omap_prcm_init - low level init for the PRCM drivers * From 48e0c1148d18de677f1b2aec179f36fb7c1e3839 Mon Sep 17 00:00:00 2001 From: Tero Kristo Date: Mon, 8 Sep 2014 11:29:43 +0300 Subject: [PATCH 17/35] ARM: OMAP4+: PRM: determine prm_device_inst based on DT compatibility PRM device instance offset is now provided through the prm_init_data. This gets rid of some cpu_is_X / soc_is_X calls from PRM core code, preparing for PRM to be its own separate driver. Signed-off-by: Tero Kristo --- arch/arm/mach-omap2/prcm-common.h | 2 ++ arch/arm/mach-omap2/prm44xx.c | 2 ++ arch/arm/mach-omap2/prm_common.c | 37 ++++++++++++++++++++++++++----- arch/arm/mach-omap2/prminst44xx.c | 18 +++++---------- arch/arm/mach-omap2/prminst44xx.h | 1 + 5 files changed, 42 insertions(+), 18 deletions(-) diff --git a/arch/arm/mach-omap2/prcm-common.h b/arch/arm/mach-omap2/prcm-common.h index 461bdc4ea8ec..6ae0b3a1781e 100644 --- a/arch/arm/mach-omap2/prcm-common.h +++ b/arch/arm/mach-omap2/prcm-common.h @@ -524,6 +524,7 @@ struct omap_prcm_irq_setup { * @mem: IO mem pointer for this module * @offset: module base address offset from the IO base * @flags: PRCM module init flags + * @device_inst_offset: device instance offset within the module address space * @init: low level PRCM init function for this module * @np: device node for this PRCM module */ @@ -532,6 +533,7 @@ struct omap_prcm_init_data { void __iomem *mem; s16 offset; u16 flags; + s32 device_inst_offset; int (*init)(const struct omap_prcm_init_data *data); struct device_node *np; }; diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c index e3f2d313e341..a980d245a0bb 100644 --- a/arch/arm/mach-omap2/prm44xx.c +++ b/arch/arm/mach-omap2/prm44xx.c @@ -713,6 +713,8 @@ int __init omap44xx_prm_init(const struct omap_prcm_init_data *data) if (!soc_is_dra7xx()) prm_features |= PRM_HAS_VOLTAGE; + omap4_prminst_set_prm_dev_inst(data->device_inst_offset); + return prm_register(&omap44xx_prm_ll_data); } diff --git a/arch/arm/mach-omap2/prm_common.c b/arch/arm/mach-omap2/prm_common.c index aede589822fb..a834124c5309 100644 --- a/arch/arm/mach-omap2/prm_common.c +++ b/arch/arm/mach-omap2/prm_common.c @@ -34,6 +34,9 @@ #include "prm3xxx.h" #include "prm33xx.h" #include "prm44xx.h" +#include "prm54xx.h" +#include "prm7xx.h" +#include "prcm43xx.h" #include "common.h" #include "clock.h" #include "cm.h" @@ -661,11 +664,35 @@ static struct omap_prcm_init_data am3_prm_data __initdata = { }; #endif -#if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5) || \ - defined(CONFIG_SOC_DRA7XX) || defined(CONFIG_SOC_AM43XX) +#ifdef CONFIG_ARCH_OMAP4 static struct omap_prcm_init_data omap4_prm_data __initdata = { .index = TI_CLKM_PRM, .init = omap44xx_prm_init, + .device_inst_offset = OMAP4430_PRM_DEVICE_INST, +}; +#endif + +#ifdef CONFIG_SOC_OMAP5 +static struct omap_prcm_init_data omap5_prm_data __initdata = { + .index = TI_CLKM_PRM, + .init = omap44xx_prm_init, + .device_inst_offset = OMAP54XX_PRM_DEVICE_INST, +}; +#endif + +#ifdef CONFIG_SOC_DRA7XX +static struct omap_prcm_init_data dra7_prm_data __initdata = { + .index = TI_CLKM_PRM, + .init = omap44xx_prm_init, + .device_inst_offset = DRA7XX_PRM_DEVICE_INST, +}; +#endif + +#ifdef CONFIG_SOC_AM43XX +static struct omap_prcm_init_data am4_prm_data __initdata = { + .index = TI_CLKM_PRM, + .init = omap44xx_prm_init, + .device_inst_offset = AM43XX_PRM_DEVICE_INST, }; #endif @@ -680,7 +707,7 @@ static const struct of_device_id omap_prcm_dt_match_table[] __initconst = { { .compatible = "ti,am3-prcm", .data = &am3_prm_data }, #endif #ifdef CONFIG_SOC_AM43XX - { .compatible = "ti,am4-prcm", .data = &omap4_prm_data }, + { .compatible = "ti,am4-prcm", .data = &am4_prm_data }, #endif #ifdef CONFIG_SOC_TI81XX { .compatible = "ti,dm814-prcm", .data = &am3_prm_data }, @@ -697,11 +724,11 @@ static const struct of_device_id omap_prcm_dt_match_table[] __initconst = { { .compatible = "ti,omap4-scrm", .data = &scrm_data }, #endif #ifdef CONFIG_SOC_OMAP5 - { .compatible = "ti,omap5-prm", .data = &omap4_prm_data }, + { .compatible = "ti,omap5-prm", .data = &omap5_prm_data }, { .compatible = "ti,omap5-scrm", .data = &scrm_data }, #endif #ifdef CONFIG_SOC_DRA7XX - { .compatible = "ti,dra7-prm", .data = &omap4_prm_data }, + { .compatible = "ti,dra7-prm", .data = &dra7_prm_data }, #endif { } }; diff --git a/arch/arm/mach-omap2/prminst44xx.c b/arch/arm/mach-omap2/prminst44xx.c index 8adf7b1a1dce..c4859c4d3646 100644 --- a/arch/arm/mach-omap2/prminst44xx.c +++ b/arch/arm/mach-omap2/prminst44xx.c @@ -47,22 +47,14 @@ void omap_prm_base_init(void) s32 omap4_prmst_get_prm_dev_inst(void) { - if (prm_dev_inst != PRM_INSTANCE_UNKNOWN) - return prm_dev_inst; - - /* This cannot be done way early at boot.. as things are not setup */ - if (cpu_is_omap44xx()) - prm_dev_inst = OMAP4430_PRM_DEVICE_INST; - else if (soc_is_omap54xx()) - prm_dev_inst = OMAP54XX_PRM_DEVICE_INST; - else if (soc_is_dra7xx()) - prm_dev_inst = DRA7XX_PRM_DEVICE_INST; - else if (soc_is_am43xx()) - prm_dev_inst = AM43XX_PRM_DEVICE_INST; - return prm_dev_inst; } +void omap4_prminst_set_prm_dev_inst(s32 dev_inst) +{ + prm_dev_inst = dev_inst; +} + /* Read a register in a PRM instance */ u32 omap4_prminst_read_inst_reg(u8 part, s16 inst, u16 idx) { diff --git a/arch/arm/mach-omap2/prminst44xx.h b/arch/arm/mach-omap2/prminst44xx.h index fb1c9d7a2f9d..0c03d0731d7f 100644 --- a/arch/arm/mach-omap2/prminst44xx.h +++ b/arch/arm/mach-omap2/prminst44xx.h @@ -14,6 +14,7 @@ #define PRM_INSTANCE_UNKNOWN -1 extern s32 omap4_prmst_get_prm_dev_inst(void); +void omap4_prminst_set_prm_dev_inst(s32 dev_inst); /* * In an ideal world, we would not export these low-level functions, From 425dc8b2dff222ffd88f31f589dc647409cae0ce Mon Sep 17 00:00:00 2001 From: Tero Kristo Date: Fri, 21 Nov 2014 15:51:37 +0200 Subject: [PATCH 18/35] ARM: OMAP2+: CM: move SoC specific init calls within a generic API This gets rid of need for some exported driver APIs, and simplifies the initialization of the CM driver. Done in preparation to make CM a separate driver. The init data is now also passed to the SoC specific implementations, allowing future expansion to add feature flags etc. Signed-off-by: Tero Kristo --- arch/arm/mach-omap2/cm2xxx.c | 3 +- arch/arm/mach-omap2/cm2xxx.h | 2 +- arch/arm/mach-omap2/cm33xx.c | 3 +- arch/arm/mach-omap2/cm33xx.h | 3 +- arch/arm/mach-omap2/cm3xxx.c | 3 +- arch/arm/mach-omap2/cm3xxx.h | 2 +- arch/arm/mach-omap2/cm44xx.h | 2 +- arch/arm/mach-omap2/cm_common.c | 64 +++++++++++++++++++++++++++----- arch/arm/mach-omap2/cminst44xx.c | 3 +- arch/arm/mach-omap2/io.c | 16 +++----- arch/arm/mach-omap2/prm_common.c | 8 +++- 11 files changed, 75 insertions(+), 34 deletions(-) diff --git a/arch/arm/mach-omap2/cm2xxx.c b/arch/arm/mach-omap2/cm2xxx.c index f18c844353bc..3e5fd3587eb1 100644 --- a/arch/arm/mach-omap2/cm2xxx.c +++ b/arch/arm/mach-omap2/cm2xxx.c @@ -393,9 +393,8 @@ static struct cm_ll_data omap2xxx_cm_ll_data = { .wait_module_ready = &omap2xxx_cm_wait_module_ready, }; -int __init omap2xxx_cm_init(void) +int __init omap2xxx_cm_init(const struct omap_prcm_init_data *data) { - omap2_cm_base_init(); return cm_register(&omap2xxx_cm_ll_data); } diff --git a/arch/arm/mach-omap2/cm2xxx.h b/arch/arm/mach-omap2/cm2xxx.h index 83b6c597b0e1..7b8c79c0ce27 100644 --- a/arch/arm/mach-omap2/cm2xxx.h +++ b/arch/arm/mach-omap2/cm2xxx.h @@ -63,7 +63,7 @@ extern u32 omap2xxx_cm_get_core_pll_config(void); extern void omap2xxx_cm_set_mod_dividers(u32 mpu, u32 dsp, u32 gfx, u32 core, u32 mdm); -extern int __init omap2xxx_cm_init(void); +int __init omap2xxx_cm_init(const struct omap_prcm_init_data *data); #endif diff --git a/arch/arm/mach-omap2/cm33xx.c b/arch/arm/mach-omap2/cm33xx.c index 221bca3fbfa6..7b181f929525 100644 --- a/arch/arm/mach-omap2/cm33xx.c +++ b/arch/arm/mach-omap2/cm33xx.c @@ -352,9 +352,8 @@ static struct cm_ll_data am33xx_cm_ll_data = { .module_disable = &am33xx_cm_module_disable, }; -int __init am33xx_cm_init(void) +int __init am33xx_cm_init(const struct omap_prcm_init_data *data) { - omap2_cm_base_init(); return cm_register(&am33xx_cm_ll_data); } diff --git a/arch/arm/mach-omap2/cm33xx.h b/arch/arm/mach-omap2/cm33xx.h index 046b4b2bc9d9..a91f7d282455 100644 --- a/arch/arm/mach-omap2/cm33xx.h +++ b/arch/arm/mach-omap2/cm33xx.h @@ -19,6 +19,7 @@ #include "cm.h" #include "cm-regbits-33xx.h" +#include "prcm-common.h" /* CM base address */ #define AM33XX_CM_BASE 0x44e00000 @@ -374,6 +375,6 @@ #ifndef __ASSEMBLER__ -int am33xx_cm_init(void); +int am33xx_cm_init(const struct omap_prcm_init_data *data); #endif /* ASSEMBLER */ #endif diff --git a/arch/arm/mach-omap2/cm3xxx.c b/arch/arm/mach-omap2/cm3xxx.c index 88e6cb619861..187fa4386718 100644 --- a/arch/arm/mach-omap2/cm3xxx.c +++ b/arch/arm/mach-omap2/cm3xxx.c @@ -671,10 +671,9 @@ static struct cm_ll_data omap3xxx_cm_ll_data = { .wait_module_ready = &omap3xxx_cm_wait_module_ready, }; -int __init omap3xxx_cm_init(void) +int __init omap3xxx_cm_init(const struct omap_prcm_init_data *data) { omap2_clk_legacy_provider_init(TI_CLKM_CM, cm_base + OMAP3430_IVA2_MOD); - omap2_cm_base_init(); return cm_register(&omap3xxx_cm_ll_data); } diff --git a/arch/arm/mach-omap2/cm3xxx.h b/arch/arm/mach-omap2/cm3xxx.h index 734a8581c0c4..bc444e2080a1 100644 --- a/arch/arm/mach-omap2/cm3xxx.h +++ b/arch/arm/mach-omap2/cm3xxx.h @@ -72,7 +72,7 @@ extern void omap3_cm_save_context(void); extern void omap3_cm_restore_context(void); extern void omap3_cm_save_scratchpad_contents(u32 *ptr); -extern int __init omap3xxx_cm_init(void); +int __init omap3xxx_cm_init(const struct omap_prcm_init_data *data); #endif diff --git a/arch/arm/mach-omap2/cm44xx.h b/arch/arm/mach-omap2/cm44xx.h index ad6e263c5a6b..309a4c913448 100644 --- a/arch/arm/mach-omap2/cm44xx.h +++ b/arch/arm/mach-omap2/cm44xx.h @@ -23,6 +23,6 @@ #define OMAP4_CM_CLKSTCTRL 0x0000 #define OMAP4_CM_STATICDEP 0x0004 -int omap4_cm_init(void); +int omap4_cm_init(const struct omap_prcm_init_data *data); #endif diff --git a/arch/arm/mach-omap2/cm_common.c b/arch/arm/mach-omap2/cm_common.c index 32af8fc749f0..ff24fdfb3bb2 100644 --- a/arch/arm/mach-omap2/cm_common.c +++ b/arch/arm/mach-omap2/cm_common.c @@ -20,6 +20,7 @@ #include "cm2xxx.h" #include "cm3xxx.h" +#include "cm33xx.h" #include "cm44xx.h" #include "clock.h" @@ -37,6 +38,7 @@ void __iomem *cm_base; void __iomem *cm2_base; #define CM_NO_CLOCKS 0x1 +#define CM_SINGLE_INSTANCE 0x2 /** * omap2_set_globals_cm - set the CM/CM2 base addresses (for early use) @@ -218,21 +220,32 @@ int cm_unregister(struct cm_ll_data *cld) return 0; } -static struct omap_prcm_init_data cm_data = { +#if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5) || \ + defined(CONFIG_SOC_DRA7XX) +static struct omap_prcm_init_data cm_data __initdata = { .index = TI_CLKM_CM, + .init = omap4_cm_init, }; -static struct omap_prcm_init_data cm2_data = { +static struct omap_prcm_init_data cm2_data __initdata = { .index = TI_CLKM_CM2, + .init = omap4_cm_init, }; +#endif -static struct omap_prcm_init_data omap2_prcm_data = { +#ifdef CONFIG_ARCH_OMAP2 +static struct omap_prcm_init_data omap2_prcm_data __initdata = { .index = TI_CLKM_CM, - .flags = CM_NO_CLOCKS, + .init = omap2xxx_cm_init, + .flags = CM_NO_CLOCKS | CM_SINGLE_INSTANCE, }; +#endif -static struct omap_prcm_init_data omap3_cm_data = { +#ifdef CONFIG_ARCH_OMAP3 +static struct omap_prcm_init_data omap3_cm_data __initdata = { .index = TI_CLKM_CM, + .init = omap3xxx_cm_init, + .flags = CM_SINGLE_INSTANCE, /* * IVA2 offset is a negative value, must offset the cm_base address @@ -240,28 +253,53 @@ static struct omap_prcm_init_data omap3_cm_data = { */ .offset = -OMAP3430_IVA2_MOD, }; +#endif -static struct omap_prcm_init_data am3_prcm_data = { +#if defined(CONFIG_SOC_AM33XX) || defined(CONFIG_SOC_TI81XX) +static struct omap_prcm_init_data am3_prcm_data __initdata = { .index = TI_CLKM_CM, - .flags = CM_NO_CLOCKS, + .flags = CM_NO_CLOCKS | CM_SINGLE_INSTANCE, + .init = am33xx_cm_init, }; +#endif -static struct omap_prcm_init_data am4_prcm_data = { +#ifdef CONFIG_SOC_AM43XX +static struct omap_prcm_init_data am4_prcm_data __initdata = { .index = TI_CLKM_CM, - .flags = CM_NO_CLOCKS, + .flags = CM_NO_CLOCKS | CM_SINGLE_INSTANCE, + .init = omap4_cm_init, }; +#endif -static const struct of_device_id omap_cm_dt_match_table[] = { +static const struct of_device_id omap_cm_dt_match_table[] __initconst = { +#ifdef CONFIG_ARCH_OMAP2 { .compatible = "ti,omap2-prcm", .data = &omap2_prcm_data }, +#endif +#ifdef CONFIG_ARCH_OMAP3 { .compatible = "ti,omap3-cm", .data = &omap3_cm_data }, +#endif +#ifdef CONFIG_ARCH_OMAP4 { .compatible = "ti,omap4-cm1", .data = &cm_data }, { .compatible = "ti,omap4-cm2", .data = &cm2_data }, +#endif +#ifdef CONFIG_SOC_OMAP5 { .compatible = "ti,omap5-cm-core-aon", .data = &cm_data }, { .compatible = "ti,omap5-cm-core", .data = &cm2_data }, +#endif +#ifdef CONFIG_SOC_DRA7XX { .compatible = "ti,dra7-cm-core-aon", .data = &cm_data }, { .compatible = "ti,dra7-cm-core", .data = &cm2_data }, +#endif +#ifdef CONFIG_SOC_AM33XX { .compatible = "ti,am3-prcm", .data = &am3_prcm_data }, +#endif +#ifdef CONFIG_SOC_AM43XX { .compatible = "ti,am4-prcm", .data = &am4_prcm_data }, +#endif +#ifdef CONFIG_SOC_TI81XX + { .compatible = "ti,dm814-prcm", .data = &am3_prcm_data }, + { .compatible = "ti,dm816-prcm", .data = &am3_prcm_data }, +#endif { } }; @@ -293,6 +331,12 @@ int __init omap2_cm_base_init(void) cm2_base = mem + data->offset; data->mem = mem; + + data->np = np; + + if (data->init && (data->flags & CM_SINGLE_INSTANCE || + (cm_base && cm2_base))) + data->init(data); } return 0; diff --git a/arch/arm/mach-omap2/cminst44xx.c b/arch/arm/mach-omap2/cminst44xx.c index 4aed22dbe558..2c0e07ed6b99 100644 --- a/arch/arm/mach-omap2/cminst44xx.c +++ b/arch/arm/mach-omap2/cminst44xx.c @@ -514,9 +514,8 @@ static struct cm_ll_data omap4xxx_cm_ll_data = { .module_disable = &omap4_cminst_module_disable, }; -int __init omap4_cm_init(void) +int __init omap4_cm_init(const struct omap_prcm_init_data *data) { - omap2_cm_base_init(); omap_cm_base_init(); return cm_register(&omap4xxx_cm_ll_data); diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c index 7632dfead166..c3fa739ab4c8 100644 --- a/arch/arm/mach-omap2/io.c +++ b/arch/arm/mach-omap2/io.c @@ -387,7 +387,6 @@ void __init omap2420_init_early(void) omap2_control_base_init(); omap2xxx_check_revision(); omap2_prcm_base_init(); - omap2xxx_cm_init(); omap2xxx_voltagedomains_init(); omap242x_powerdomains_init(); omap242x_clockdomains_init(); @@ -414,7 +413,6 @@ void __init omap2430_init_early(void) omap2_control_base_init(); omap2xxx_check_revision(); omap2_prcm_base_init(); - omap2xxx_cm_init(); omap2xxx_voltagedomains_init(); omap243x_powerdomains_init(); omap243x_clockdomains_init(); @@ -454,8 +452,11 @@ void __init omap3_init_early(void) omap3xxx_check_revision(); omap3xxx_check_features(); omap2_prcm_base_init(); - omap3xxx_prm_init(NULL); - omap3xxx_cm_init(); + /* XXX: remove these once OMAP3 is DT only */ + if (!of_have_populated_dt()) { + omap3xxx_prm_init(NULL); + omap3xxx_cm_init(NULL); + } omap3xxx_voltagedomains_init(); omap3xxx_powerdomains_init(); omap3xxx_clockdomains_init(); @@ -553,7 +554,6 @@ void __init ti814x_init_early(void) omap3xxx_check_revision(); ti81xx_check_features(); omap2_prcm_base_init(); - am33xx_cm_init(); omap3xxx_voltagedomains_init(); omap3xxx_powerdomains_init(); ti81xx_clockdomains_init(); @@ -571,7 +571,6 @@ void __init ti816x_init_early(void) omap3xxx_check_revision(); ti81xx_check_features(); omap2_prcm_base_init(); - am33xx_cm_init(); omap3xxx_voltagedomains_init(); omap3xxx_powerdomains_init(); ti81xx_clockdomains_init(); @@ -591,7 +590,6 @@ void __init am33xx_init_early(void) omap3xxx_check_revision(); am33xx_check_features(); omap2_prcm_base_init(); - am33xx_cm_init(); am33xx_powerdomains_init(); am33xx_clockdomains_init(); am33xx_hwmod_init(); @@ -614,7 +612,6 @@ void __init am43xx_init_early(void) omap3xxx_check_revision(); am33xx_check_features(); omap2_prcm_base_init(); - omap4_cm_init(); am43xx_powerdomains_init(); am43xx_clockdomains_init(); am43xx_hwmod_init(); @@ -640,7 +637,6 @@ void __init omap4430_init_early(void) omap4xxx_check_revision(); omap4xxx_check_features(); omap2_prcm_base_init(); - omap4_cm_init(); omap4_pm_init_early(); omap44xx_voltagedomains_init(); omap44xx_powerdomains_init(); @@ -670,7 +666,6 @@ void __init omap5_init_early(void) omap4_pm_init_early(); omap2_prcm_base_init(); omap5xxx_check_revision(); - omap4_cm_init(); omap54xx_voltagedomains_init(); omap54xx_powerdomains_init(); omap54xx_clockdomains_init(); @@ -697,7 +692,6 @@ void __init dra7xx_init_early(void) omap4_pm_init_early(); omap2_prcm_base_init(); dra7xxx_check_revision(); - omap4_cm_init(); dra7xx_powerdomains_init(); dra7xx_clockdomains_init(); dra7xx_hwmod_init(); diff --git a/arch/arm/mach-omap2/prm_common.c b/arch/arm/mach-omap2/prm_common.c index a834124c5309..3e932b8b8ce9 100644 --- a/arch/arm/mach-omap2/prm_common.c +++ b/arch/arm/mach-omap2/prm_common.c @@ -770,7 +770,13 @@ int __init omap2_prm_base_init(void) int __init omap2_prcm_base_init(void) { - return omap2_prm_base_init(); + int ret; + + ret = omap2_prm_base_init(); + if (ret) + return ret; + + return omap2_cm_base_init(); } /** From 8b5b9a22b57c75905b368194b6fd4c472d5dc630 Mon Sep 17 00:00:00 2001 From: Tero Kristo Date: Fri, 21 Nov 2014 14:45:29 +0200 Subject: [PATCH 19/35] ARM: OMAP4+: PRM: setup prm_features from the PRM init time flags Currently some cpu_is_X checks are used to setup prm_features, however the same can be accomplished by just passing these flags from the PRM init data. This is done in preparation to make PRM a separate driver. Signed-off-by: Tero Kristo --- arch/arm/mach-omap2/prm44xx.c | 4 ++-- arch/arm/mach-omap2/prm_common.c | 3 +++ 2 files changed, 5 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c index a980d245a0bb..243133c4bf0d 100644 --- a/arch/arm/mach-omap2/prm44xx.c +++ b/arch/arm/mach-omap2/prm44xx.c @@ -707,10 +707,10 @@ int __init omap44xx_prm_init(const struct omap_prcm_init_data *data) { omap_prm_base_init(); - if (cpu_is_omap44xx() || soc_is_omap54xx() || soc_is_dra7xx()) + if (data->flags & PRM_HAS_IO_WAKEUP) prm_features |= PRM_HAS_IO_WAKEUP; - if (!soc_is_dra7xx()) + if (data->flags & PRM_HAS_VOLTAGE) prm_features |= PRM_HAS_VOLTAGE; omap4_prminst_set_prm_dev_inst(data->device_inst_offset); diff --git a/arch/arm/mach-omap2/prm_common.c b/arch/arm/mach-omap2/prm_common.c index 3e932b8b8ce9..04dfe8f844c9 100644 --- a/arch/arm/mach-omap2/prm_common.c +++ b/arch/arm/mach-omap2/prm_common.c @@ -669,6 +669,7 @@ static struct omap_prcm_init_data omap4_prm_data __initdata = { .index = TI_CLKM_PRM, .init = omap44xx_prm_init, .device_inst_offset = OMAP4430_PRM_DEVICE_INST, + .flags = PRM_HAS_IO_WAKEUP | PRM_HAS_VOLTAGE, }; #endif @@ -677,6 +678,7 @@ static struct omap_prcm_init_data omap5_prm_data __initdata = { .index = TI_CLKM_PRM, .init = omap44xx_prm_init, .device_inst_offset = OMAP54XX_PRM_DEVICE_INST, + .flags = PRM_HAS_IO_WAKEUP | PRM_HAS_VOLTAGE, }; #endif @@ -685,6 +687,7 @@ static struct omap_prcm_init_data dra7_prm_data __initdata = { .index = TI_CLKM_PRM, .init = omap44xx_prm_init, .device_inst_offset = DRA7XX_PRM_DEVICE_INST, + .flags = PRM_HAS_IO_WAKEUP, }; #endif From 219595b6ee139d883b98a9a32efbe2970802200a Mon Sep 17 00:00:00 2001 From: Tero Kristo Date: Mon, 8 Sep 2014 11:44:10 +0300 Subject: [PATCH 20/35] ARM: OMAP4+: PRM: get rid of cpu_is_omap44xx calls from interrupt init The compatible DT node is now passed with the prm init, so there is no need to do node matching here again. Added a new flag to the init data also, to detect default IRQ support for OMAP4. Also, any booting omap4 DT setup always has a PRM node, so there is no need to check against the special case where it would be missing. Signed-off-by: Tero Kristo --- arch/arm/mach-omap2/prm.h | 6 ++-- arch/arm/mach-omap2/prm44xx.c | 50 ++++++++++++-------------------- arch/arm/mach-omap2/prm_common.c | 2 +- 3 files changed, 24 insertions(+), 34 deletions(-) diff --git a/arch/arm/mach-omap2/prm.h b/arch/arm/mach-omap2/prm.h index 3936e6c38cea..233bc84fbc0e 100644 --- a/arch/arm/mach-omap2/prm.h +++ b/arch/arm/mach-omap2/prm.h @@ -29,9 +29,11 @@ int omap2_prcm_base_init(void); * * PRM_HAS_IO_WAKEUP: has IO wakeup capability * PRM_HAS_VOLTAGE: has voltage domains + * PRM_IRQ_DEFAULT: use default irq number for PRM irq */ -#define PRM_HAS_IO_WAKEUP (1 << 0) -#define PRM_HAS_VOLTAGE (1 << 1) +#define PRM_HAS_IO_WAKEUP BIT(0) +#define PRM_HAS_VOLTAGE BIT(1) +#define PRM_IRQ_DEFAULT BIT(2) /* * MAX_MODULE_SOFTRESET_WAIT: Maximum microseconds to wait for OMAP diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c index 243133c4bf0d..c35ad0bedf81 100644 --- a/arch/arm/mach-omap2/prm44xx.c +++ b/arch/arm/mach-omap2/prm44xx.c @@ -703,10 +703,14 @@ static struct prm_ll_data omap44xx_prm_ll_data = { .vp_clear_txdone = omap4_prm_vp_clear_txdone, }; +static const struct omap_prcm_init_data *prm_init_data; + int __init omap44xx_prm_init(const struct omap_prcm_init_data *data) { omap_prm_base_init(); + prm_init_data = data; + if (data->flags & PRM_HAS_IO_WAKEUP) prm_features |= PRM_HAS_IO_WAKEUP; @@ -718,16 +722,8 @@ int __init omap44xx_prm_init(const struct omap_prcm_init_data *data) return prm_register(&omap44xx_prm_ll_data); } -static const struct of_device_id omap_prm_dt_match_table[] = { - { .compatible = "ti,omap4-prm" }, - { .compatible = "ti,omap5-prm" }, - { .compatible = "ti,dra7-prm" }, - { } -}; - static int omap44xx_prm_late_init(void) { - struct device_node *np; int irq_num; if (!(prm_features & PRM_HAS_IO_WAKEUP)) @@ -737,31 +733,23 @@ static int omap44xx_prm_late_init(void) if (!of_have_populated_dt()) return 0; - np = of_find_matching_node(NULL, omap_prm_dt_match_table); + irq_num = of_irq_get(prm_init_data->np, 0); + /* + * Already have OMAP4 IRQ num. For all other platforms, we need + * IRQ numbers from DT + */ + if (irq_num < 0 && !(prm_init_data->flags & PRM_IRQ_DEFAULT)) { + if (irq_num == -EPROBE_DEFER) + return irq_num; - if (!np) { - /* Default loaded up with OMAP4 values */ - if (!cpu_is_omap44xx()) - return 0; - } else { - irq_num = of_irq_get(np, 0); - /* - * Already have OMAP4 IRQ num. For all other platforms, we need - * IRQ numbers from DT - */ - if (irq_num < 0 && !cpu_is_omap44xx()) { - if (irq_num == -EPROBE_DEFER) - return irq_num; + /* Have nothing to do */ + return 0; + } - /* Have nothing to do */ - return 0; - } - - /* Once OMAP4 DT is filled as well */ - if (irq_num >= 0) { - omap4_prcm_irq_setup.irq = irq_num; - omap4_prcm_irq_setup.xlate_irq = NULL; - } + /* Once OMAP4 DT is filled as well */ + if (irq_num >= 0) { + omap4_prcm_irq_setup.irq = irq_num; + omap4_prcm_irq_setup.xlate_irq = NULL; } omap44xx_prm_enable_io_wakeup(); diff --git a/arch/arm/mach-omap2/prm_common.c b/arch/arm/mach-omap2/prm_common.c index 04dfe8f844c9..6832a31e9a70 100644 --- a/arch/arm/mach-omap2/prm_common.c +++ b/arch/arm/mach-omap2/prm_common.c @@ -669,7 +669,7 @@ static struct omap_prcm_init_data omap4_prm_data __initdata = { .index = TI_CLKM_PRM, .init = omap44xx_prm_init, .device_inst_offset = OMAP4430_PRM_DEVICE_INST, - .flags = PRM_HAS_IO_WAKEUP | PRM_HAS_VOLTAGE, + .flags = PRM_HAS_IO_WAKEUP | PRM_HAS_VOLTAGE | PRM_IRQ_DEFAULT, }; #endif From 80cbb224b789d256ad5cb36b0af3e5c04ed46bca Mon Sep 17 00:00:00 2001 From: Tero Kristo Date: Fri, 6 Feb 2015 16:00:32 +0200 Subject: [PATCH 21/35] ARM: OMAP2+: clock: add low-level support for regmap Some of the TI clock providers will be converted to use syscon, thus low-level regmap support is needed for the clock drivers also. This patch adds this support, which can be enabled for individual drivers in later patches. Signed-off-by: Tero Kristo --- arch/arm/mach-omap2/clock.c | 48 +++++++++++++++++++++++++++----- arch/arm/mach-omap2/clock.h | 4 ++- arch/arm/mach-omap2/cm_common.c | 2 +- arch/arm/mach-omap2/control.c | 2 +- arch/arm/mach-omap2/prm_common.c | 2 +- 5 files changed, 47 insertions(+), 11 deletions(-) diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c index 94080fba02f6..a699d7169307 100644 --- a/arch/arm/mach-omap2/clock.c +++ b/arch/arm/mach-omap2/clock.c @@ -23,7 +23,9 @@ #include #include #include +#include #include +#include #include #include @@ -73,20 +75,37 @@ struct ti_clk_features ti_clk_features; static bool clkdm_control = true; static LIST_HEAD(clk_hw_omap_clocks); -static void __iomem *clk_memmaps[CLK_MAX_MEMMAPS]; + +struct clk_iomap { + struct regmap *regmap; + void __iomem *mem; +}; + +static struct clk_iomap *clk_memmaps[CLK_MAX_MEMMAPS]; static void clk_memmap_writel(u32 val, void __iomem *reg) { struct clk_omap_reg *r = (struct clk_omap_reg *)® + struct clk_iomap *io = clk_memmaps[r->index]; - writel_relaxed(val, clk_memmaps[r->index] + r->offset); + if (io->regmap) + regmap_write(io->regmap, r->offset, val); + else + writel_relaxed(val, io->mem + r->offset); } static u32 clk_memmap_readl(void __iomem *reg) { + u32 val; struct clk_omap_reg *r = (struct clk_omap_reg *)® + struct clk_iomap *io = clk_memmaps[r->index]; - return readl_relaxed(clk_memmaps[r->index] + r->offset); + if (io->regmap) + regmap_read(io->regmap, r->offset, &val); + else + val = readl_relaxed(io->mem + r->offset); + + return val; } void omap2_clk_writel(u32 val, struct clk_hw_omap *clk, void __iomem *reg) @@ -115,18 +134,27 @@ static struct ti_clk_ll_ops omap_clk_ll_ops = { * @match_table: DT device table to match for devices to init * @np: device node pointer for the this clock provider * @index: index for the clock provider - * @mem: iomem pointer for the clock provider memory area + + @syscon: syscon regmap pointer + * @mem: iomem pointer for the clock provider memory area, only used if + * syscon is not provided * * Initializes a clock provider module (CM/PRM etc.), registering * the memory mapping at specified index and initializing the * low level driver infrastructure. Returns 0 in success. */ int __init omap2_clk_provider_init(struct device_node *np, int index, - void __iomem *mem) + struct regmap *syscon, void __iomem *mem) { + struct clk_iomap *io; + ti_clk_ll_ops = &omap_clk_ll_ops; - clk_memmaps[index] = mem; + io = kzalloc(sizeof(*io), GFP_KERNEL); + + io->regmap = syscon; + io->mem = mem; + + clk_memmaps[index] = io; ti_dt_clk_init_provider(np, index); @@ -142,9 +170,15 @@ int __init omap2_clk_provider_init(struct device_node *np, int index, */ void __init omap2_clk_legacy_provider_init(int index, void __iomem *mem) { + struct clk_iomap *io; + ti_clk_ll_ops = &omap_clk_ll_ops; - clk_memmaps[index] = mem; + io = memblock_virt_alloc(sizeof(*io), 0); + + io->mem = mem; + + clk_memmaps[index] = io; } /* diff --git a/arch/arm/mach-omap2/clock.h b/arch/arm/mach-omap2/clock.h index b6433fc284ce..652ed0ab86ec 100644 --- a/arch/arm/mach-omap2/clock.h +++ b/arch/arm/mach-omap2/clock.h @@ -274,8 +274,10 @@ extern const struct clksel_rate div31_1to31_rates[]; extern int omap2_clkops_enable_clkdm(struct clk_hw *hw); extern void omap2_clkops_disable_clkdm(struct clk_hw *hw); +struct regmap; + int __init omap2_clk_provider_init(struct device_node *np, int index, - void __iomem *mem); + struct regmap *syscon, void __iomem *mem); void __init omap2_clk_legacy_provider_init(int index, void __iomem *mem); void __init ti_clk_init_features(void); diff --git a/arch/arm/mach-omap2/cm_common.c b/arch/arm/mach-omap2/cm_common.c index ff24fdfb3bb2..23e8bcec34e3 100644 --- a/arch/arm/mach-omap2/cm_common.c +++ b/arch/arm/mach-omap2/cm_common.c @@ -361,7 +361,7 @@ int __init omap_cm_init(void) if (data->flags & CM_NO_CLOCKS) continue; - ret = omap2_clk_provider_init(np, data->index, data->mem); + ret = omap2_clk_provider_init(np, data->index, NULL, data->mem); if (ret) return ret; } diff --git a/arch/arm/mach-omap2/control.c b/arch/arm/mach-omap2/control.c index 21ff32c6001a..4b4094685087 100644 --- a/arch/arm/mach-omap2/control.c +++ b/arch/arm/mach-omap2/control.c @@ -676,7 +676,7 @@ int __init omap_control_init(void) for_each_matching_node_and_match(np, omap_scrm_dt_match_table, &match) { data = match->data; - ret = omap2_clk_provider_init(np, data->index, data->mem); + ret = omap2_clk_provider_init(np, data->index, NULL, data->mem); if (ret) return ret; } diff --git a/arch/arm/mach-omap2/prm_common.c b/arch/arm/mach-omap2/prm_common.c index 6832a31e9a70..7add7994dbfc 100644 --- a/arch/arm/mach-omap2/prm_common.c +++ b/arch/arm/mach-omap2/prm_common.c @@ -798,7 +798,7 @@ int __init omap_prcm_init(void) for_each_matching_node_and_match(np, omap_prcm_dt_match_table, &match) { data = match->data; - ret = omap2_clk_provider_init(np, data->index, data->mem); + ret = omap2_clk_provider_init(np, data->index, NULL, data->mem); if (ret) return ret; } From ae0f6798474053eb76863fa9b3befd9deea58ba6 Mon Sep 17 00:00:00 2001 From: Tero Kristo Date: Fri, 6 Feb 2015 16:20:13 +0200 Subject: [PATCH 22/35] ARM: OMAP2+: control: remove API for getting control module base address This shall not be used anymore, as control module driver is converted into using regmap. Signed-off-by: Tero Kristo --- arch/arm/mach-omap2/control.c | 5 ----- arch/arm/mach-omap2/control.h | 2 -- 2 files changed, 7 deletions(-) diff --git a/arch/arm/mach-omap2/control.c b/arch/arm/mach-omap2/control.c index 4b4094685087..202fc725426b 100644 --- a/arch/arm/mach-omap2/control.c +++ b/arch/arm/mach-omap2/control.c @@ -145,11 +145,6 @@ void __init omap2_set_globals_control(void __iomem *ctrl, omap4_ctrl_pad_base = ctrl_pad; } -void __iomem *omap_ctrl_base_get(void) -{ - return omap2_ctrl_base; -} - u8 omap_ctrl_readb(u16 offset) { return readb_relaxed(OMAP_CTRL_REGADDR(offset)); diff --git a/arch/arm/mach-omap2/control.h b/arch/arm/mach-omap2/control.h index c1057eb9d4e4..5353ff45bf83 100644 --- a/arch/arm/mach-omap2/control.h +++ b/arch/arm/mach-omap2/control.h @@ -440,7 +440,6 @@ #ifndef __ASSEMBLY__ #ifdef CONFIG_ARCH_OMAP2PLUS -extern void __iomem *omap_ctrl_base_get(void); extern u8 omap_ctrl_readb(u16 offset); extern u16 omap_ctrl_readw(u16 offset); extern u32 omap_ctrl_readl(u16 offset); @@ -470,7 +469,6 @@ extern void omap2_set_globals_control(void __iomem *ctrl, void __iomem *ctrl_pad); void __init omap3_control_legacy_iomap_init(void); #else -#define omap_ctrl_base_get() 0 #define omap_ctrl_readb(x) 0 #define omap_ctrl_readw(x) 0 #define omap_ctrl_readl(x) 0 From 23d240d661f42214bd372c0e5b21afaf71b9329c Mon Sep 17 00:00:00 2001 From: Tero Kristo Date: Mon, 9 Feb 2015 16:17:38 +0200 Subject: [PATCH 23/35] ARM: OMAP2+: id: cache omap_type value There is no need to read the register with every invocation of the function, as the value is constant. Thus, cache the value in a static variable. Signed-off-by: Tero Kristo --- arch/arm/mach-omap2/id.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c index 2a2f4d56e4c8..f8121dbc9d48 100644 --- a/arch/arm/mach-omap2/id.c +++ b/arch/arm/mach-omap2/id.c @@ -52,7 +52,10 @@ EXPORT_SYMBOL(omap_rev); int omap_type(void) { - u32 val = 0; + static u32 val = OMAP2_DEVICETYPE_MASK; + + if (val < OMAP2_DEVICETYPE_MASK) + return val; if (cpu_is_omap24xx()) { val = omap_ctrl_readl(OMAP24XX_CONTROL_STATUS); From e5b635742e9824c8c0fc7fc524a24024cf88a448 Mon Sep 17 00:00:00 2001 From: Tero Kristo Date: Thu, 12 Feb 2015 11:24:11 +0200 Subject: [PATCH 24/35] ARM: OMAP2+: control: add syscon support for register accesses Control module driver needs to support syscon for register accesses, as the DT hierarchy for control module driver is going to be changed. All the control module related features will be moved under control module node, including clocks, pinctrl, and generic configuration register access. Temporary iomap is still provided very early in the boot for access while syscon is not yet ready. Signed-off-by: Tero Kristo --- arch/arm/mach-omap2/control.c | 104 ++++++++++++++++++++++++++++------ 1 file changed, 87 insertions(+), 17 deletions(-) diff --git a/arch/arm/mach-omap2/control.c b/arch/arm/mach-omap2/control.c index 202fc725426b..4970c5cb1a11 100644 --- a/arch/arm/mach-omap2/control.c +++ b/arch/arm/mach-omap2/control.c @@ -15,6 +15,8 @@ #include #include #include +#include +#include #include "soc.h" #include "iomap.h" @@ -33,7 +35,9 @@ #define PADCONF_SAVE_DONE 0x1 static void __iomem *omap2_ctrl_base; +static s16 omap2_ctrl_offset; static void __iomem *omap4_ctrl_pad_base; +static struct regmap *omap2_ctrl_syscon; #if defined(CONFIG_ARCH_OMAP3) && defined(CONFIG_PM) struct omap3_scratchpad { @@ -135,7 +139,6 @@ struct omap3_control_regs { static struct omap3_control_regs control_context; #endif /* CONFIG_ARCH_OMAP3 && CONFIG_PM */ -#define OMAP_CTRL_REGADDR(reg) (omap2_ctrl_base + (reg)) #define OMAP4_CTRL_PAD_REGADDR(reg) (omap4_ctrl_pad_base + (reg)) void __init omap2_set_globals_control(void __iomem *ctrl, @@ -147,32 +150,72 @@ void __init omap2_set_globals_control(void __iomem *ctrl, u8 omap_ctrl_readb(u16 offset) { - return readb_relaxed(OMAP_CTRL_REGADDR(offset)); + u32 val; + u8 byte_offset = offset & 0x3; + + val = omap_ctrl_readl(offset); + + return (val >> (byte_offset * 8)) & 0xff; } u16 omap_ctrl_readw(u16 offset) { - return readw_relaxed(OMAP_CTRL_REGADDR(offset)); + u32 val; + u16 byte_offset = offset & 0x2; + + val = omap_ctrl_readl(offset); + + return (val >> (byte_offset * 8)) & 0xffff; } u32 omap_ctrl_readl(u16 offset) { - return readl_relaxed(OMAP_CTRL_REGADDR(offset)); + u32 val; + + offset &= 0xfffc; + if (!omap2_ctrl_syscon) + val = readl_relaxed(omap2_ctrl_base + offset); + else + regmap_read(omap2_ctrl_syscon, omap2_ctrl_offset + offset, + &val); + + return val; } void omap_ctrl_writeb(u8 val, u16 offset) { - writeb_relaxed(val, OMAP_CTRL_REGADDR(offset)); + u32 tmp; + u8 byte_offset = offset & 0x3; + + tmp = omap_ctrl_readl(offset); + + tmp &= 0xffffffff ^ (0xff << (byte_offset * 8)); + tmp |= val << (byte_offset * 8); + + omap_ctrl_writel(tmp, offset); } void omap_ctrl_writew(u16 val, u16 offset) { - writew_relaxed(val, OMAP_CTRL_REGADDR(offset)); + u32 tmp; + u8 byte_offset = offset & 0x2; + + tmp = omap_ctrl_readl(offset); + + tmp &= 0xffffffff ^ (0xffff << (byte_offset * 8)); + tmp |= val << (byte_offset * 8); + + omap_ctrl_writel(tmp, offset); } void omap_ctrl_writel(u32 val, u16 offset) { - writel_relaxed(val, OMAP_CTRL_REGADDR(offset)); + offset &= 0xfffc; + if (!omap2_ctrl_syscon) + writel_relaxed(val, omap2_ctrl_base + offset); + else + regmap_write(omap2_ctrl_syscon, omap2_ctrl_offset + offset, + val); } /* @@ -611,7 +654,7 @@ void __init omap3_ctrl_init(void) struct control_init_data { int index; - void __iomem *mem; + s16 offset; }; static struct control_init_data ctrl_data = { @@ -639,17 +682,15 @@ int __init omap2_control_base_init(void) struct device_node *np; const struct of_device_id *match; struct control_init_data *data; - void __iomem *mem; for_each_matching_node_and_match(np, omap_scrm_dt_match_table, &match) { data = (struct control_init_data *)match->data; - mem = of_iomap(np, 0); - if (!mem) + omap2_ctrl_base = of_iomap(np, 0); + if (!omap2_ctrl_base) return -ENOMEM; - omap2_ctrl_base = mem; - data->mem = mem; + omap2_ctrl_offset = data->offset; } return 0; @@ -663,17 +704,46 @@ int __init omap2_control_base_init(void) */ int __init omap_control_init(void) { - struct device_node *np; + struct device_node *np, *scm_conf; const struct of_device_id *match; const struct omap_prcm_init_data *data; int ret; + struct regmap *syscon; for_each_matching_node_and_match(np, omap_scrm_dt_match_table, &match) { data = match->data; - ret = omap2_clk_provider_init(np, data->index, NULL, data->mem); - if (ret) - return ret; + /* + * Check if we have scm_conf node, if yes, use this to + * access clock registers. + */ + scm_conf = of_get_child_by_name(np, "scm_conf"); + + if (scm_conf) { + syscon = syscon_node_to_regmap(scm_conf); + + if (IS_ERR(syscon)) + return PTR_ERR(syscon); + + omap2_ctrl_syscon = syscon; + + if (of_get_child_by_name(scm_conf, "clocks")) { + ret = omap2_clk_provider_init(scm_conf, + data->index, + syscon, NULL); + if (ret) + return ret; + } + + iounmap(omap2_ctrl_base); + omap2_ctrl_base = NULL; + } else { + /* No scm_conf found, direct access */ + ret = omap2_clk_provider_init(np, data->index, NULL, + omap2_ctrl_base); + if (ret) + return ret; + } } return 0; From 72b10ac00eb1c154037e398371685d3f1d2d4793 Mon Sep 17 00:00:00 2001 From: Tero Kristo Date: Thu, 12 Feb 2015 10:38:16 +0200 Subject: [PATCH 25/35] ARM: dts: omap24xx: add minimal l4 bus layout with control module support This patch creates an l4 / l4-wkup interconnects for omap2420 / omap2430 SoCs, and moves some of the generic peripherals under it. System control module nodes are moved under this new interconnect also, and the SCM clock layout is changed to use the new SCM node as the clock provider. Signed-off-by: Tero Kristo --- .../devicetree/bindings/arm/omap/l4.txt | 17 +++ .../devicetree/bindings/arm/omap/prcm.txt | 2 +- arch/arm/boot/dts/omap2420.dtsi | 94 ++++++++------ arch/arm/boot/dts/omap2430-clocks.dtsi | 8 +- arch/arm/boot/dts/omap2430.dtsi | 115 ++++++++++-------- arch/arm/boot/dts/omap24xx-clocks.dtsi | 6 +- arch/arm/mach-omap2/control.c | 7 +- 7 files changed, 151 insertions(+), 98 deletions(-) create mode 100644 Documentation/devicetree/bindings/arm/omap/l4.txt diff --git a/Documentation/devicetree/bindings/arm/omap/l4.txt b/Documentation/devicetree/bindings/arm/omap/l4.txt new file mode 100644 index 000000000000..57569cc8df16 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/omap/l4.txt @@ -0,0 +1,17 @@ +L4 interconnect bindings + +These bindings describe the OMAP SoCs L4 interconnect bus. + +Required properties: +- compatible : Should be "ti,omap2-l4" for OMAP2 family l4 core bus + Should be "ti,omap2-l4-wkup" for OMAP2 family l4 wkup bus +- ranges : contains the IO map range for the bus + +Examples: + +l4: l4@48000000 { + compatible "ti,omap2-l4", "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x48000000 0x100000>; +}; diff --git a/Documentation/devicetree/bindings/arm/omap/prcm.txt b/Documentation/devicetree/bindings/arm/omap/prcm.txt index 68f96f8d3947..cce8365b66e8 100644 --- a/Documentation/devicetree/bindings/arm/omap/prcm.txt +++ b/Documentation/devicetree/bindings/arm/omap/prcm.txt @@ -14,7 +14,7 @@ Required properties: "ti,am4-prcm" "ti,am4-scrm" "ti,omap2-prcm" - "ti,omap2-scrm" + "ti,omap2-scm" "ti,omap3-prm" "ti,omap3-cm" "ti,omap3-scrm" diff --git a/arch/arm/boot/dts/omap2420.dtsi b/arch/arm/boot/dts/omap2420.dtsi index e2b2e93d7b61..5b9a376cc31e 100644 --- a/arch/arm/boot/dts/omap2420.dtsi +++ b/arch/arm/boot/dts/omap2420.dtsi @@ -14,45 +14,63 @@ compatible = "ti,omap2420", "ti,omap2"; ocp { - prcm: prcm@48008000 { - compatible = "ti,omap2-prcm"; - reg = <0x48008000 0x1000>; - - prcm_clocks: clocks { - #address-cells = <1>; - #size-cells = <0>; - }; - - prcm_clockdomains: clockdomains { - }; - }; - - scrm: scrm@48000000 { - compatible = "ti,omap2-scrm"; - reg = <0x48000000 0x1000>; - - scrm_clocks: clocks { - #address-cells = <1>; - #size-cells = <0>; - }; - - scrm_clockdomains: clockdomains { - }; - }; - - counter32k: counter@48004000 { - compatible = "ti,omap-counter32k"; - reg = <0x48004000 0x20>; - ti,hwmods = "counter_32k"; - }; - - omap2420_pmx: pinmux@48000030 { - compatible = "ti,omap2420-padconf", "pinctrl-single"; - reg = <0x48000030 0x0113>; + l4: l4@48000000 { + compatible = "ti,omap2-l4", "simple-bus"; #address-cells = <1>; - #size-cells = <0>; - pinctrl-single,register-width = <8>; - pinctrl-single,function-mask = <0x3f>; + #size-cells = <1>; + ranges = <0 0x48000000 0x100000>; + + prcm: prcm@8000 { + compatible = "ti,omap2-prcm"; + reg = <0x8000 0x1000>; + + prcm_clocks: clocks { + #address-cells = <1>; + #size-cells = <0>; + }; + + prcm_clockdomains: clockdomains { + }; + }; + + scm: scm@0 { + compatible = "ti,omap2-scm", "simple-bus"; + reg = <0x0 0x1000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x0 0x1000>; + + omap2420_pmx: pinmux@30 { + compatible = "ti,omap2420-padconf", + "pinctrl-single"; + reg = <0x30 0x0113>; + #address-cells = <1>; + #size-cells = <0>; + pinctrl-single,register-width = <8>; + pinctrl-single,function-mask = <0x3f>; + }; + + scm_conf: scm_conf@270 { + compatible = "syscon"; + reg = <0x270 0x100>; + #address-cells = <1>; + #size-cells = <1>; + + scm_clocks: clocks { + #address-cells = <1>; + #size-cells = <0>; + }; + }; + + scm_clockdomains: clockdomains { + }; + }; + + counter32k: counter@4000 { + compatible = "ti,omap-counter32k"; + reg = <0x4000 0x20>; + ti,hwmods = "counter_32k"; + }; }; gpio1: gpio@48018000 { diff --git a/arch/arm/boot/dts/omap2430-clocks.dtsi b/arch/arm/boot/dts/omap2430-clocks.dtsi index 805f75df1cf2..93fed68839b9 100644 --- a/arch/arm/boot/dts/omap2430-clocks.dtsi +++ b/arch/arm/boot/dts/omap2430-clocks.dtsi @@ -8,12 +8,12 @@ * published by the Free Software Foundation. */ -&scrm_clocks { +&scm_clocks { mcbsp3_mux_fck: mcbsp3_mux_fck { #clock-cells = <0>; compatible = "ti,composite-mux-clock"; clocks = <&func_96m_ck>, <&mcbsp_clks>; - reg = <0x02e8>; + reg = <0x78>; }; mcbsp3_fck: mcbsp3_fck { @@ -27,7 +27,7 @@ compatible = "ti,composite-mux-clock"; clocks = <&func_96m_ck>, <&mcbsp_clks>; ti,bit-shift = <2>; - reg = <0x02e8>; + reg = <0x78>; }; mcbsp4_fck: mcbsp4_fck { @@ -41,7 +41,7 @@ compatible = "ti,composite-mux-clock"; clocks = <&func_96m_ck>, <&mcbsp_clks>; ti,bit-shift = <4>; - reg = <0x02e8>; + reg = <0x78>; }; mcbsp5_fck: mcbsp5_fck { diff --git a/arch/arm/boot/dts/omap2430.dtsi b/arch/arm/boot/dts/omap2430.dtsi index 0dc8de2782b1..11a7963be003 100644 --- a/arch/arm/boot/dts/omap2430.dtsi +++ b/arch/arm/boot/dts/omap2430.dtsi @@ -14,60 +14,73 @@ compatible = "ti,omap2430", "ti,omap2"; ocp { - prcm: prcm@49006000 { - compatible = "ti,omap2-prcm"; - reg = <0x49006000 0x1000>; - - prcm_clocks: clocks { - #address-cells = <1>; - #size-cells = <0>; - }; - - prcm_clockdomains: clockdomains { - }; - }; - - scrm: scrm@49002000 { - compatible = "ti,omap2-scrm"; - reg = <0x49002000 0x1000>; - - scrm_clocks: clocks { - #address-cells = <1>; - #size-cells = <0>; - }; - - scrm_clockdomains: clockdomains { - }; - }; - - counter32k: counter@49020000 { - compatible = "ti,omap-counter32k"; - reg = <0x49020000 0x20>; - ti,hwmods = "counter_32k"; - }; - - omap2430_pmx: pinmux@49002030 { - compatible = "ti,omap2430-padconf", "pinctrl-single"; - reg = <0x49002030 0x0154>; + l4_wkup: l4_wkup@49000000 { + compatible = "ti,omap2-l4-wkup", "simple-bus"; #address-cells = <1>; - #size-cells = <0>; - pinctrl-single,register-width = <8>; - pinctrl-single,function-mask = <0x3f>; - }; + #size-cells = <1>; + ranges = <0 0x49000000 0x31000>; - omap2_scm_general: tisyscon@49002270 { - compatible = "syscon"; - reg = <0x49002270 0x240>; - }; + prcm: prcm@6000 { + compatible = "ti,omap2-prcm"; + reg = <0x6000 0x1000>; - pbias_regulator: pbias_regulator { - compatible = "ti,pbias-omap"; - reg = <0x230 0x4>; - syscon = <&omap2_scm_general>; - pbias_mmc_reg: pbias_mmc_omap2430 { - regulator-name = "pbias_mmc_omap2430"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3000000>; + prcm_clocks: clocks { + #address-cells = <1>; + #size-cells = <0>; + }; + + prcm_clockdomains: clockdomains { + }; + }; + + scm: scm@2000 { + compatible = "ti,omap2-scm", "simple-bus"; + reg = <0x2000 0x1000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x2000 0x1000>; + + omap2430_pmx: pinmux@30 { + compatible = "ti,omap2430-padconf", + "pinctrl-single"; + reg = <0x30 0x0154>; + #address-cells = <1>; + #size-cells = <0>; + pinctrl-single,register-width = <8>; + pinctrl-single,function-mask = <0x3f>; + }; + + scm_conf: scm_conf@270 { + compatible = "syscon"; + reg = <0x270 0x240>; + #address-cells = <1>; + #size-cells = <1>; + + scm_clocks: clocks { + #address-cells = <1>; + #size-cells = <0>; + }; + + pbias_regulator: pbias_regulator { + compatible = "ti,pbias-omap"; + reg = <0x230 0x4>; + syscon = <&scm_conf>; + pbias_mmc_reg: pbias_mmc_omap2430 { + regulator-name = "pbias_mmc_omap2430"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3000000>; + }; + }; + }; + + scm_clockdomains: clockdomains { + }; + }; + + counter32k: counter@20000 { + compatible = "ti,omap-counter32k"; + reg = <0x20000 0x20>; + ti,hwmods = "counter_32k"; }; }; diff --git a/arch/arm/boot/dts/omap24xx-clocks.dtsi b/arch/arm/boot/dts/omap24xx-clocks.dtsi index a1365ca926eb..63965b876973 100644 --- a/arch/arm/boot/dts/omap24xx-clocks.dtsi +++ b/arch/arm/boot/dts/omap24xx-clocks.dtsi @@ -7,13 +7,13 @@ * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ -&scrm_clocks { +&scm_clocks { mcbsp1_mux_fck: mcbsp1_mux_fck { #clock-cells = <0>; compatible = "ti,composite-mux-clock"; clocks = <&func_96m_ck>, <&mcbsp_clks>; ti,bit-shift = <2>; - reg = <0x0274>; + reg = <0x4>; }; mcbsp1_fck: mcbsp1_fck { @@ -27,7 +27,7 @@ compatible = "ti,composite-mux-clock"; clocks = <&func_96m_ck>, <&mcbsp_clks>; ti,bit-shift = <6>; - reg = <0x0274>; + reg = <0x4>; }; mcbsp2_fck: mcbsp2_fck { diff --git a/arch/arm/mach-omap2/control.c b/arch/arm/mach-omap2/control.c index 4970c5cb1a11..eb592ea51b78 100644 --- a/arch/arm/mach-omap2/control.c +++ b/arch/arm/mach-omap2/control.c @@ -661,10 +661,15 @@ static struct control_init_data ctrl_data = { .index = TI_CLKM_CTRL, }; +static const struct control_init_data omap2_ctrl_data = { + .index = TI_CLKM_CTRL, + .offset = -OMAP2_CONTROL_GENERAL, +}; + static const struct of_device_id omap_scrm_dt_match_table[] = { { .compatible = "ti,am3-scrm", .data = &ctrl_data }, { .compatible = "ti,am4-scrm", .data = &ctrl_data }, - { .compatible = "ti,omap2-scrm", .data = &ctrl_data }, + { .compatible = "ti,omap2-scm", .data = &omap2_ctrl_data }, { .compatible = "ti,omap3-scrm", .data = &ctrl_data }, { .compatible = "ti,dm816-scrm", .data = &ctrl_data }, { } From b8845074cfbbd1d1b46720a1b563d7b4240dac21 Mon Sep 17 00:00:00 2001 From: Tero Kristo Date: Tue, 24 Feb 2015 16:22:45 +0200 Subject: [PATCH 26/35] ARM: dts: omap3: add minimal l4 bus layout with control module support This patch creates an l4_core interconnect for OMAP3, and moves some of the generic peripherals under it. System control module nodes are moved under this new interconnect also, and the SCM clock layout is changed to use the renamed SCM node as the clock provider. Signed-off-by: Tero Kristo Reported-by: Tony Lindgren --- .../devicetree/bindings/arm/omap/l4.txt | 1 + .../devicetree/bindings/arm/omap/prcm.txt | 2 +- arch/arm/boot/dts/am3517.dtsi | 2 +- arch/arm/boot/dts/am35xx-clocks.dtsi | 2 +- arch/arm/boot/dts/omap3.dtsi | 96 +++++++++++-------- arch/arm/boot/dts/omap3xxx-clocks.dtsi | 13 +-- arch/arm/mach-omap2/control.c | 2 +- 7 files changed, 67 insertions(+), 51 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/omap/l4.txt b/Documentation/devicetree/bindings/arm/omap/l4.txt index 57569cc8df16..64020220024d 100644 --- a/Documentation/devicetree/bindings/arm/omap/l4.txt +++ b/Documentation/devicetree/bindings/arm/omap/l4.txt @@ -5,6 +5,7 @@ These bindings describe the OMAP SoCs L4 interconnect bus. Required properties: - compatible : Should be "ti,omap2-l4" for OMAP2 family l4 core bus Should be "ti,omap2-l4-wkup" for OMAP2 family l4 wkup bus + Should be "ti,omap3-l4-core" for OMAP3 family l4 core bus - ranges : contains the IO map range for the bus Examples: diff --git a/Documentation/devicetree/bindings/arm/omap/prcm.txt b/Documentation/devicetree/bindings/arm/omap/prcm.txt index cce8365b66e8..ef5a74be6148 100644 --- a/Documentation/devicetree/bindings/arm/omap/prcm.txt +++ b/Documentation/devicetree/bindings/arm/omap/prcm.txt @@ -17,7 +17,7 @@ Required properties: "ti,omap2-scm" "ti,omap3-prm" "ti,omap3-cm" - "ti,omap3-scrm" + "ti,omap3-scm" "ti,omap4-cm1" "ti,omap4-prm" "ti,omap4-cm2" diff --git a/arch/arm/boot/dts/am3517.dtsi b/arch/arm/boot/dts/am3517.dtsi index c90724bded10..f164dce08755 100644 --- a/arch/arm/boot/dts/am3517.dtsi +++ b/arch/arm/boot/dts/am3517.dtsi @@ -31,7 +31,7 @@ status = "disabled"; reg = <0x5c000000 0x30000>; interrupts = <67 68 69 70>; - syscon = <&omap3_scm_general>; + syscon = <&scm_conf>; ti,davinci-ctrl-reg-offset = <0x10000>; ti,davinci-ctrl-mod-reg-offset = <0>; ti,davinci-ctrl-ram-offset = <0x20000>; diff --git a/arch/arm/boot/dts/am35xx-clocks.dtsi b/arch/arm/boot/dts/am35xx-clocks.dtsi index df489d310b50..518b8fde88b0 100644 --- a/arch/arm/boot/dts/am35xx-clocks.dtsi +++ b/arch/arm/boot/dts/am35xx-clocks.dtsi @@ -7,7 +7,7 @@ * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ -&scrm_clocks { +&scm_clocks { emac_ick: emac_ick { #clock-cells = <0>; compatible = "ti,am35xx-gate-clock"; diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi index 01b71111bd55..b28791ade27a 100644 --- a/arch/arm/boot/dts/omap3.dtsi +++ b/arch/arm/boot/dts/omap3.dtsi @@ -87,6 +87,60 @@ ranges; ti,hwmods = "l3_main"; + l4_core: l4@48000000 { + compatible = "ti,omap3-l4-core", "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x48000000 0x1000000>; + + scm: scm@2000 { + compatible = "ti,omap3-scm", "simple-bus"; + reg = <0x2000 0x2000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x2000 0x2000>; + + omap3_pmx_core: pinmux@30 { + compatible = "ti,omap3-padconf", + "pinctrl-single"; + reg = <0x30 0x238>; + #address-cells = <1>; + #size-cells = <0>; + #interrupt-cells = <1>; + interrupt-controller; + pinctrl-single,register-width = <16>; + pinctrl-single,function-mask = <0xff1f>; + }; + + scm_conf: scm_conf@270 { + compatible = "syscon"; + reg = <0x270 0x330>; + #address-cells = <1>; + #size-cells = <1>; + + scm_clocks: clocks { + #address-cells = <1>; + #size-cells = <0>; + }; + }; + + scm_clockdomains: clockdomains { + }; + + omap3_pmx_wkup: pinmux@a00 { + compatible = "ti,omap3-padconf", + "pinctrl-single"; + reg = <0xa00 0x5c>; + #address-cells = <1>; + #size-cells = <0>; + #interrupt-cells = <1>; + interrupt-controller; + pinctrl-single,register-width = <16>; + pinctrl-single,function-mask = <0xff1f>; + }; + }; + }; + aes: aes@480c5000 { compatible = "ti,omap3-aes"; ti,hwmods = "aes"; @@ -121,19 +175,6 @@ }; }; - scrm: scrm@48002000 { - compatible = "ti,omap3-scrm"; - reg = <0x48002000 0x2000>; - - scrm_clocks: clocks { - #address-cells = <1>; - #size-cells = <0>; - }; - - scrm_clockdomains: clockdomains { - }; - }; - counter32k: counter@48320000 { compatible = "ti,omap-counter32k"; reg = <0x48320000 0x20>; @@ -159,37 +200,10 @@ #dma-requests = <96>; }; - omap3_pmx_core: pinmux@48002030 { - compatible = "ti,omap3-padconf", "pinctrl-single"; - reg = <0x48002030 0x0238>; - #address-cells = <1>; - #size-cells = <0>; - #interrupt-cells = <1>; - interrupt-controller; - pinctrl-single,register-width = <16>; - pinctrl-single,function-mask = <0xff1f>; - }; - - omap3_pmx_wkup: pinmux@48002a00 { - compatible = "ti,omap3-padconf", "pinctrl-single"; - reg = <0x48002a00 0x5c>; - #address-cells = <1>; - #size-cells = <0>; - #interrupt-cells = <1>; - interrupt-controller; - pinctrl-single,register-width = <16>; - pinctrl-single,function-mask = <0xff1f>; - }; - - omap3_scm_general: tisyscon@48002270 { - compatible = "syscon"; - reg = <0x48002270 0x2f0>; - }; - pbias_regulator: pbias_regulator { compatible = "ti,pbias-omap"; reg = <0x2b0 0x4>; - syscon = <&omap3_scm_general>; + syscon = <&scm_conf>; pbias_mmc_reg: pbias_mmc_omap2430 { regulator-name = "pbias_mmc_omap2430"; regulator-min-microvolt = <1800000>; diff --git a/arch/arm/boot/dts/omap3xxx-clocks.dtsi b/arch/arm/boot/dts/omap3xxx-clocks.dtsi index 5c375003bad1..bbba5bdc4bc9 100644 --- a/arch/arm/boot/dts/omap3xxx-clocks.dtsi +++ b/arch/arm/boot/dts/omap3xxx-clocks.dtsi @@ -79,13 +79,14 @@ clock-div = <1>; }; }; -&scrm_clocks { + +&scm_clocks { mcbsp5_mux_fck: mcbsp5_mux_fck { #clock-cells = <0>; compatible = "ti,composite-mux-clock"; clocks = <&core_96m_fck>, <&mcbsp_clks>; ti,bit-shift = <4>; - reg = <0x02d8>; + reg = <0x68>; }; mcbsp5_fck: mcbsp5_fck { @@ -99,7 +100,7 @@ compatible = "ti,composite-mux-clock"; clocks = <&core_96m_fck>, <&mcbsp_clks>; ti,bit-shift = <2>; - reg = <0x0274>; + reg = <0x04>; }; mcbsp1_fck: mcbsp1_fck { @@ -113,7 +114,7 @@ compatible = "ti,composite-mux-clock"; clocks = <&per_96m_fck>, <&mcbsp_clks>; ti,bit-shift = <6>; - reg = <0x0274>; + reg = <0x04>; }; mcbsp2_fck: mcbsp2_fck { @@ -126,7 +127,7 @@ #clock-cells = <0>; compatible = "ti,composite-mux-clock"; clocks = <&per_96m_fck>, <&mcbsp_clks>; - reg = <0x02d8>; + reg = <0x68>; }; mcbsp3_fck: mcbsp3_fck { @@ -140,7 +141,7 @@ compatible = "ti,composite-mux-clock"; clocks = <&per_96m_fck>, <&mcbsp_clks>; ti,bit-shift = <2>; - reg = <0x02d8>; + reg = <0x68>; }; mcbsp4_fck: mcbsp4_fck { diff --git a/arch/arm/mach-omap2/control.c b/arch/arm/mach-omap2/control.c index eb592ea51b78..30f5aff7645f 100644 --- a/arch/arm/mach-omap2/control.c +++ b/arch/arm/mach-omap2/control.c @@ -670,7 +670,7 @@ static const struct of_device_id omap_scrm_dt_match_table[] = { { .compatible = "ti,am3-scrm", .data = &ctrl_data }, { .compatible = "ti,am4-scrm", .data = &ctrl_data }, { .compatible = "ti,omap2-scm", .data = &omap2_ctrl_data }, - { .compatible = "ti,omap3-scrm", .data = &ctrl_data }, + { .compatible = "ti,omap3-scm", .data = &omap2_ctrl_data }, { .compatible = "ti,dm816-scrm", .data = &ctrl_data }, { } }; From e3bc5358e0977b95652625f9329ba68f1ebb1a42 Mon Sep 17 00:00:00 2001 From: Tero Kristo Date: Fri, 20 Mar 2015 13:08:29 +0200 Subject: [PATCH 27/35] ARM: dts: am33xx: add minimal l4 bus layout with control module support This patch creates an l4_wkup interconnect for AM33xx, and moves some of the generic peripherals under it. System control module nodes are moved under this new interconnect also, and the SCM clock layout is changed to use the renamed SCM node as the clock provider. Signed-off-by: Tero Kristo --- .../devicetree/bindings/arm/omap/l4.txt | 1 + .../devicetree/bindings/arm/omap/prcm.txt | 2 +- arch/arm/boot/dts/am33xx-clocks.dtsi | 2 +- arch/arm/boot/dts/am33xx.dtsi | 93 ++++++++++--------- arch/arm/mach-omap2/control.c | 2 +- 5 files changed, 54 insertions(+), 46 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/omap/l4.txt b/Documentation/devicetree/bindings/arm/omap/l4.txt index 64020220024d..d333f0a9044e 100644 --- a/Documentation/devicetree/bindings/arm/omap/l4.txt +++ b/Documentation/devicetree/bindings/arm/omap/l4.txt @@ -6,6 +6,7 @@ Required properties: - compatible : Should be "ti,omap2-l4" for OMAP2 family l4 core bus Should be "ti,omap2-l4-wkup" for OMAP2 family l4 wkup bus Should be "ti,omap3-l4-core" for OMAP3 family l4 core bus + Should be "ti,am3-l4-wkup" for AM33xx family l4 wkup bus - ranges : contains the IO map range for the bus Examples: diff --git a/Documentation/devicetree/bindings/arm/omap/prcm.txt b/Documentation/devicetree/bindings/arm/omap/prcm.txt index ef5a74be6148..c8e202763be8 100644 --- a/Documentation/devicetree/bindings/arm/omap/prcm.txt +++ b/Documentation/devicetree/bindings/arm/omap/prcm.txt @@ -10,7 +10,7 @@ documentation about the individual clock/clockdomain nodes. Required properties: - compatible: Must be one of: "ti,am3-prcm" - "ti,am3-scrm" + "ti,am3-scm" "ti,am4-prcm" "ti,am4-scrm" "ti,omap2-prcm" diff --git a/arch/arm/boot/dts/am33xx-clocks.dtsi b/arch/arm/boot/dts/am33xx-clocks.dtsi index 712edce7d6fb..236c78a3c6ca 100644 --- a/arch/arm/boot/dts/am33xx-clocks.dtsi +++ b/arch/arm/boot/dts/am33xx-clocks.dtsi @@ -7,7 +7,7 @@ * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ -&scrm_clocks { +&scm_clocks { sys_clkin_ck: sys_clkin_ck { #clock-cells = <0>; compatible = "ti,mux-clock"; diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi index acd37057bca9..21fcc440fc1a 100644 --- a/arch/arm/boot/dts/am33xx.dtsi +++ b/arch/arm/boot/dts/am33xx.dtsi @@ -83,20 +83,6 @@ }; }; - am33xx_control_module: control_module@4a002000 { - compatible = "syscon"; - reg = <0x44e10000 0x7fc>; - }; - - am33xx_pinmux: pinmux@44e10800 { - compatible = "pinctrl-single"; - reg = <0x44e10800 0x0238>; - #address-cells = <1>; - #size-cells = <0>; - pinctrl-single,register-width = <32>; - pinctrl-single,function-mask = <0x7f>; - }; - /* * XXX: Use a flat representation of the AM33XX interconnect. * The real AM33XX interconnect network is quite complex. Since @@ -111,35 +97,56 @@ ranges; ti,hwmods = "l3_main"; - prcm: prcm@44e00000 { - compatible = "ti,am3-prcm"; - reg = <0x44e00000 0x4000>; + l4_wkup: l4_wkup@44c00000 { + compatible = "ti,am3-l4-wkup", "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x44c00000 0x280000>; - prcm_clocks: clocks { + prcm: prcm@200000 { + compatible = "ti,am3-prcm"; + reg = <0x200000 0x4000>; + + prcm_clocks: clocks { + #address-cells = <1>; + #size-cells = <0>; + }; + + prcm_clockdomains: clockdomains { + }; + }; + + scm: scm@210000 { + compatible = "ti,am3-scm", "simple-bus"; + reg = <0x210000 0x2000>; #address-cells = <1>; - #size-cells = <0>; + #size-cells = <1>; + ranges = <0 0x210000 0x2000>; + + am33xx_pinmux: pinmux@800 { + compatible = "pinctrl-single"; + reg = <0x800 0x238>; + #address-cells = <1>; + #size-cells = <0>; + pinctrl-single,register-width = <32>; + pinctrl-single,function-mask = <0x7f>; + }; + + scm_conf: scm_conf@0 { + compatible = "syscon"; + reg = <0x0 0x800>; + #address-cells = <1>; + #size-cells = <1>; + + scm_clocks: clocks { + #address-cells = <1>; + #size-cells = <0>; + }; + }; + + scm_clockdomains: clockdomains { + }; }; - - prcm_clockdomains: clockdomains { - }; - }; - - scrm: scrm@44e10000 { - compatible = "ti,am3-scrm"; - reg = <0x44e10000 0x2000>; - - scrm_clocks: clocks { - #address-cells = <1>; - #size-cells = <0>; - }; - - scrm_clockdomains: clockdomains { - }; - }; - - cm: syscon@44e10000 { - compatible = "ti,am33xx-controlmodule", "syscon"; - reg = <0x44e10000 0x800>; }; intc: interrupt-controller@48200000 { @@ -350,7 +357,7 @@ reg = <0x481cc000 0x2000>; clocks = <&dcan0_fck>; clock-names = "fck"; - syscon-raminit = <&am33xx_control_module 0x644 0>; + syscon-raminit = <&scm_conf 0x644 0>; interrupts = <52>; status = "disabled"; }; @@ -361,7 +368,7 @@ reg = <0x481d0000 0x2000>; clocks = <&dcan1_fck>; clock-names = "fck"; - syscon-raminit = <&am33xx_control_module 0x644 1>; + syscon-raminit = <&scm_conf 0x644 1>; interrupts = <55>; status = "disabled"; }; @@ -720,7 +727,7 @@ */ interrupts = <40 41 42 43>; ranges; - syscon = <&cm>; + syscon = <&scm_conf>; status = "disabled"; davinci_mdio: mdio@4a101000 { diff --git a/arch/arm/mach-omap2/control.c b/arch/arm/mach-omap2/control.c index 30f5aff7645f..477e2c8f26a6 100644 --- a/arch/arm/mach-omap2/control.c +++ b/arch/arm/mach-omap2/control.c @@ -667,7 +667,7 @@ static const struct control_init_data omap2_ctrl_data = { }; static const struct of_device_id omap_scrm_dt_match_table[] = { - { .compatible = "ti,am3-scrm", .data = &ctrl_data }, + { .compatible = "ti,am3-scm", .data = &ctrl_data }, { .compatible = "ti,am4-scrm", .data = &ctrl_data }, { .compatible = "ti,omap2-scm", .data = &omap2_ctrl_data }, { .compatible = "ti,omap3-scm", .data = &omap2_ctrl_data }, From d7eaf3c40d8d7e9cd133f0aec85fdca0d546cc1b Mon Sep 17 00:00:00 2001 From: Tero Kristo Date: Wed, 25 Feb 2015 15:03:57 +0200 Subject: [PATCH 28/35] ARM: dts: am43xx-epos-evm: fix pinmux node layout Pinmux node should be a reference to the base one, not a complete re-write of it. Having the node like this also prevents modifying the node layout in the base am4372.dtsi file, which is needed for control module changes. Signed-off-by: Tero Kristo --- arch/arm/boot/dts/am43x-epos-evm.dts | 84 ++++++++++++++-------------- 1 file changed, 42 insertions(+), 42 deletions(-) diff --git a/arch/arm/boot/dts/am43x-epos-evm.dts b/arch/arm/boot/dts/am43x-epos-evm.dts index 257c099c347e..72f01bb5d61c 100644 --- a/arch/arm/boot/dts/am43x-epos-evm.dts +++ b/arch/arm/boot/dts/am43x-epos-evm.dts @@ -69,7 +69,48 @@ }; }; - am43xx_pinmux: pinmux@44e10800 { + matrix_keypad: matrix_keypad@0 { + compatible = "gpio-matrix-keypad"; + debounce-delay-ms = <5>; + col-scan-delay-us = <2>; + + row-gpios = <&gpio0 12 GPIO_ACTIVE_HIGH /* Bank0, pin12 */ + &gpio0 13 GPIO_ACTIVE_HIGH /* Bank0, pin13 */ + &gpio0 14 GPIO_ACTIVE_HIGH /* Bank0, pin14 */ + &gpio0 15 GPIO_ACTIVE_HIGH>; /* Bank0, pin15 */ + + col-gpios = <&gpio3 9 GPIO_ACTIVE_HIGH /* Bank3, pin9 */ + &gpio3 10 GPIO_ACTIVE_HIGH /* Bank3, pin10 */ + &gpio2 18 GPIO_ACTIVE_HIGH /* Bank2, pin18 */ + &gpio2 19 GPIO_ACTIVE_HIGH>; /* Bank2, pin19 */ + + linux,keymap = <0x00000201 /* P1 */ + 0x01000204 /* P4 */ + 0x02000207 /* P7 */ + 0x0300020a /* NUMERIC_STAR */ + 0x00010202 /* P2 */ + 0x01010205 /* P5 */ + 0x02010208 /* P8 */ + 0x03010200 /* P0 */ + 0x00020203 /* P3 */ + 0x01020206 /* P6 */ + 0x02020209 /* P9 */ + 0x0302020b /* NUMERIC_POUND */ + 0x00030067 /* UP */ + 0x0103006a /* RIGHT */ + 0x0203006c /* DOWN */ + 0x03030069>; /* LEFT */ + }; + + backlight { + compatible = "pwm-backlight"; + pwms = <&ecap0 0 50000 PWM_POLARITY_INVERTED>; + brightness-levels = <0 51 53 56 62 75 101 152 255>; + default-brightness-level = <8>; + }; +}; + +&am43xx_pinmux { cpsw_default: cpsw_default { pinctrl-single,pins = < /* Slave 1 */ @@ -279,47 +320,6 @@ 0x204 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) >; }; - }; - - matrix_keypad: matrix_keypad@0 { - compatible = "gpio-matrix-keypad"; - debounce-delay-ms = <5>; - col-scan-delay-us = <2>; - - row-gpios = <&gpio0 12 GPIO_ACTIVE_HIGH /* Bank0, pin12 */ - &gpio0 13 GPIO_ACTIVE_HIGH /* Bank0, pin13 */ - &gpio0 14 GPIO_ACTIVE_HIGH /* Bank0, pin14 */ - &gpio0 15 GPIO_ACTIVE_HIGH>; /* Bank0, pin15 */ - - col-gpios = <&gpio3 9 GPIO_ACTIVE_HIGH /* Bank3, pin9 */ - &gpio3 10 GPIO_ACTIVE_HIGH /* Bank3, pin10 */ - &gpio2 18 GPIO_ACTIVE_HIGH /* Bank2, pin18 */ - &gpio2 19 GPIO_ACTIVE_HIGH>; /* Bank2, pin19 */ - - linux,keymap = <0x00000201 /* P1 */ - 0x01000204 /* P4 */ - 0x02000207 /* P7 */ - 0x0300020a /* NUMERIC_STAR */ - 0x00010202 /* P2 */ - 0x01010205 /* P5 */ - 0x02010208 /* P8 */ - 0x03010200 /* P0 */ - 0x00020203 /* P3 */ - 0x01020206 /* P6 */ - 0x02020209 /* P9 */ - 0x0302020b /* NUMERIC_POUND */ - 0x00030067 /* UP */ - 0x0103006a /* RIGHT */ - 0x0203006c /* DOWN */ - 0x03030069>; /* LEFT */ - }; - - backlight { - compatible = "pwm-backlight"; - pwms = <&ecap0 0 50000 PWM_POLARITY_INVERTED>; - brightness-levels = <0 51 53 56 62 75 101 152 255>; - default-brightness-level = <8>; - }; }; &mmc1 { From 83a5d6c98af24bb4531dfc05e7c2d3ac2562c6d9 Mon Sep 17 00:00:00 2001 From: Tero Kristo Date: Thu, 12 Feb 2015 10:25:40 +0200 Subject: [PATCH 29/35] ARM: dts: am4372: add minimal l4 bus layout with control module support This patch creates an l4_wkup interconnect for AM43xx, and moves some of the generic peripherals under it. System control module nodes are moved under this new interconnect also, and the SCM clock layout is changed to use the renamed SCM nodea as the clock provider. Signed-off-by: Tero Kristo --- .../devicetree/bindings/arm/omap/l4.txt | 1 + .../devicetree/bindings/arm/omap/prcm.txt | 2 +- arch/arm/boot/dts/am4372.dtsi | 83 +++++++++++-------- arch/arm/boot/dts/am43xx-clocks.dtsi | 2 +- arch/arm/mach-omap2/control.c | 2 +- 5 files changed, 52 insertions(+), 38 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/omap/l4.txt b/Documentation/devicetree/bindings/arm/omap/l4.txt index d333f0a9044e..941b914eb8cf 100644 --- a/Documentation/devicetree/bindings/arm/omap/l4.txt +++ b/Documentation/devicetree/bindings/arm/omap/l4.txt @@ -7,6 +7,7 @@ Required properties: Should be "ti,omap2-l4-wkup" for OMAP2 family l4 wkup bus Should be "ti,omap3-l4-core" for OMAP3 family l4 core bus Should be "ti,am3-l4-wkup" for AM33xx family l4 wkup bus + Should be "ti,am4-l4-wkup" for AM43xx family l4 wkup bus - ranges : contains the IO map range for the bus Examples: diff --git a/Documentation/devicetree/bindings/arm/omap/prcm.txt b/Documentation/devicetree/bindings/arm/omap/prcm.txt index c8e202763be8..8af4f325ee23 100644 --- a/Documentation/devicetree/bindings/arm/omap/prcm.txt +++ b/Documentation/devicetree/bindings/arm/omap/prcm.txt @@ -12,7 +12,7 @@ Required properties: "ti,am3-prcm" "ti,am3-scm" "ti,am4-prcm" - "ti,am4-scrm" + "ti,am4-scm" "ti,omap2-prcm" "ti,omap2-scm" "ti,omap3-prm" diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi index 1943fc333e7c..f8a02a295e08 100644 --- a/arch/arm/boot/dts/am4372.dtsi +++ b/arch/arm/boot/dts/am4372.dtsi @@ -57,22 +57,6 @@ cache-level = <2>; }; - am43xx_control_module: control_module@4a002000 { - compatible = "syscon"; - reg = <0x44e10000 0x7f4>; - }; - - am43xx_pinmux: pinmux@44e10800 { - compatible = "ti,am437-padconf", "pinctrl-single"; - reg = <0x44e10800 0x31c>; - #address-cells = <1>; - #size-cells = <0>; - #interrupt-cells = <1>; - interrupt-controller; - pinctrl-single,register-width = <32>; - pinctrl-single,function-mask = <0xffffffff>; - }; - ocp { compatible = "ti,am4372-l3-noc", "simple-bus"; #address-cells = <1>; @@ -84,29 +68,58 @@ interrupts = , ; - prcm: prcm@44df0000 { - compatible = "ti,am4-prcm"; - reg = <0x44df0000 0x11000>; + l4_wkup: l4_wkup@44c00000 { + compatible = "ti,am4-l4-wkup", "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x44c00000 0x287000>; - prcm_clocks: clocks { + prcm: prcm@1f0000 { + compatible = "ti,am4-prcm"; + reg = <0x1f0000 0x11000>; + + prcm_clocks: clocks { + #address-cells = <1>; + #size-cells = <0>; + }; + + prcm_clockdomains: clockdomains { + }; + }; + + scm: scm@210000 { + compatible = "ti,am4-scm", "simple-bus"; + reg = <0x210000 0x4000>; #address-cells = <1>; - #size-cells = <0>; - }; + #size-cells = <1>; + ranges = <0 0x210000 0x4000>; - prcm_clockdomains: clockdomains { - }; - }; + am43xx_pinmux: pinmux@800 { + compatible = "ti,am437-padconf", + "pinctrl-single"; + reg = <0x800 0x31c>; + #address-cells = <1>; + #size-cells = <0>; + #interrupt-cells = <1>; + interrupt-controller; + pinctrl-single,register-width = <32>; + pinctrl-single,function-mask = <0xffffffff>; + }; - scrm: scrm@44e10000 { - compatible = "ti,am4-scrm"; - reg = <0x44e10000 0x2000>; + scm_conf: scm_conf@0 { + compatible = "syscon"; + reg = <0x0 0x800>; + #address-cells = <1>; + #size-cells = <1>; - scrm_clocks: clocks { - #address-cells = <1>; - #size-cells = <0>; - }; + scm_clocks: clocks { + #address-cells = <1>; + #size-cells = <0>; + }; + }; - scrm_clockdomains: clockdomains { + scm_clockdomains: clockdomains { + }; }; }; @@ -933,7 +946,7 @@ clocks = <&dcan0_fck>; clock-names = "fck"; reg = <0x481cc000 0x2000>; - syscon-raminit = <&am43xx_control_module 0x644 0>; + syscon-raminit = <&scm_conf 0x644 0>; interrupts = ; status = "disabled"; }; @@ -944,7 +957,7 @@ clocks = <&dcan1_fck>; clock-names = "fck"; reg = <0x481d0000 0x2000>; - syscon-raminit = <&am43xx_control_module 0x644 1>; + syscon-raminit = <&scm_conf 0x644 1>; interrupts = ; status = "disabled"; }; diff --git a/arch/arm/boot/dts/am43xx-clocks.dtsi b/arch/arm/boot/dts/am43xx-clocks.dtsi index c7dc9dab93a4..44869aa72642 100644 --- a/arch/arm/boot/dts/am43xx-clocks.dtsi +++ b/arch/arm/boot/dts/am43xx-clocks.dtsi @@ -7,7 +7,7 @@ * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ -&scrm_clocks { +&scm_clocks { sys_clkin_ck: sys_clkin_ck { #clock-cells = <0>; compatible = "ti,mux-clock"; diff --git a/arch/arm/mach-omap2/control.c b/arch/arm/mach-omap2/control.c index 477e2c8f26a6..404778449ef7 100644 --- a/arch/arm/mach-omap2/control.c +++ b/arch/arm/mach-omap2/control.c @@ -668,7 +668,7 @@ static const struct control_init_data omap2_ctrl_data = { static const struct of_device_id omap_scrm_dt_match_table[] = { { .compatible = "ti,am3-scm", .data = &ctrl_data }, - { .compatible = "ti,am4-scrm", .data = &ctrl_data }, + { .compatible = "ti,am4-scm", .data = &ctrl_data }, { .compatible = "ti,omap2-scm", .data = &omap2_ctrl_data }, { .compatible = "ti,omap3-scm", .data = &omap2_ctrl_data }, { .compatible = "ti,dm816-scrm", .data = &ctrl_data }, From 7415b0b4c645fe9897352f144f056fd557526667 Mon Sep 17 00:00:00 2001 From: Tero Kristo Date: Thu, 12 Feb 2015 11:32:14 +0200 Subject: [PATCH 30/35] ARM: dts: omap4: add minimal l4 bus layout with control module support This patch creates the l4_cfg and l4_wkup interconnects for OMAP4, and moves some of the generic peripherals under it. System control module support is added to the device tree also, and the existing SCM related functionality is moved under it. Signed-off-by: Tero Kristo Reported-by: Tony Lindgren --- .../devicetree/bindings/arm/omap/ctrl.txt | 76 ++++++ .../devicetree/bindings/arm/omap/l4.txt | 2 + .../devicetree/bindings/arm/omap/prcm.txt | 6 - arch/arm/boot/dts/omap4.dtsi | 222 +++++++++++------- 4 files changed, 210 insertions(+), 96 deletions(-) create mode 100644 Documentation/devicetree/bindings/arm/omap/ctrl.txt diff --git a/Documentation/devicetree/bindings/arm/omap/ctrl.txt b/Documentation/devicetree/bindings/arm/omap/ctrl.txt new file mode 100644 index 000000000000..26758812ae17 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/omap/ctrl.txt @@ -0,0 +1,76 @@ +OMAP Control Module bindings + +Control Module contains miscellaneous features under it based on SoC type. +Pincontrol is one common feature, and it has a specialized support +described in [1]. Typically some clock nodes are also under control module. +Syscon is used to share register level access to drivers external to +control module driver itself. + +See [2] for documentation about clock/clockdomain nodes. + +[1] Documentation/devicetree/bindings/pinctrl/pinctrl-single.txt +[2] Documentation/devicetree/bindings/clock/ti/* + +Required properties: +- compatible: Must be one of: + "ti,am3-scm" + "ti,am4-scm" + "ti,dm814-scrm" + "ti,dm816-scrm" + "ti,omap2-scm" + "ti,omap3-scm" + "ti,omap4-scm-core" + "ti,omap4-scm-padconf-core" +- reg: Contains Control Module register address range + (base address and length) + +Optional properties: +- clocks: clocks for this module +- clockdomains: clockdomains for this module + +Examples: + +scm: scm@2000 { + compatible = "ti,omap3-scm", "simple-bus"; + reg = <0x2000 0x2000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x2000 0x2000>; + + omap3_pmx_core: pinmux@30 { + compatible = "ti,omap3-padconf", + "pinctrl-single"; + reg = <0x30 0x230>; + #address-cells = <1>; + #size-cells = <0>; + #interrupt-cells = <1>; + interrupt-controller; + pinctrl-single,register-width = <16>; + pinctrl-single,function-mask = <0xff1f>; + }; + + scm_conf: scm_conf@270 { + compatible = "syscon"; + reg = <0x270 0x330>; + #address-cells = <1>; + #size-cells = <1>; + + scm_clocks: clocks { + #address-cells = <1>; + #size-cells = <0>; + }; + }; + + scm_clockdomains: clockdomains { + }; +} + +&scm_clocks { + mcbsp5_mux_fck: mcbsp5_mux_fck { + #clock-cells = <0>; + compatible = "ti,composite-mux-clock"; + clocks = <&core_96m_fck>, <&mcbsp_clks>; + ti,bit-shift = <4>; + reg = <0x02d8>; + }; +}; diff --git a/Documentation/devicetree/bindings/arm/omap/l4.txt b/Documentation/devicetree/bindings/arm/omap/l4.txt index 941b914eb8cf..de18cfaf9f68 100644 --- a/Documentation/devicetree/bindings/arm/omap/l4.txt +++ b/Documentation/devicetree/bindings/arm/omap/l4.txt @@ -6,6 +6,8 @@ Required properties: - compatible : Should be "ti,omap2-l4" for OMAP2 family l4 core bus Should be "ti,omap2-l4-wkup" for OMAP2 family l4 wkup bus Should be "ti,omap3-l4-core" for OMAP3 family l4 core bus + Should be "ti,omap4-l4-cfg" for OMAP4 family l4 cfg bus + Should be "ti,omap4-l4-wkup" for OMAP4 family l4 wkup bus Should be "ti,am3-l4-wkup" for AM33xx family l4 wkup bus Should be "ti,am4-l4-wkup" for AM43xx family l4 wkup bus - ranges : contains the IO map range for the bus diff --git a/Documentation/devicetree/bindings/arm/omap/prcm.txt b/Documentation/devicetree/bindings/arm/omap/prcm.txt index 8af4f325ee23..3eb6d7afff14 100644 --- a/Documentation/devicetree/bindings/arm/omap/prcm.txt +++ b/Documentation/devicetree/bindings/arm/omap/prcm.txt @@ -10,14 +10,10 @@ documentation about the individual clock/clockdomain nodes. Required properties: - compatible: Must be one of: "ti,am3-prcm" - "ti,am3-scm" "ti,am4-prcm" - "ti,am4-scm" "ti,omap2-prcm" - "ti,omap2-scm" "ti,omap3-prm" "ti,omap3-cm" - "ti,omap3-scm" "ti,omap4-cm1" "ti,omap4-prm" "ti,omap4-cm2" @@ -30,9 +26,7 @@ Required properties: "ti,dra7-cm-core-aon" "ti,dra7-cm-core" "ti,dm814-prcm" - "ti,dm814-scrm" "ti,dm816-prcm" - "ti,dm816-scrm" - reg: Contains PRCM module register address range (base address and length) - clocks: clocks for this module diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi index 074147cebae4..546681a9cb65 100644 --- a/arch/arm/boot/dts/omap4.dtsi +++ b/arch/arm/boot/dts/omap4.dtsi @@ -114,99 +114,141 @@ interrupts = , ; - cm1: cm1@4a004000 { - compatible = "ti,omap4-cm1"; - reg = <0x4a004000 0x2000>; - - cm1_clocks: clocks { - #address-cells = <1>; - #size-cells = <0>; - }; - - cm1_clockdomains: clockdomains { - }; - }; - - prm: prm@4a306000 { - compatible = "ti,omap4-prm"; - reg = <0x4a306000 0x3000>; - interrupts = ; - - prm_clocks: clocks { - #address-cells = <1>; - #size-cells = <0>; - }; - - prm_clockdomains: clockdomains { - }; - }; - - cm2: cm2@4a008000 { - compatible = "ti,omap4-cm2"; - reg = <0x4a008000 0x3000>; - - cm2_clocks: clocks { - #address-cells = <1>; - #size-cells = <0>; - }; - - cm2_clockdomains: clockdomains { - }; - }; - - scrm: scrm@4a30a000 { - compatible = "ti,omap4-scrm"; - reg = <0x4a30a000 0x2000>; - - scrm_clocks: clocks { - #address-cells = <1>; - #size-cells = <0>; - }; - - scrm_clockdomains: clockdomains { - }; - }; - - counter32k: counter@4a304000 { - compatible = "ti,omap-counter32k"; - reg = <0x4a304000 0x20>; - ti,hwmods = "counter_32k"; - }; - - omap4_pmx_core: pinmux@4a100040 { - compatible = "ti,omap4-padconf", "pinctrl-single"; - reg = <0x4a100040 0x0196>; + l4_cfg: l4@4a000000 { + compatible = "ti,omap4-l4-cfg", "simple-bus"; #address-cells = <1>; - #size-cells = <0>; - #interrupt-cells = <1>; - interrupt-controller; - pinctrl-single,register-width = <16>; - pinctrl-single,function-mask = <0x7fff>; - }; - omap4_pmx_wkup: pinmux@4a31e040 { - compatible = "ti,omap4-padconf", "pinctrl-single"; - reg = <0x4a31e040 0x0038>; - #address-cells = <1>; - #size-cells = <0>; - #interrupt-cells = <1>; - interrupt-controller; - pinctrl-single,register-width = <16>; - pinctrl-single,function-mask = <0x7fff>; - }; + #size-cells = <1>; + ranges = <0 0x4a000000 0x1000000>; - omap4_padconf_global: tisyscon@4a1005a0 { - compatible = "syscon"; - reg = <0x4a1005a0 0x170>; - }; + cm1: cm1@4000 { + compatible = "ti,omap4-cm1"; + reg = <0x4000 0x2000>; - pbias_regulator: pbias_regulator { - compatible = "ti,pbias-omap"; - reg = <0x60 0x4>; - syscon = <&omap4_padconf_global>; - pbias_mmc_reg: pbias_mmc_omap4 { - regulator-name = "pbias_mmc_omap4"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3000000>; + cm1_clocks: clocks { + #address-cells = <1>; + #size-cells = <0>; + }; + + cm1_clockdomains: clockdomains { + }; + }; + + cm2: cm2@8000 { + compatible = "ti,omap4-cm2"; + reg = <0x8000 0x3000>; + + cm2_clocks: clocks { + #address-cells = <1>; + #size-cells = <0>; + }; + + cm2_clockdomains: clockdomains { + }; + }; + + omap4_scm_core: scm@2000 { + compatible = "ti,omap4-scm-core", "simple-bus"; + reg = <0x2000 0x1000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x2000 0x1000>; + + scm_conf: scm_conf@0 { + compatible = "syscon"; + reg = <0x0 0x800>; + #address-cells = <1>; + #size-cells = <1>; + }; + }; + + omap4_padconf_core: scm@100000 { + compatible = "ti,omap4-scm-padconf-core", + "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x100000 0x1000>; + + omap4_pmx_core: pinmux@40 { + compatible = "ti,omap4-padconf", + "pinctrl-single"; + reg = <0x40 0x0196>; + #address-cells = <1>; + #size-cells = <0>; + #interrupt-cells = <1>; + interrupt-controller; + pinctrl-single,register-width = <16>; + pinctrl-single,function-mask = <0x7fff>; + }; + + omap4_padconf_global: omap4_padconf_global@5a0 { + compatible = "syscon"; + reg = <0x5a0 0x170>; + #address-cells = <1>; + #size-cells = <1>; + + pbias_regulator: pbias_regulator { + compatible = "ti,pbias-omap"; + reg = <0x60 0x4>; + syscon = <&omap4_padconf_global>; + pbias_mmc_reg: pbias_mmc_omap4 { + regulator-name = "pbias_mmc_omap4"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3000000>; + }; + }; + }; + }; + + l4_wkup: l4@300000 { + compatible = "ti,omap4-l4-wkup", "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x300000 0x40000>; + + counter32k: counter@4000 { + compatible = "ti,omap-counter32k"; + reg = <0x4000 0x20>; + ti,hwmods = "counter_32k"; + }; + + prm: prm@6000 { + compatible = "ti,omap4-prm"; + reg = <0x6000 0x3000>; + interrupts = ; + + prm_clocks: clocks { + #address-cells = <1>; + #size-cells = <0>; + }; + + prm_clockdomains: clockdomains { + }; + }; + + scrm: scrm@a000 { + compatible = "ti,omap4-scrm"; + reg = <0xa000 0x2000>; + + scrm_clocks: clocks { + #address-cells = <1>; + #size-cells = <0>; + }; + + scrm_clockdomains: clockdomains { + }; + }; + + omap4_pmx_wkup: pinmux@1e040 { + compatible = "ti,omap4-padconf", + "pinctrl-single"; + reg = <0x1e040 0x0038>; + #address-cells = <1>; + #size-cells = <0>; + #interrupt-cells = <1>; + interrupt-controller; + pinctrl-single,register-width = <16>; + pinctrl-single,function-mask = <0x7fff>; + }; }; }; From 23d34981c7e36fb609d3eaacf0a52a05d75ae008 Mon Sep 17 00:00:00 2001 From: Tero Kristo Date: Thu, 19 Feb 2015 12:42:59 +0200 Subject: [PATCH 31/35] ARM: OMAP4: display: convert display to use syscon for dsi muxing The legacy control module APIs will be gone, thus convert the display driver to use syscon. This change should eventually be moved to display driver from the board directory. Signed-off-by: Tero Kristo Cc: Tomi Valkeinen --- arch/arm/mach-omap2/display.c | 15 +++++++++++++-- 1 file changed, 13 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-omap2/display.c b/arch/arm/mach-omap2/display.c index 7a050f9c37ff..f492ae147c6a 100644 --- a/arch/arm/mach-omap2/display.c +++ b/arch/arm/mach-omap2/display.c @@ -26,6 +26,8 @@ #include #include #include +#include +#include #include