clk: divider: Make divider_round_rate take the parent clock
So far, divider_round_rate only considers the parent clock returned by clk_hw_get_parent. This works fine on clocks that have a single parents, this doesn't work on muxes, since we will only consider the first parent, while other parents may totally be able to provide a better combination. Clocks in that case cannot use divider_round_rate, so would have to come up with a very similar logic to work around it. Instead of having to do something like this, and duplicate that logic everywhere, create a divider_round_rate parent to allow caller to give an additional parameter for the parent clock to consider. Reviewed-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
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@ -275,7 +275,8 @@ static int _next_div(const struct clk_div_table *table, int div,
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return div;
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return div;
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}
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}
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static int clk_divider_bestdiv(struct clk_hw *hw, unsigned long rate,
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static int clk_divider_bestdiv(struct clk_hw *hw, struct clk_hw *parent,
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unsigned long rate,
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unsigned long *best_parent_rate,
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unsigned long *best_parent_rate,
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const struct clk_div_table *table, u8 width,
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const struct clk_div_table *table, u8 width,
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unsigned long flags)
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unsigned long flags)
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@ -314,8 +315,7 @@ static int clk_divider_bestdiv(struct clk_hw *hw, unsigned long rate,
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*best_parent_rate = parent_rate_saved;
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*best_parent_rate = parent_rate_saved;
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return i;
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return i;
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}
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}
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parent_rate = clk_hw_round_rate(clk_hw_get_parent(hw),
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parent_rate = clk_hw_round_rate(parent, rate * i);
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rate * i);
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now = DIV_ROUND_UP_ULL((u64)parent_rate, i);
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now = DIV_ROUND_UP_ULL((u64)parent_rate, i);
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if (_is_best_div(rate, now, best, flags)) {
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if (_is_best_div(rate, now, best, flags)) {
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bestdiv = i;
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bestdiv = i;
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@ -326,23 +326,24 @@ static int clk_divider_bestdiv(struct clk_hw *hw, unsigned long rate,
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if (!bestdiv) {
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if (!bestdiv) {
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bestdiv = _get_maxdiv(table, width, flags);
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bestdiv = _get_maxdiv(table, width, flags);
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*best_parent_rate = clk_hw_round_rate(clk_hw_get_parent(hw), 1);
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*best_parent_rate = clk_hw_round_rate(parent, 1);
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}
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}
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return bestdiv;
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return bestdiv;
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}
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}
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long divider_round_rate(struct clk_hw *hw, unsigned long rate,
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long divider_round_rate_parent(struct clk_hw *hw, struct clk_hw *parent,
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unsigned long *prate, const struct clk_div_table *table,
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unsigned long rate, unsigned long *prate,
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u8 width, unsigned long flags)
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const struct clk_div_table *table,
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u8 width, unsigned long flags)
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{
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{
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int div;
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int div;
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div = clk_divider_bestdiv(hw, rate, prate, table, width, flags);
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div = clk_divider_bestdiv(hw, parent, rate, prate, table, width, flags);
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return DIV_ROUND_UP_ULL((u64)*prate, div);
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return DIV_ROUND_UP_ULL((u64)*prate, div);
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}
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}
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EXPORT_SYMBOL_GPL(divider_round_rate);
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EXPORT_SYMBOL_GPL(divider_round_rate_parent);
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static long clk_divider_round_rate(struct clk_hw *hw, unsigned long rate,
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static long clk_divider_round_rate(struct clk_hw *hw, unsigned long rate,
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unsigned long *prate)
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unsigned long *prate)
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@ -412,9 +412,10 @@ extern const struct clk_ops clk_divider_ro_ops;
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unsigned long divider_recalc_rate(struct clk_hw *hw, unsigned long parent_rate,
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unsigned long divider_recalc_rate(struct clk_hw *hw, unsigned long parent_rate,
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unsigned int val, const struct clk_div_table *table,
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unsigned int val, const struct clk_div_table *table,
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unsigned long flags);
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unsigned long flags);
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long divider_round_rate(struct clk_hw *hw, unsigned long rate,
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long divider_round_rate_parent(struct clk_hw *hw, struct clk_hw *parent,
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unsigned long *prate, const struct clk_div_table *table,
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unsigned long rate, unsigned long *prate,
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u8 width, unsigned long flags);
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const struct clk_div_table *table,
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u8 width, unsigned long flags);
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int divider_get_val(unsigned long rate, unsigned long parent_rate,
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int divider_get_val(unsigned long rate, unsigned long parent_rate,
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const struct clk_div_table *table, u8 width,
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const struct clk_div_table *table, u8 width,
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unsigned long flags);
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unsigned long flags);
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@ -757,6 +758,15 @@ static inline void __clk_hw_set_clk(struct clk_hw *dst, struct clk_hw *src)
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dst->core = src->core;
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dst->core = src->core;
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}
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}
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static inline long divider_round_rate(struct clk_hw *hw, unsigned long rate,
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unsigned long *prate,
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const struct clk_div_table *table,
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u8 width, unsigned long flags)
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{
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return divider_round_rate_parent(hw, clk_hw_get_parent(hw),
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rate, prate, table, width, flags);
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}
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/*
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/*
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* FIXME clock api without lock protection
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* FIXME clock api without lock protection
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*/
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*/
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