[BNX2]: Add 5709 reset and runtime code.
Signed-off-by: Michael Chan <mchan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -3247,6 +3247,17 @@ bnx2_reset_chip(struct bnx2 *bp, u32 reset_code)
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* before we issue a reset. */
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val = REG_RD(bp, BNX2_MISC_ID);
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if (CHIP_NUM(bp) == CHIP_NUM_5709) {
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REG_WR(bp, BNX2_MISC_COMMAND, BNX2_MISC_COMMAND_SW_RESET);
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REG_RD(bp, BNX2_MISC_COMMAND);
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udelay(5);
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val = BNX2_PCICFG_MISC_CONFIG_REG_WINDOW_ENA |
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BNX2_PCICFG_MISC_CONFIG_TARGET_MB_WORD_SWAP;
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pci_write_config_dword(bp->pdev, BNX2_PCICFG_MISC_CONFIG, val);
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} else {
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val = BNX2_PCICFG_MISC_CONFIG_CORE_RST_REQ |
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BNX2_PCICFG_MISC_CONFIG_REG_WINDOW_ENA |
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BNX2_PCICFG_MISC_CONFIG_TARGET_MB_WORD_SWAP;
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@ -3255,16 +3266,17 @@ bnx2_reset_chip(struct bnx2 *bp, u32 reset_code)
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REG_WR(bp, BNX2_PCICFG_MISC_CONFIG, val);
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if ((CHIP_ID(bp) == CHIP_ID_5706_A0) ||
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(CHIP_ID(bp) == CHIP_ID_5706_A1))
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msleep(15);
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(CHIP_ID(bp) == CHIP_ID_5706_A1)) {
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current->state = TASK_UNINTERRUPTIBLE;
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schedule_timeout(HZ / 50);
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}
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/* Reset takes approximate 30 usec */
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for (i = 0; i < 10; i++) {
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val = REG_RD(bp, BNX2_PCICFG_MISC_CONFIG);
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if ((val & (BNX2_PCICFG_MISC_CONFIG_CORE_RST_REQ |
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BNX2_PCICFG_MISC_CONFIG_CORE_RST_BSY)) == 0) {
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BNX2_PCICFG_MISC_CONFIG_CORE_RST_BSY)) == 0)
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break;
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}
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udelay(10);
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}
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@ -3273,6 +3285,7 @@ bnx2_reset_chip(struct bnx2 *bp, u32 reset_code)
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printk(KERN_ERR PFX "Chip reset did not complete\n");
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return -EBUSY;
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}
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}
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/* Make sure byte swapping is properly configured. */
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val = REG_RD(bp, BNX2_PCI_SWAP_DIAG0);
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@ -3976,8 +3989,8 @@ bnx2_run_loopback(struct bnx2 *bp, int loopback_mode)
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bp->tx_prod = NEXT_TX_BD(bp->tx_prod);
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bp->tx_prod_bseq += pkt_size;
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REG_WR16(bp, MB_TX_CID_ADDR + BNX2_L2CTX_TX_HOST_BIDX, bp->tx_prod);
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REG_WR(bp, MB_TX_CID_ADDR + BNX2_L2CTX_TX_HOST_BSEQ, bp->tx_prod_bseq);
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REG_WR16(bp, bp->tx_bidx_addr, bp->tx_prod);
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REG_WR(bp, bp->tx_bseq_addr, bp->tx_prod_bseq);
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udelay(100);
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@ -4529,8 +4542,8 @@ bnx2_start_xmit(struct sk_buff *skb, struct net_device *dev)
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prod = NEXT_TX_BD(prod);
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bp->tx_prod_bseq += skb->len;
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REG_WR16(bp, MB_TX_CID_ADDR + BNX2_L2CTX_TX_HOST_BIDX, prod);
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REG_WR(bp, MB_TX_CID_ADDR + BNX2_L2CTX_TX_HOST_BSEQ, bp->tx_prod_bseq);
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REG_WR16(bp, bp->tx_bidx_addr, prod);
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REG_WR(bp, bp->tx_bseq_addr, bp->tx_prod_bseq);
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mmiowb();
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