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[BNX2]: Fix Serdes WoL bug. 

The bug is in the code in bnx2_set_power_state() that assumes copper
devices when setting up WoL.  This is no longer true after adding WoL
support for Serdes devices.

Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Michael Chan 2007-10-17 19:26:15 -07:00 committed by David S. Miller
parent 8499fb594a
commit 239cd34327
1 changed files with 19 additions and 9 deletions
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28
drivers/net/bnx2.c
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@ -3079,14 +3079,18 @@ bnx2_set_power_state(struct bnx2 *bp, pci_power_t state)
autoneg = bp->autoneg;
advertising = bp->advertising;
bp->autoneg = AUTONEG_SPEED;
bp->advertising = ADVERTISED_10baseT_Half |
ADVERTISED_10baseT_Full |
ADVERTISED_100baseT_Half |
ADVERTISED_100baseT_Full |
ADVERTISED_Autoneg;
if (bp->phy_port == PORT_TP) {
bp->autoneg = AUTONEG_SPEED;
bp->advertising = ADVERTISED_10baseT_Half |
ADVERTISED_10baseT_Full |
ADVERTISED_100baseT_Half |
ADVERTISED_100baseT_Full |
ADVERTISED_Autoneg;
}
bnx2_setup_copper_phy(bp);
spin_lock_bh(&bp->phy_lock);
bnx2_setup_phy(bp, bp->phy_port);
spin_unlock_bh(&bp->phy_lock);
bp->autoneg = autoneg;
bp->advertising = advertising;
@ -3097,10 +3101,16 @@ bnx2_set_power_state(struct bnx2 *bp, pci_power_t state)
/* Enable port mode. */
val &= ~BNX2_EMAC_MODE_PORT;
val |= BNX2_EMAC_MODE_PORT_MII |
BNX2_EMAC_MODE_MPKT_RCVD |
val |= BNX2_EMAC_MODE_MPKT_RCVD |
BNX2_EMAC_MODE_ACPI_RCVD |
BNX2_EMAC_MODE_MPKT;
if (bp->phy_port == PORT_TP)
val |= BNX2_EMAC_MODE_PORT_MII;
else {
val |= BNX2_EMAC_MODE_PORT_GMII;
if (bp->line_speed == SPEED_2500)
val |= BNX2_EMAC_MODE_25G_MODE;
}
REG_WR(bp, BNX2_EMAC_MODE, val);