CRIS v32: Update compressed head.S
- Fixes for NAND and NOR flash booting. - Use assembler macros for common tasks (clocks, general io etc) - Use (EtraxFS or Artpec-3) machine specific include for dram and hardware init.
This commit is contained in:
Jesper Nilsson
parent
5d23ff25b2
commit
247c3c959f
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@ -2,13 +2,12 @@
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* Code that sets up the DRAM registers, calls the
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* decompressor to unpack the piggybacked kernel, and jumps.
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*
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* Copyright (C) 1999 - 2003, Axis Communications AB
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* Copyright (C) 1999 - 2006, Axis Communications AB
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*/
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#define ASSEMBLER_MACROS_ONLY
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#include <asm/arch/hwregs/asm/reg_map_asm.h>
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#include <asm/arch/hwregs/asm/gio_defs_asm.h>
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#include <asm/arch/hwregs/asm/config_defs_asm.h>
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#include <hwregs/asm/reg_map_asm.h>
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#include <asm/arch/mach/startup.inc>
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#define RAM_INIT_MAGIC 0x56902387
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#define COMMAND_LINE_MAGIC 0x87109563
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@ -22,114 +21,49 @@ start:
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di
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;; Start clocks for used blocks.
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move.d REG_ADDR(config, regi_config, rw_clk_ctrl), $r1
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move.d [$r1], $r0
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or.d REG_STATE(config, rw_clk_ctrl, cpu, yes) | \
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REG_STATE(config, rw_clk_ctrl, bif, yes) | \
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REG_STATE(config, rw_clk_ctrl, fix_io, yes), $r0
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move.d $r0, [$r1]
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START_CLOCKS
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;; If booting from NAND flash we first have to copy some
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;; data from NAND flash to internal RAM to get the code
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;; that initializes the SDRAM. Lets copy 20 KB. This
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;; code executes at 0x38010000 if booting from NAND and
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;; we are guaranted that at least 0x200 bytes are good so
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;; lets start from there. The first 8192 bytes in the nand
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;; flash is spliced with zeroes and is thus 16384 bytes.
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move.d 0x38010200, $r10
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move.d 0x14200, $r11 ; Start offset in NAND flash 0x10200 + 16384
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move.d 0x5000, $r12 ; Length of copy
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;; Before this code the tools add a partitiontable so the PC
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;; has an offset from the linked address.
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offset1:
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lapcq ., $r13 ; get PC
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add.d first_copy_complete-offset1, $r13
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#include "../../lib/nand_init.S"
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first_copy_complete:
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;; Initialze the DRAM registers.
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;; Initialize the DRAM registers.
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cmp.d RAM_INIT_MAGIC, $r8 ; Already initialized?
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beq dram_init_finished
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nop
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#include "../../lib/dram_init.S"
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#include "../../mach/dram_init.S"
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dram_init_finished:
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lapcq ., $r13 ; get PC
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add.d second_copy_complete-dram_init_finished, $r13
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move.d REG_ADDR(config, regi_config, r_bootsel), $r0
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move.d [$r0], $r0
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and.d REG_MASK(config, r_bootsel, boot_mode), $r0
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cmp.d REG_STATE(config, r_bootsel, boot_mode, nand), $r0
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bne second_copy_complete ; No NAND boot
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nop
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;; Copy 2MB from NAND flash to SDRAM (at 2-4MB into the SDRAM)
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move.d 0x40204000, $r10
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move.d 0x8000, $r11
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move.d 0x200000, $r12
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ba copy_nand_to_ram
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nop
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second_copy_complete:
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;; Initiate the PA port.
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move.d CONFIG_ETRAX_DEF_GIO_PA_OUT, $r0
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move.d REG_ADDR(gio, regi_gio, rw_pa_dout), $r1
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move.d $r0, [$r1]
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move.d CONFIG_ETRAX_DEF_GIO_PA_OE, $r0
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move.d REG_ADDR(gio, regi_gio, rw_pa_oe), $r1
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move.d $r0, [$r1]
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GIO_INIT
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;; Setup the stack to a suitably high address.
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;; We assume 8 MB is the minimum DRAM and put
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;; the SP at the top for now.
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move.d 0x40800000, $sp
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;; Figure out where the compressed piggyback image is
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;; in the flash (since we wont try to copy it to DRAM
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;; before unpacking). It is at _edata, but in flash.
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;; Figure out where the compressed piggyback image is.
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;; It is either in [NOR] flash (we don't want to copy it
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;; to DRAM before unpacking), or copied to DRAM
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;; by the [NAND] flash boot loader.
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;; The piggyback image is at _edata, but relative to where the
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;; image is actually located in memory, not where it is linked
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;; (the decompressor is linked at 0x40700000+ and runs there).
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;; Use (_edata - herami) as offset to the current PC.
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move.d REG_ADDR(config, regi_config, r_bootsel), $r0
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move.d [$r0], $r0
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and.d REG_MASK(config, r_bootsel, boot_mode), $r0
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cmp.d REG_STATE(config, r_bootsel, boot_mode, nand), $r0
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beq hereami2
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nop
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hereami:
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lapcq ., $r5 ; get PC
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and.d 0x7fffffff, $r5 ; strip any non-cache bit
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move.d $r5, $r0 ; save for later - flash address of 'herami'
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move.d $r5, $r0 ; source address of 'herami'
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add.d _edata, $r5
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sub.d hereami, $r5 ; r5 = flash address of '_edata'
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move.d hereami, $r1 ; destination
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ba 2f
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nop
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hereami2:
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lapcq ., $r5 ; get PC
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and.d 0x00ffffff, $r5 ; strip any non-cache bit
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move.d $r5, $r6
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or.d 0x40200000, $r6
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move.d $r6, $r0 ; save for later - flash address of 'herami'
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add.d _edata, $r5
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sub.d hereami2, $r5 ; r5 = flash address of '_edata'
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add.d 0x40200000, $r5
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move.d hereami2, $r1 ; destination
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2:
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;; Copy text+data to DRAM
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move.d _edata, $r2 ; end destination
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1: move.w [$r0+], $r3
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move.w $r3, [$r1+]
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cmp.d $r2, $r1
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1: move.w [$r0+], $r3 ; from herami+ source
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move.w $r3, [$r1+] ; to hereami+ destination (linked address)
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cmp.d $r2, $r1 ; finish when destination == _edata
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bcs 1b
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nop
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move.d input_data, $r0 ; for the decompressor
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move.d $r5, [$r0] ; for the decompressor
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@ -144,16 +78,24 @@ hereami2:
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nop
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;; Save command line magic and address.
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move.d _cmd_line_magic, $r12
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move.d $r10, [$r12]
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move.d _cmd_line_addr, $r12
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move.d $r11, [$r12]
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move.d _cmd_line_magic, $r0
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move.d $r10, [$r0]
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move.d _cmd_line_addr, $r0
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move.d $r11, [$r0]
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;; Save boot source indicator
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move.d _boot_source, $r0
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move.d $r12, [$r0]
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;; Do the decompression and save compressed size in _inptr
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jsr decompress_kernel
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nop
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;; Restore boot source indicator
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move.d _boot_source, $r12
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move.d [$r12], $r12
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;; Restore command line magic and address.
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move.d _cmd_line_magic, $r10
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move.d [$r10], $r10
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@ -166,11 +108,10 @@ hereami2:
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move.d [$r0], $r9 ; flash address of compressed kernel
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move.d inptr, $r0
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add.d [$r0], $r9 ; size of compressed kernel
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cmp.d 0x40200000, $r9
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blo enter_kernel
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nop
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sub.d 0x40200000, $r9
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add.d 0x4000, $r9
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cmp.d 0x40000000, $r9 ; image in DRAM ?
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blo enter_kernel ; no, must be [NOR] flash, jump
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nop ; delay slot
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and.d 0x001fffff, $r9 ; assume compressed kernel was < 2M
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enter_kernel:
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;; Enter the decompressed kernel
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@ -186,7 +127,7 @@ _cmd_line_magic:
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.dword 0
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_cmd_line_addr:
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.dword 0
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is_nand_boot:
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.dword 0
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_boot_source:
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.dword 0
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#include "../../lib/hw_settings.S"
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#include "../../mach/hw_settings.S"
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