i2c-mpc: work around missing-9th-clock-pulse bug
Work around a problem reported on: http://ozlabs.org/pipermail/linuxppc-embedded/2005-July/019038.html Without this patch I2C on mpc5200 becomes unusable after a while. Tested on mpc5200 boards by Matthias Fechner and me. Signed-off-by: Domen Puncer <domen.puncer@telargo.com> Signed-off-by: Jean Delvare <khali@linux-fr.org>
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@ -74,6 +74,25 @@ static irqreturn_t mpc_i2c_isr(int irq, void *dev_id)
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return IRQ_HANDLED;
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}
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/* Sometimes 9th clock pulse isn't generated, and slave doesn't release
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* the bus, because it wants to send ACK.
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* Following sequence of enabling/disabling and sending start/stop generates
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* the pulse, so it's all OK.
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*/
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static void mpc_i2c_fixup(struct mpc_i2c *i2c)
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{
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writeccr(i2c, 0);
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udelay(30);
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writeccr(i2c, CCR_MEN);
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udelay(30);
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writeccr(i2c, CCR_MSTA | CCR_MTX);
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udelay(30);
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writeccr(i2c, CCR_MSTA | CCR_MTX | CCR_MEN);
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udelay(30);
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writeccr(i2c, CCR_MEN);
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udelay(30);
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}
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static int i2c_wait(struct mpc_i2c *i2c, unsigned timeout, int writing)
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{
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unsigned long orig_jiffies = jiffies;
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@ -153,6 +172,7 @@ static void mpc_i2c_start(struct mpc_i2c *i2c)
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static void mpc_i2c_stop(struct mpc_i2c *i2c)
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{
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writeccr(i2c, CCR_MEN);
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writeccr(i2c, 0);
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}
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static int mpc_write(struct mpc_i2c *i2c, int target,
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@ -245,6 +265,9 @@ static int mpc_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
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}
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if (time_after(jiffies, orig_jiffies + HZ)) {
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pr_debug("I2C: timeout\n");
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if (readb(i2c->base + MPC_I2C_SR) ==
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(CSR_MCF | CSR_MBB | CSR_RXAK))
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mpc_i2c_fixup(i2c);
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return -EIO;
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}
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schedule();
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