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The imx fixes for 3.9: 

- move early resume code out of .data section to fix allyesconfig
    failure since c08e20d (arm: Add v7_invalidate_l1 to cache-v7.S)
    gets merged
  - Fix incorrect DISP1_DAT_21 number in imx53-mba53 disp1-grp1
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Merge tag 'imx-fixes-3.9' of git://git.linaro.org/people/shawnguo/linux-2.6 into fixes

From Shawn Guo:
The imx fixes for 3.9:
 - move early resume code out of .data section to fix allyesconfig
   failure since c08e20d (arm: Add v7_invalidate_l1 to cache-v7.S)
   gets merged
 - Fix incorrect DISP1_DAT_21 number in imx53-mba53 disp1-grp1

* tag 'imx-fixes-3.9' of git://git.linaro.org/people/shawnguo/linux-2.6:
  ARM: dts: imx53-mba53: fix fsl,pins for disp1-grp1
  ARM: mach-imx: move early resume code out of the .data section

Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2013-03-04 17:33:21 -08:00
parent 984b839337 0545c798e9
commit 260a8e507a
3 changed files with 10 additions and 26 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
arch/arm/boot/dts/imx53-mba53.dts
View File

@ -42,10 +42,9 @@
fsl,pins = <689 0x10000 /* DISP1_DRDY */
482 0x10000 /* DISP1_HSYNC */
489 0x10000 /* DISP1_VSYNC */
684 0x10000 /* DISP1_DAT_0 */
515 0x10000 /* DISP1_DAT_22 */
523 0x10000 /* DISP1_DAT_23 */
543 0x10000 /* DISP1_DAT_21 */
545 0x10000 /* DISP1_DAT_21 */
553 0x10000 /* DISP1_DAT_20 */
558 0x10000 /* DISP1_DAT_19 */
564 0x10000 /* DISP1_DAT_18 */

18
arch/arm/mach-imx/headsmp.S
View File

@ -26,16 +26,16 @@ ENDPROC(v7_secondary_startup)
#ifdef CONFIG_PM
/*
* The following code is located into the .data section. This is to
* allow phys_l2x0_saved_regs to be accessed with a relative load
* as we are running on physical address here.
* The following code must assume it is running from physical address
* where absolute virtual addresses to the data section have to be
* turned into relative ones.
*/
.data
.align
#ifdef CONFIG_CACHE_L2X0
.macro pl310_resume
ldr r2, phys_l2x0_saved_regs
adr r0, l2x0_saved_regs_offset
ldr r2, [r0]
add r2, r2, r0
ldr r0, [r2, #L2X0_R_PHY_BASE] @ get physical base of l2x0
ldr r1, [r2, #L2X0_R_AUX_CTRL] @ get aux_ctrl value
str r1, [r0, #L2X0_AUX_CTRL] @ restore aux_ctrl
@ -43,9 +43,9 @@ ENDPROC(v7_secondary_startup)
str r1, [r0, #L2X0_CTRL] @ re-enable L2
.endm
.globl phys_l2x0_saved_regs
phys_l2x0_saved_regs:
.long 0
l2x0_saved_regs_offset:
.word l2x0_saved_regs - .
#else
.macro pl310_resume
.endm

15
arch/arm/mach-imx/pm-imx6q.c
View File

@ -22,8 +22,6 @@
#include "common.h"
#include "hardware.h"
extern unsigned long phys_l2x0_saved_regs;
static int imx6q_suspend_finish(unsigned long val)
{
cpu_do_idle();
@ -57,18 +55,5 @@ static const struct platform_suspend_ops imx6q_pm_ops = {
void __init imx6q_pm_init(void)
{
/*
* The l2x0 core code provides an infrastucture to save and restore
* l2x0 registers across suspend/resume cycle. But because imx6q
* retains L2 content during suspend and needs to resume L2 before
* MMU is enabled, it can only utilize register saving support and
* have to take care of restoring on its own. So we save physical
* address of the data structure used by l2x0 core to save registers,
* and later restore the necessary ones in imx6q resume entry.
*/
#ifdef CONFIG_CACHE_L2X0
phys_l2x0_saved_regs = __pa(&l2x0_saved_regs);
#endif
suspend_set_ops(&imx6q_pm_ops);
}