staging: brcm80211: removed unused softmac workaround
WAR16165 is only used on older PCI chips, the driver does not support these chips. Reviewed-by: Pieter-Paul Giesberts <pieterpg@broadcom.com> Reviewed-by: Arend van Spriel <arend@broadcom.com> Signed-off-by: Franky Lin <frankyl@broadcom.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This commit is contained in:
Roland Vossen
Greg Kroah-Hartman
parent
bce42cf3fa
commit
261f992bce
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@ -1852,15 +1852,6 @@ int ai_devpath(struct si_pub *sih, char *path, int size)
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return 0;
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}
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bool ai_pci_war16165(struct si_pub *sih)
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{
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struct si_info *sii;
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sii = (struct si_info *)sih;
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return PCI(sii) && (sih->buscorerev <= 10);
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}
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void ai_pci_up(struct si_pub *sih)
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{
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struct si_info *sii;
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@ -322,8 +322,6 @@ extern void ai_write_wrap_reg(struct si_pub *sih, u32 offset, u32 val);
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extern struct si_pub *ai_attach(void *regs, struct pci_dev *sdh, char **vars,
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uint *varsz);
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extern void ai_detach(struct si_pub *sih);
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extern bool ai_pci_war16165(struct si_pub *sih);
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extern uint ai_coreid(struct si_pub *sih);
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extern uint ai_corerev(struct si_pub *sih);
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extern uint ai_corereg(struct si_pub *sih, uint coreidx, uint regoff, uint mask,
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@ -1330,8 +1330,7 @@ struct shm_acparams {
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#define MHF1_FORCEFASTCLK 0x0400
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/* Flags in M_HOST_FLAGS2 */
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/* PR16165WAR : Enable ucode PCI slow clock WAR */
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#define MHF2_PCISLOWCLKWAR 0x0008
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/* Flush BCMC FIFO immediately */
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#define MHF2_TXBCMC_NOW 0x0040
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/* Enable ucode/hw power control */
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@ -829,19 +829,6 @@ brcms_b_recv(struct brcms_hardware *wlc_hw, uint fifo, bool bound)
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return n >= bound_limit;
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}
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static void brcms_c_war16165(struct brcms_c_info *wlc, bool tx)
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{
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if (tx) {
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/* the post-increment is used in STAY_AWAKE macro */
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if (wlc->txpend16165war++ == 0)
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brcms_c_set_ps_ctrl(wlc);
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} else {
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wlc->txpend16165war--;
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if (wlc->txpend16165war == 0)
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brcms_c_set_ps_ctrl(wlc);
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}
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}
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/* process an individual struct tx_status */
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static bool
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brcms_c_dotxstatus(struct brcms_c_info *wlc, struct tx_status *txs)
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@ -879,8 +866,6 @@ brcms_c_dotxstatus(struct brcms_c_info *wlc, struct tx_status *txs)
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}
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p = dma_getnexttxp(wlc->hw->di[queue], DMA_RANGE_TRANSMITTED);
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if (wlc->war16165)
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brcms_c_war16165(wlc, false);
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if (p == NULL)
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goto fatal;
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@ -3109,8 +3094,6 @@ static void brcms_c_flushqueues(struct brcms_c_info *wlc)
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struct brcms_hardware *wlc_hw = wlc->hw;
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uint i;
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wlc->txpend16165war = 0;
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/* free any posted tx packets */
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for (i = 0; i < NFIFO; i++)
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if (wlc_hw->di[i]) {
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@ -3532,9 +3515,6 @@ static void brcms_b_coreinit(struct brcms_c_info *wlc)
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AND_REG(®s->ifs_ctl, 0x0FFF);
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W_REG(®s->ifs_aifsn, EDCF_AIFSN_MIN);
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/* dma initializations */
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wlc->txpend16165war = 0;
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/* init the tx dma engines */
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for (i = 0; i < NFIFO; i++) {
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if (wlc_hw->di[i])
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@ -4832,9 +4812,6 @@ static int brcms_b_attach(struct brcms_c_info *wlc, u16 vendor, u16 device,
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if (wlc_hw->boardflags & BFL_NOPLLDOWN)
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brcms_b_pllreq(wlc_hw, true, BRCMS_PLLREQ_SHARED);
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if (ai_pci_war16165(wlc_hw->sih))
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wlc->war16165 = true;
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/* check device id(srom, nvram etc.) to set bands */
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if (wlc_hw->deviceid == BCM43224_D11N_ID ||
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wlc_hw->deviceid == BCM43224_D11N_ID_VEN1)
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@ -5833,10 +5810,6 @@ int brcms_c_up(struct brcms_c_info *wlc)
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/* Set EDCF hostflags */
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brcms_c_mhf(wlc, MHF1, MHF1_EDCF, MHF1_EDCF, BRCM_BAND_ALL);
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if (wlc->war16165)
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brcms_c_mhf(wlc, MHF2, MHF2_PCISLOWCLKWAR, MHF2_PCISLOWCLKWAR,
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BRCM_BAND_ALL);
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brcms_init(wlc->wl);
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wlc->pub->up = true;
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@ -7816,10 +7789,6 @@ brcms_c_txfifo(struct brcms_c_info *wlc, uint fifo, struct sk_buff *p,
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if (fifo == TX_BCMC_FIFO)
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frameid = le16_to_cpu(txh->TxFrameID);
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if (wlc->war16165)
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brcms_c_war16165(wlc, true);
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/*
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* Bump up pending count for if not using rpc. If rpc is
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* used, this will be handled in brcms_b_txfifo()
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@ -416,8 +416,6 @@ struct brcms_txq_info {
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* band: pointer to active per-band state.
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* corestate: per-core state (one per hw core).
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* bandstate: per-band state (one per phy/radio).
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* war16165: PCI slow clock 16165 war flag.
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* txpend16165war: PCI slow clock 16165 war flag.
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* qvalid: DirFrmQValid and BcMcFrmQValid.
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* ampdu: ampdu module handler.
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* asi: antsel module handler.
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@ -508,9 +506,6 @@ struct brcms_c_info {
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struct brcms_core *corestate;
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struct brcms_band *bandstate[MAXBANDS];
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bool war16165;
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uint txpend16165war;
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/* packet queue */
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uint qvalid;
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