Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6
This commit is contained in:
commit
27710bf6fe
|
@ -172,6 +172,16 @@ Who: Len Brown <len.brown@intel.com>
|
||||||
|
|
||||||
---------------------------
|
---------------------------
|
||||||
|
|
||||||
|
What: ide-tape driver
|
||||||
|
When: July 2008
|
||||||
|
Files: drivers/ide/ide-tape.c
|
||||||
|
Why: This driver might not have any users anymore and maintaining it for no
|
||||||
|
reason is an effort no one wants to make.
|
||||||
|
Who: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>, Borislav Petkov
|
||||||
|
<petkovbb@googlemail.com>
|
||||||
|
|
||||||
|
---------------------------
|
||||||
|
|
||||||
What: libata spindown skipping and warning
|
What: libata spindown skipping and warning
|
||||||
When: Dec 2008
|
When: Dec 2008
|
||||||
Why: Some halt(8) implementations synchronize caches for and spin
|
Why: Some halt(8) implementations synchronize caches for and spin
|
||||||
|
@ -306,3 +316,15 @@ Why: Largely unmaintained and almost entirely unused. File system
|
||||||
is largely pointless as without a lot of work only the most
|
is largely pointless as without a lot of work only the most
|
||||||
trivial of Solaris binaries can work with the emulation code.
|
trivial of Solaris binaries can work with the emulation code.
|
||||||
Who: David S. Miller <davem@davemloft.net>
|
Who: David S. Miller <davem@davemloft.net>
|
||||||
|
|
||||||
|
---------------------------
|
||||||
|
|
||||||
|
What: init_mm export
|
||||||
|
When: 2.6.26
|
||||||
|
Why: Not used in-tree. The current out-of-tree users used it to
|
||||||
|
work around problems in the CPA code which should be resolved
|
||||||
|
by now. One usecase was described to provide verification code
|
||||||
|
of the CPA operation. That's a good idea in general, but such
|
||||||
|
code / infrastructure should be in the kernel and not in some
|
||||||
|
out-of-tree driver.
|
||||||
|
Who: Thomas Gleixner <tglx@linutronix.de>
|
||||||
|
|
|
@ -258,8 +258,6 @@ Summary of ide driver parameters for kernel command line
|
||||||
As for VLB, it is safest to not specify it.
|
As for VLB, it is safest to not specify it.
|
||||||
Bigger values are safer than smaller ones.
|
Bigger values are safer than smaller ones.
|
||||||
|
|
||||||
"idex=noprobe" : do not attempt to access/use this interface
|
|
||||||
|
|
||||||
"idex=base" : probe for an interface at the addr specified,
|
"idex=base" : probe for an interface at the addr specified,
|
||||||
where "base" is usually 0x1f0 or 0x170
|
where "base" is usually 0x1f0 or 0x170
|
||||||
and "ctl" is assumed to be "base"+0x206
|
and "ctl" is assumed to be "base"+0x206
|
||||||
|
@ -307,53 +305,6 @@ Also for legacy CMD640 host driver (cmd640) you need to use "probe_vlb"
|
||||||
kernel paremeter to enable probing for VLB version of the chipset (PCI ones
|
kernel paremeter to enable probing for VLB version of the chipset (PCI ones
|
||||||
are detected automatically).
|
are detected automatically).
|
||||||
|
|
||||||
================================================================================
|
|
||||||
|
|
||||||
IDE ATAPI streaming tape driver
|
|
||||||
-------------------------------
|
|
||||||
|
|
||||||
This driver is a part of the Linux ide driver and works in co-operation
|
|
||||||
with linux/drivers/block/ide.c.
|
|
||||||
|
|
||||||
The driver, in co-operation with ide.c, basically traverses the
|
|
||||||
request-list for the block device interface. The character device
|
|
||||||
interface, on the other hand, creates new requests, adds them
|
|
||||||
to the request-list of the block device, and waits for their completion.
|
|
||||||
|
|
||||||
Pipelined operation mode is now supported on both reads and writes.
|
|
||||||
|
|
||||||
The block device major and minor numbers are determined from the
|
|
||||||
tape's relative position in the ide interfaces, as explained in ide.c.
|
|
||||||
|
|
||||||
The character device interface consists of the following devices:
|
|
||||||
|
|
||||||
ht0 major 37, minor 0 first IDE tape, rewind on close.
|
|
||||||
ht1 major 37, minor 1 second IDE tape, rewind on close.
|
|
||||||
...
|
|
||||||
nht0 major 37, minor 128 first IDE tape, no rewind on close.
|
|
||||||
nht1 major 37, minor 129 second IDE tape, no rewind on close.
|
|
||||||
...
|
|
||||||
|
|
||||||
Run /dev/MAKEDEV to create the above entries.
|
|
||||||
|
|
||||||
The general magnetic tape commands compatible interface, as defined by
|
|
||||||
include/linux/mtio.h, is accessible through the character device.
|
|
||||||
|
|
||||||
General ide driver configuration options, such as the interrupt-unmask
|
|
||||||
flag, can be configured by issuing an ioctl to the block device interface,
|
|
||||||
as any other ide device.
|
|
||||||
|
|
||||||
Our own ide-tape ioctl's can be issued to either the block device or
|
|
||||||
the character device interface.
|
|
||||||
|
|
||||||
Maximal throughput with minimal bus load will usually be achieved in the
|
|
||||||
following scenario:
|
|
||||||
|
|
||||||
1. ide-tape is operating in the pipelined operation mode.
|
|
||||||
2. No buffering is performed by the user backup program.
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
================================================================================
|
================================================================================
|
||||||
|
|
||||||
Some Terminology
|
Some Terminology
|
||||||
|
|
23
MAINTAINERS
23
MAINTAINERS
|
@ -767,14 +767,14 @@ S: Maintained
|
||||||
|
|
||||||
BLACKFIN ARCHITECTURE
|
BLACKFIN ARCHITECTURE
|
||||||
P: Bryan Wu
|
P: Bryan Wu
|
||||||
M: bryan.wu@analog.com
|
M: cooloney@kernel.org
|
||||||
L: uclinux-dist-devel@blackfin.uclinux.org (subscribers-only)
|
L: uclinux-dist-devel@blackfin.uclinux.org (subscribers-only)
|
||||||
W: http://blackfin.uclinux.org
|
W: http://blackfin.uclinux.org
|
||||||
S: Supported
|
S: Supported
|
||||||
|
|
||||||
BLACKFIN EMAC DRIVER
|
BLACKFIN EMAC DRIVER
|
||||||
P: Bryan Wu
|
P: Bryan Wu
|
||||||
M: bryan.wu@analog.com
|
M: cooloney@kernel.org
|
||||||
L: uclinux-dist-devel@blackfin.uclinux.org (subscribers-only)
|
L: uclinux-dist-devel@blackfin.uclinux.org (subscribers-only)
|
||||||
W: http://blackfin.uclinux.org
|
W: http://blackfin.uclinux.org
|
||||||
S: Supported
|
S: Supported
|
||||||
|
@ -982,6 +982,12 @@ M: mchan@broadcom.com
|
||||||
L: netdev@vger.kernel.org
|
L: netdev@vger.kernel.org
|
||||||
S: Supported
|
S: Supported
|
||||||
|
|
||||||
|
BROADCOM BNX2X 10 GIGABIT ETHERNET DRIVER
|
||||||
|
P: Eliezer Tamir
|
||||||
|
M: eliezert@broadcom.com
|
||||||
|
L: netdev@vger.kernel.org
|
||||||
|
S: Supported
|
||||||
|
|
||||||
BROADCOM TG3 GIGABIT ETHERNET DRIVER
|
BROADCOM TG3 GIGABIT ETHERNET DRIVER
|
||||||
P: Michael Chan
|
P: Michael Chan
|
||||||
M: mchan@broadcom.com
|
M: mchan@broadcom.com
|
||||||
|
@ -2744,6 +2750,8 @@ S: Maintained
|
||||||
NETEFFECT IWARP RNIC DRIVER (IW_NES)
|
NETEFFECT IWARP RNIC DRIVER (IW_NES)
|
||||||
P: Faisal Latif
|
P: Faisal Latif
|
||||||
M: flatif@neteffect.com
|
M: flatif@neteffect.com
|
||||||
|
P: Nishi Gupta
|
||||||
|
M: ngupta@neteffect.com
|
||||||
P: Glenn Streiff
|
P: Glenn Streiff
|
||||||
M: gstreiff@neteffect.com
|
M: gstreiff@neteffect.com
|
||||||
L: general@lists.openfabrics.org
|
L: general@lists.openfabrics.org
|
||||||
|
@ -3884,10 +3892,13 @@ M: trivial@kernel.org
|
||||||
L: linux-kernel@vger.kernel.org
|
L: linux-kernel@vger.kernel.org
|
||||||
S: Maintained
|
S: Maintained
|
||||||
|
|
||||||
TULIP NETWORK DRIVER
|
TULIP NETWORK DRIVERS
|
||||||
L: tulip-users@lists.sourceforge.net
|
P: Grant Grundler
|
||||||
W: http://sourceforge.net/projects/tulip/
|
M: grundler@parisc-linux.org
|
||||||
S: Orphan
|
P: Kyle McMartin
|
||||||
|
M: kyle@parisc-linux.org
|
||||||
|
L: netdev@vger.kernel.org
|
||||||
|
S: Maintained
|
||||||
|
|
||||||
TUN/TAP driver
|
TUN/TAP driver
|
||||||
P: Maxim Krasnyansky
|
P: Maxim Krasnyansky
|
||||||
|
|
|
@ -939,7 +939,8 @@ config KEXEC
|
||||||
|
|
||||||
config ATAGS_PROC
|
config ATAGS_PROC
|
||||||
bool "Export atags in procfs"
|
bool "Export atags in procfs"
|
||||||
default n
|
depends on KEXEC
|
||||||
|
default y
|
||||||
help
|
help
|
||||||
Should the atags used to boot the kernel be exported in an "atags"
|
Should the atags used to boot the kernel be exported in an "atags"
|
||||||
file in procfs. Useful with kexec.
|
file in procfs. Useful with kexec.
|
||||||
|
|
|
@ -43,7 +43,7 @@
|
||||||
|
|
||||||
#ifdef DEBUG
|
#ifdef DEBUG
|
||||||
static unsigned int freq_debug;
|
static unsigned int freq_debug;
|
||||||
MODULE_PARM(freq_debug, "i");
|
module_param(freq_debug, uint, 0);
|
||||||
MODULE_PARM_DESC(freq_debug, "Set the debug messages to on=1/off=0");
|
MODULE_PARM_DESC(freq_debug, "Set the debug messages to on=1/off=0");
|
||||||
#else
|
#else
|
||||||
#define freq_debug 0
|
#define freq_debug 0
|
||||||
|
|
|
@ -129,28 +129,20 @@ static void clk_pxa3xx_cken_enable(struct clk *clk)
|
||||||
{
|
{
|
||||||
unsigned long mask = 1ul << (clk->cken & 0x1f);
|
unsigned long mask = 1ul << (clk->cken & 0x1f);
|
||||||
|
|
||||||
local_irq_disable();
|
|
||||||
|
|
||||||
if (clk->cken < 32)
|
if (clk->cken < 32)
|
||||||
CKENA |= mask;
|
CKENA |= mask;
|
||||||
else
|
else
|
||||||
CKENB |= mask;
|
CKENB |= mask;
|
||||||
|
|
||||||
local_irq_enable();
|
|
||||||
}
|
}
|
||||||
|
|
||||||
static void clk_pxa3xx_cken_disable(struct clk *clk)
|
static void clk_pxa3xx_cken_disable(struct clk *clk)
|
||||||
{
|
{
|
||||||
unsigned long mask = 1ul << (clk->cken & 0x1f);
|
unsigned long mask = 1ul << (clk->cken & 0x1f);
|
||||||
|
|
||||||
local_irq_disable();
|
|
||||||
|
|
||||||
if (clk->cken < 32)
|
if (clk->cken < 32)
|
||||||
CKENA &= ~mask;
|
CKENA &= ~mask;
|
||||||
else
|
else
|
||||||
CKENB &= ~mask;
|
CKENB &= ~mask;
|
||||||
|
|
||||||
local_irq_enable();
|
|
||||||
}
|
}
|
||||||
|
|
||||||
static const struct clkops clk_pxa3xx_cken_ops = {
|
static const struct clkops clk_pxa3xx_cken_ops = {
|
||||||
|
|
|
@ -58,7 +58,7 @@ static struct platform_device smc91x_device = {
|
||||||
.resource = smc91x_resources,
|
.resource = smc91x_resources,
|
||||||
};
|
};
|
||||||
|
|
||||||
#if defined(CONFIG_FB_PXA) || (CONFIG_FB_PXA_MODULES)
|
#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
|
||||||
static void zylonite_backlight_power(int on)
|
static void zylonite_backlight_power(int on)
|
||||||
{
|
{
|
||||||
gpio_set_value(gpio_backlight, on);
|
gpio_set_value(gpio_backlight, on);
|
||||||
|
|
|
@ -120,6 +120,8 @@ full_search:
|
||||||
*/
|
*/
|
||||||
int valid_phys_addr_range(unsigned long addr, size_t size)
|
int valid_phys_addr_range(unsigned long addr, size_t size)
|
||||||
{
|
{
|
||||||
|
if (addr < PHYS_OFFSET)
|
||||||
|
return 0;
|
||||||
if (addr + size > __pa(high_memory))
|
if (addr + size > __pa(high_memory))
|
||||||
return 0;
|
return 0;
|
||||||
|
|
||||||
|
|
|
@ -75,7 +75,7 @@ no_pgd:
|
||||||
void free_pgd_slow(struct mm_struct *mm, pgd_t *pgd)
|
void free_pgd_slow(struct mm_struct *mm, pgd_t *pgd)
|
||||||
{
|
{
|
||||||
pmd_t *pmd;
|
pmd_t *pmd;
|
||||||
struct page *pte;
|
pgtable_t pte;
|
||||||
|
|
||||||
if (!pgd)
|
if (!pgd)
|
||||||
return;
|
return;
|
||||||
|
@ -90,10 +90,8 @@ void free_pgd_slow(struct mm_struct *mm, pgd_t *pgd)
|
||||||
goto free;
|
goto free;
|
||||||
}
|
}
|
||||||
|
|
||||||
pte = pmd_page(*pmd);
|
pte = pmd_pgtable(*pmd);
|
||||||
pmd_clear(pmd);
|
pmd_clear(pmd);
|
||||||
dec_zone_page_state(virt_to_page((unsigned long *)pgd), NR_PAGETABLE);
|
|
||||||
pte_lock_deinit(pte);
|
|
||||||
pte_free(mm, pte);
|
pte_free(mm, pte);
|
||||||
pmd_free(mm, pmd);
|
pmd_free(mm, pmd);
|
||||||
free:
|
free:
|
||||||
|
|
|
@ -129,7 +129,7 @@ static int __init atstk1004_init(void)
|
||||||
#ifdef CONFIG_BOARD_ATSTK100X_SPI1
|
#ifdef CONFIG_BOARD_ATSTK100X_SPI1
|
||||||
at32_add_device_spi(1, spi1_board_info, ARRAY_SIZE(spi1_board_info));
|
at32_add_device_spi(1, spi1_board_info, ARRAY_SIZE(spi1_board_info));
|
||||||
#endif
|
#endif
|
||||||
#ifndef CONFIG_BOARD_ATSTK1002_SW2_CUSTOM
|
#ifndef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
|
||||||
at32_add_device_mci(0);
|
at32_add_device_mci(0);
|
||||||
#endif
|
#endif
|
||||||
at32_add_device_lcdc(0, &atstk1000_lcdc_data,
|
at32_add_device_lcdc(0, &atstk1000_lcdc_data,
|
||||||
|
|
|
@ -11,6 +11,7 @@
|
||||||
#include <linux/fs.h>
|
#include <linux/fs.h>
|
||||||
#include <linux/ptrace.h>
|
#include <linux/ptrace.h>
|
||||||
#include <linux/reboot.h>
|
#include <linux/reboot.h>
|
||||||
|
#include <linux/tick.h>
|
||||||
#include <linux/uaccess.h>
|
#include <linux/uaccess.h>
|
||||||
#include <linux/unistd.h>
|
#include <linux/unistd.h>
|
||||||
|
|
||||||
|
@ -30,8 +31,10 @@ void cpu_idle(void)
|
||||||
{
|
{
|
||||||
/* endless idle loop with no priority at all */
|
/* endless idle loop with no priority at all */
|
||||||
while (1) {
|
while (1) {
|
||||||
|
tick_nohz_stop_sched_tick();
|
||||||
while (!need_resched())
|
while (!need_resched())
|
||||||
cpu_idle_sleep();
|
cpu_idle_sleep();
|
||||||
|
tick_nohz_restart_sched_tick();
|
||||||
preempt_enable_no_resched();
|
preempt_enable_no_resched();
|
||||||
schedule();
|
schedule();
|
||||||
preempt_disable();
|
preempt_disable();
|
||||||
|
@ -345,6 +348,7 @@ int copy_thread(int nr, unsigned long clone_flags, unsigned long usp,
|
||||||
p->thread.cpu_context.ksp = (unsigned long)childregs;
|
p->thread.cpu_context.ksp = (unsigned long)childregs;
|
||||||
p->thread.cpu_context.pc = (unsigned long)ret_from_fork;
|
p->thread.cpu_context.pc = (unsigned long)ret_from_fork;
|
||||||
|
|
||||||
|
clear_tsk_thread_flag(p, TIF_DEBUG);
|
||||||
if ((clone_flags & CLONE_PTRACE) && test_thread_flag(TIF_DEBUG))
|
if ((clone_flags & CLONE_PTRACE) && test_thread_flag(TIF_DEBUG))
|
||||||
ocd_enable(p);
|
ocd_enable(p);
|
||||||
|
|
||||||
|
|
|
@ -189,6 +189,8 @@ no_context:
|
||||||
|
|
||||||
page = sysreg_read(PTBR);
|
page = sysreg_read(PTBR);
|
||||||
printk(KERN_ALERT "ptbr = %08lx", page);
|
printk(KERN_ALERT "ptbr = %08lx", page);
|
||||||
|
if (address >= TASK_SIZE)
|
||||||
|
page = (unsigned long)swapper_pg_dir;
|
||||||
if (page) {
|
if (page) {
|
||||||
page = ((unsigned long *)page)[address >> 22];
|
page = ((unsigned long *)page)[address >> 22];
|
||||||
printk(" pgd = %08lx", page);
|
printk(" pgd = %08lx", page);
|
||||||
|
|
|
@ -98,8 +98,11 @@ drivers-$(CONFIG_OPROFILE) += arch/$(ARCH)/oprofile/
|
||||||
# them changed. We use .mach to indicate when they were updated
|
# them changed. We use .mach to indicate when they were updated
|
||||||
# last, otherwise make uses the target directory mtime.
|
# last, otherwise make uses the target directory mtime.
|
||||||
|
|
||||||
|
show_mach_symlink = :
|
||||||
|
quiet_show_mach_symlink = echo ' SYMLINK include/asm-$(ARCH)/mach-$(MACHINE) -> include/asm-$(ARCH)/mach'
|
||||||
|
silent_show_mach_symlink = :
|
||||||
include/asm-blackfin/.mach: $(wildcard include/config/arch/*.h) include/config/auto.conf
|
include/asm-blackfin/.mach: $(wildcard include/config/arch/*.h) include/config/auto.conf
|
||||||
@echo ' SYMLINK include/asm-$(ARCH)/mach-$(MACHINE) -> include/asm-$(ARCH)/mach'
|
@$($(quiet)show_mach_symlink)
|
||||||
ifneq ($(KBUILD_SRC),)
|
ifneq ($(KBUILD_SRC),)
|
||||||
$(Q)mkdir -p include/asm-$(ARCH)
|
$(Q)mkdir -p include/asm-$(ARCH)
|
||||||
$(Q)ln -fsn $(srctree)/include/asm-$(ARCH)/mach-$(MACHINE) include/asm-$(ARCH)/mach
|
$(Q)ln -fsn $(srctree)/include/asm-$(ARCH)/mach-$(MACHINE) include/asm-$(ARCH)/mach
|
||||||
|
|
|
@ -1,7 +1,6 @@
|
||||||
#
|
#
|
||||||
# Automatically generated make config: don't edit
|
# Automatically generated make config: don't edit
|
||||||
# Linux kernel version: 2.6.22.14
|
# Linux kernel version: 2.6.22.16
|
||||||
# Thu Nov 29 17:32:47 2007
|
|
||||||
#
|
#
|
||||||
# CONFIG_MMU is not set
|
# CONFIG_MMU is not set
|
||||||
# CONFIG_FPU is not set
|
# CONFIG_FPU is not set
|
||||||
|
@ -116,7 +115,10 @@ CONFIG_PREEMPT_VOLUNTARY=y
|
||||||
# Processor and Board Settings
|
# Processor and Board Settings
|
||||||
#
|
#
|
||||||
# CONFIG_BF522 is not set
|
# CONFIG_BF522 is not set
|
||||||
|
# CONFIG_BF523 is not set
|
||||||
|
# CONFIG_BF524 is not set
|
||||||
# CONFIG_BF525 is not set
|
# CONFIG_BF525 is not set
|
||||||
|
# CONFIG_BF526 is not set
|
||||||
CONFIG_BF527=y
|
CONFIG_BF527=y
|
||||||
# CONFIG_BF531 is not set
|
# CONFIG_BF531 is not set
|
||||||
# CONFIG_BF532 is not set
|
# CONFIG_BF532 is not set
|
||||||
|
@ -306,6 +308,7 @@ CONFIG_BFIN_DCACHE=y
|
||||||
# CONFIG_BFIN_WB is not set
|
# CONFIG_BFIN_WB is not set
|
||||||
CONFIG_BFIN_WT=y
|
CONFIG_BFIN_WT=y
|
||||||
CONFIG_L1_MAX_PIECE=16
|
CONFIG_L1_MAX_PIECE=16
|
||||||
|
# CONFIG_MPU is not set
|
||||||
|
|
||||||
#
|
#
|
||||||
# Asynchonous Memory Configuration
|
# Asynchonous Memory Configuration
|
||||||
|
@ -354,6 +357,7 @@ CONFIG_BINFMT_ZFLAT=y
|
||||||
# Power management options
|
# Power management options
|
||||||
#
|
#
|
||||||
# CONFIG_PM is not set
|
# CONFIG_PM is not set
|
||||||
|
# CONFIG_PM_WAKEUP_BY_GPIO is not set
|
||||||
|
|
||||||
#
|
#
|
||||||
# Networking
|
# Networking
|
||||||
|
@ -496,7 +500,6 @@ CONFIG_MTD_CFI_I2=y
|
||||||
# CONFIG_MTD_CFI_INTELEXT is not set
|
# CONFIG_MTD_CFI_INTELEXT is not set
|
||||||
# CONFIG_MTD_CFI_AMDSTD is not set
|
# CONFIG_MTD_CFI_AMDSTD is not set
|
||||||
# CONFIG_MTD_CFI_STAA is not set
|
# CONFIG_MTD_CFI_STAA is not set
|
||||||
CONFIG_MTD_MW320D=m
|
|
||||||
CONFIG_MTD_RAM=y
|
CONFIG_MTD_RAM=y
|
||||||
CONFIG_MTD_ROM=m
|
CONFIG_MTD_ROM=m
|
||||||
# CONFIG_MTD_ABSENT is not set
|
# CONFIG_MTD_ABSENT is not set
|
||||||
|
@ -506,9 +509,6 @@ CONFIG_MTD_ROM=m
|
||||||
#
|
#
|
||||||
CONFIG_MTD_COMPLEX_MAPPINGS=y
|
CONFIG_MTD_COMPLEX_MAPPINGS=y
|
||||||
# CONFIG_MTD_PHYSMAP is not set
|
# CONFIG_MTD_PHYSMAP is not set
|
||||||
CONFIG_MTD_BF5xx=m
|
|
||||||
CONFIG_BFIN_FLASH_SIZE=0x400000
|
|
||||||
CONFIG_EBIU_FLASH_BASE=0x20000000
|
|
||||||
# CONFIG_MTD_UCLINUX is not set
|
# CONFIG_MTD_UCLINUX is not set
|
||||||
# CONFIG_MTD_PLATRAM is not set
|
# CONFIG_MTD_PLATRAM is not set
|
||||||
|
|
||||||
|
@ -684,7 +684,6 @@ CONFIG_INPUT_MISC=y
|
||||||
# CONFIG_INPUT_POWERMATE is not set
|
# CONFIG_INPUT_POWERMATE is not set
|
||||||
# CONFIG_INPUT_YEALINK is not set
|
# CONFIG_INPUT_YEALINK is not set
|
||||||
# CONFIG_INPUT_UINPUT is not set
|
# CONFIG_INPUT_UINPUT is not set
|
||||||
# CONFIG_BF53X_PFBUTTONS is not set
|
|
||||||
# CONFIG_TWI_KEYPAD is not set
|
# CONFIG_TWI_KEYPAD is not set
|
||||||
|
|
||||||
#
|
#
|
||||||
|
@ -702,12 +701,12 @@ CONFIG_INPUT_MISC=y
|
||||||
# CONFIG_BF5xx_PPIFCD is not set
|
# CONFIG_BF5xx_PPIFCD is not set
|
||||||
# CONFIG_BFIN_SIMPLE_TIMER is not set
|
# CONFIG_BFIN_SIMPLE_TIMER is not set
|
||||||
# CONFIG_BF5xx_PPI is not set
|
# CONFIG_BF5xx_PPI is not set
|
||||||
|
CONFIG_BFIN_OTP=y
|
||||||
|
# CONFIG_BFIN_OTP_WRITE_ENABLE is not set
|
||||||
# CONFIG_BFIN_SPORT is not set
|
# CONFIG_BFIN_SPORT is not set
|
||||||
# CONFIG_BFIN_TIMER_LATENCY is not set
|
# CONFIG_BFIN_TIMER_LATENCY is not set
|
||||||
# CONFIG_TWI_LCD is not set
|
# CONFIG_TWI_LCD is not set
|
||||||
# CONFIG_AD5304 is not set
|
# CONFIG_AD5304 is not set
|
||||||
# CONFIG_BF5xx_TEA5764 is not set
|
|
||||||
# CONFIG_BF5xx_FBDMA is not set
|
|
||||||
# CONFIG_VT is not set
|
# CONFIG_VT is not set
|
||||||
# CONFIG_SERIAL_NONSTANDARD is not set
|
# CONFIG_SERIAL_NONSTANDARD is not set
|
||||||
|
|
||||||
|
@ -772,7 +771,6 @@ CONFIG_I2C_CHARDEV=m
|
||||||
#
|
#
|
||||||
# I2C Hardware Bus support
|
# I2C Hardware Bus support
|
||||||
#
|
#
|
||||||
# CONFIG_I2C_BLACKFIN_GPIO is not set
|
|
||||||
CONFIG_I2C_BLACKFIN_TWI=m
|
CONFIG_I2C_BLACKFIN_TWI=m
|
||||||
CONFIG_I2C_BLACKFIN_TWI_CLK_KHZ=50
|
CONFIG_I2C_BLACKFIN_TWI_CLK_KHZ=50
|
||||||
# CONFIG_I2C_GPIO is not set
|
# CONFIG_I2C_GPIO is not set
|
||||||
|
|
|
@ -322,10 +322,9 @@ CONFIG_PM=y
|
||||||
# CONFIG_PM_LEGACY is not set
|
# CONFIG_PM_LEGACY is not set
|
||||||
# CONFIG_PM_DEBUG is not set
|
# CONFIG_PM_DEBUG is not set
|
||||||
# CONFIG_PM_SYSFS_DEPRECATED is not set
|
# CONFIG_PM_SYSFS_DEPRECATED is not set
|
||||||
CONFIG_PM_WAKEUP_GPIO_BY_SIC_IWR=y
|
CONFIG_PM_BFIN_SLEEP_DEEPER=y
|
||||||
|
# CONFIG_PM_BFIN_SLEEP is not set
|
||||||
# CONFIG_PM_WAKEUP_BY_GPIO is not set
|
# CONFIG_PM_WAKEUP_BY_GPIO is not set
|
||||||
# CONFIG_PM_WAKEUP_GPIO_API is not set
|
|
||||||
CONFIG_PM_WAKEUP_SIC_IWR=0x80
|
|
||||||
|
|
||||||
#
|
#
|
||||||
# CPU Frequency scaling
|
# CPU Frequency scaling
|
||||||
|
@ -697,7 +696,6 @@ CONFIG_SERIAL_BFIN_DMA=y
|
||||||
# CONFIG_SERIAL_BFIN_PIO is not set
|
# CONFIG_SERIAL_BFIN_PIO is not set
|
||||||
CONFIG_SERIAL_BFIN_UART0=y
|
CONFIG_SERIAL_BFIN_UART0=y
|
||||||
# CONFIG_BFIN_UART0_CTSRTS is not set
|
# CONFIG_BFIN_UART0_CTSRTS is not set
|
||||||
# CONFIG_SERIAL_BFIN_UART1 is not set
|
|
||||||
CONFIG_SERIAL_CORE=y
|
CONFIG_SERIAL_CORE=y
|
||||||
CONFIG_SERIAL_CORE_CONSOLE=y
|
CONFIG_SERIAL_CORE_CONSOLE=y
|
||||||
# CONFIG_SERIAL_BFIN_SPORT is not set
|
# CONFIG_SERIAL_BFIN_SPORT is not set
|
||||||
|
|
|
@ -323,10 +323,9 @@ CONFIG_PM=y
|
||||||
# CONFIG_PM_LEGACY is not set
|
# CONFIG_PM_LEGACY is not set
|
||||||
# CONFIG_PM_DEBUG is not set
|
# CONFIG_PM_DEBUG is not set
|
||||||
# CONFIG_PM_SYSFS_DEPRECATED is not set
|
# CONFIG_PM_SYSFS_DEPRECATED is not set
|
||||||
CONFIG_PM_WAKEUP_GPIO_BY_SIC_IWR=y
|
CONFIG_PM_BFIN_SLEEP_DEEPER=y
|
||||||
|
# CONFIG_PM_BFIN_SLEEP is not set
|
||||||
# CONFIG_PM_WAKEUP_BY_GPIO is not set
|
# CONFIG_PM_WAKEUP_BY_GPIO is not set
|
||||||
# CONFIG_PM_WAKEUP_GPIO_API is not set
|
|
||||||
CONFIG_PM_WAKEUP_SIC_IWR=0x80
|
|
||||||
|
|
||||||
#
|
#
|
||||||
# CPU Frequency scaling
|
# CPU Frequency scaling
|
||||||
|
@ -714,7 +713,6 @@ CONFIG_SERIAL_BFIN_DMA=y
|
||||||
# CONFIG_SERIAL_BFIN_PIO is not set
|
# CONFIG_SERIAL_BFIN_PIO is not set
|
||||||
CONFIG_SERIAL_BFIN_UART0=y
|
CONFIG_SERIAL_BFIN_UART0=y
|
||||||
# CONFIG_BFIN_UART0_CTSRTS is not set
|
# CONFIG_BFIN_UART0_CTSRTS is not set
|
||||||
# CONFIG_SERIAL_BFIN_UART1 is not set
|
|
||||||
CONFIG_SERIAL_CORE=y
|
CONFIG_SERIAL_CORE=y
|
||||||
CONFIG_SERIAL_CORE_CONSOLE=y
|
CONFIG_SERIAL_CORE_CONSOLE=y
|
||||||
# CONFIG_SERIAL_BFIN_SPORT is not set
|
# CONFIG_SERIAL_BFIN_SPORT is not set
|
||||||
|
|
|
@ -330,10 +330,9 @@ CONFIG_PM=y
|
||||||
# CONFIG_PM_LEGACY is not set
|
# CONFIG_PM_LEGACY is not set
|
||||||
# CONFIG_PM_DEBUG is not set
|
# CONFIG_PM_DEBUG is not set
|
||||||
# CONFIG_PM_SYSFS_DEPRECATED is not set
|
# CONFIG_PM_SYSFS_DEPRECATED is not set
|
||||||
CONFIG_PM_WAKEUP_GPIO_BY_SIC_IWR=y
|
CONFIG_PM_BFIN_SLEEP_DEEPER=y
|
||||||
|
# CONFIG_PM_BFIN_SLEEP is not set
|
||||||
# CONFIG_PM_WAKEUP_BY_GPIO is not set
|
# CONFIG_PM_WAKEUP_BY_GPIO is not set
|
||||||
# CONFIG_PM_WAKEUP_GPIO_API is not set
|
|
||||||
CONFIG_PM_WAKEUP_SIC_IWR=0x8
|
|
||||||
|
|
||||||
#
|
#
|
||||||
# CPU Frequency scaling
|
# CPU Frequency scaling
|
||||||
|
@ -1013,6 +1012,7 @@ CONFIG_SND_BFIN_AD73311_SE=4
|
||||||
CONFIG_SND_SOC_AC97_BUS=y
|
CONFIG_SND_SOC_AC97_BUS=y
|
||||||
CONFIG_SND_SOC=m
|
CONFIG_SND_SOC=m
|
||||||
CONFIG_SND_BF5XX_SOC=m
|
CONFIG_SND_BF5XX_SOC=m
|
||||||
|
CONFIG_SND_MMAP_SUPPORT=y
|
||||||
CONFIG_SND_BF5XX_SOC_AC97=m
|
CONFIG_SND_BF5XX_SOC_AC97=m
|
||||||
# CONFIG_SND_BF5XX_SOC_WM8750 is not set
|
# CONFIG_SND_BF5XX_SOC_WM8750 is not set
|
||||||
# CONFIG_SND_BF5XX_SOC_WM8731 is not set
|
# CONFIG_SND_BF5XX_SOC_WM8731 is not set
|
||||||
|
|
|
@ -396,6 +396,7 @@ CONFIG_BINFMT_ZFLAT=y
|
||||||
# Power management options
|
# Power management options
|
||||||
#
|
#
|
||||||
# CONFIG_PM is not set
|
# CONFIG_PM is not set
|
||||||
|
# CONFIG_PM_WAKEUP_BY_GPIO is not set
|
||||||
|
|
||||||
#
|
#
|
||||||
# CPU Frequency scaling
|
# CPU Frequency scaling
|
||||||
|
@ -1075,6 +1076,7 @@ CONFIG_SND_VERBOSE_PROCFS=y
|
||||||
CONFIG_SND_SOC_AC97_BUS=y
|
CONFIG_SND_SOC_AC97_BUS=y
|
||||||
CONFIG_SND_SOC=y
|
CONFIG_SND_SOC=y
|
||||||
CONFIG_SND_BF5XX_SOC=y
|
CONFIG_SND_BF5XX_SOC=y
|
||||||
|
CONFIG_SND_MMAP_SUPPORT=y
|
||||||
CONFIG_SND_BF5XX_SOC_AC97=y
|
CONFIG_SND_BF5XX_SOC_AC97=y
|
||||||
CONFIG_SND_BF5XX_SOC_BF548_EZKIT=y
|
CONFIG_SND_BF5XX_SOC_BF548_EZKIT=y
|
||||||
# CONFIG_SND_BF5XX_SOC_WM8750 is not set
|
# CONFIG_SND_BF5XX_SOC_WM8750 is not set
|
||||||
|
|
|
@ -367,6 +367,7 @@ CONFIG_BINFMT_ZFLAT=y
|
||||||
# Power management options
|
# Power management options
|
||||||
#
|
#
|
||||||
# CONFIG_PM is not set
|
# CONFIG_PM is not set
|
||||||
|
# CONFIG_PM_WAKEUP_BY_GPIO is not set
|
||||||
|
|
||||||
#
|
#
|
||||||
# Networking
|
# Networking
|
||||||
|
|
|
@ -105,13 +105,14 @@ int request_dma(unsigned int channel, char *device_id)
|
||||||
mutex_unlock(&(dma_ch[channel].dmalock));
|
mutex_unlock(&(dma_ch[channel].dmalock));
|
||||||
|
|
||||||
#ifdef CONFIG_BF54x
|
#ifdef CONFIG_BF54x
|
||||||
if (channel >= CH_UART2_RX && channel <= CH_UART3_TX &&
|
if (channel >= CH_UART2_RX && channel <= CH_UART3_TX) {
|
||||||
strncmp(device_id, "BFIN_UART", 9) == 0)
|
if (strncmp(device_id, "BFIN_UART", 9) == 0)
|
||||||
dma_ch[channel].regs->peripheral_map |=
|
dma_ch[channel].regs->peripheral_map |=
|
||||||
(channel - CH_UART2_RX + 0xC);
|
(channel - CH_UART2_RX + 0xC);
|
||||||
else
|
else
|
||||||
dma_ch[channel].regs->peripheral_map |=
|
dma_ch[channel].regs->peripheral_map |=
|
||||||
(channel - CH_UART2_RX + 0x6);
|
(channel - CH_UART2_RX + 0x6);
|
||||||
|
}
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
dma_ch[channel].device_id = device_id;
|
dma_ch[channel].device_id = device_id;
|
||||||
|
|
|
@ -1,9 +1,9 @@
|
||||||
/*
|
/*
|
||||||
* bfin_gptimers.c - derived from bf53x_timers.c
|
* gptimers.c - Blackfin General Purpose Timer core API
|
||||||
* Driver for General Purpose Timer functions on the Blackfin processor
|
|
||||||
*
|
*
|
||||||
* Copyright (C) 2005 John DeHority
|
* Copyright (c) 2005-2008 Analog Devices Inc.
|
||||||
* Copyright (C) 2006 Hella Aglaia GmbH (awe@aglaia-gmbh.de)
|
* Copyright (C) 2005 John DeHority
|
||||||
|
* Copyright (C) 2006 Hella Aglaia GmbH (awe@aglaia-gmbh.de)
|
||||||
*
|
*
|
||||||
* Licensed under the GPLv2.
|
* Licensed under the GPLv2.
|
||||||
*/
|
*/
|
||||||
|
|
|
@ -32,6 +32,7 @@
|
||||||
static DEFINE_PER_CPU(struct cpu, cpu_devices);
|
static DEFINE_PER_CPU(struct cpu, cpu_devices);
|
||||||
|
|
||||||
u16 _bfin_swrst;
|
u16 _bfin_swrst;
|
||||||
|
EXPORT_SYMBOL(_bfin_swrst);
|
||||||
|
|
||||||
unsigned long memory_start, memory_end, physical_mem_end;
|
unsigned long memory_start, memory_end, physical_mem_end;
|
||||||
unsigned long reserved_mem_dcache_on;
|
unsigned long reserved_mem_dcache_on;
|
||||||
|
@ -514,6 +515,7 @@ static __init void memory_setup(void)
|
||||||
printk(KERN_INFO "Kernel Managed Memory: %ldMB\n", _ramend >> 20);
|
printk(KERN_INFO "Kernel Managed Memory: %ldMB\n", _ramend >> 20);
|
||||||
|
|
||||||
printk(KERN_INFO "Memory map:\n"
|
printk(KERN_INFO "Memory map:\n"
|
||||||
|
KERN_INFO " fixedcode = 0x%p-0x%p\n"
|
||||||
KERN_INFO " text = 0x%p-0x%p\n"
|
KERN_INFO " text = 0x%p-0x%p\n"
|
||||||
KERN_INFO " rodata = 0x%p-0x%p\n"
|
KERN_INFO " rodata = 0x%p-0x%p\n"
|
||||||
KERN_INFO " bss = 0x%p-0x%p\n"
|
KERN_INFO " bss = 0x%p-0x%p\n"
|
||||||
|
@ -527,7 +529,8 @@ static __init void memory_setup(void)
|
||||||
#if DMA_UNCACHED_REGION > 0
|
#if DMA_UNCACHED_REGION > 0
|
||||||
KERN_INFO " DMA Zone = 0x%p-0x%p\n"
|
KERN_INFO " DMA Zone = 0x%p-0x%p\n"
|
||||||
#endif
|
#endif
|
||||||
, _stext, _etext,
|
, (void *)FIXED_CODE_START, (void *)FIXED_CODE_END,
|
||||||
|
_stext, _etext,
|
||||||
__start_rodata, __end_rodata,
|
__start_rodata, __end_rodata,
|
||||||
__bss_start, __bss_stop,
|
__bss_start, __bss_stop,
|
||||||
_sdata, _edata,
|
_sdata, _edata,
|
||||||
|
|
|
@ -147,44 +147,64 @@ SECTIONS
|
||||||
|
|
||||||
__l1_lma_start = .;
|
__l1_lma_start = .;
|
||||||
|
|
||||||
|
#if L1_CODE_LENGTH
|
||||||
|
# define LDS_L1_CODE *(.l1.text)
|
||||||
|
#else
|
||||||
|
# define LDS_L1_CODE
|
||||||
|
#endif
|
||||||
.text_l1 L1_CODE_START : AT(LOADADDR(.init.ramfs) + SIZEOF(.init.ramfs))
|
.text_l1 L1_CODE_START : AT(LOADADDR(.init.ramfs) + SIZEOF(.init.ramfs))
|
||||||
{
|
{
|
||||||
. = ALIGN(4);
|
. = ALIGN(4);
|
||||||
__stext_l1 = .;
|
__stext_l1 = .;
|
||||||
*(.l1.text)
|
LDS_L1_CODE
|
||||||
|
|
||||||
. = ALIGN(4);
|
. = ALIGN(4);
|
||||||
__etext_l1 = .;
|
__etext_l1 = .;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
#if L1_DATA_A_LENGTH
|
||||||
|
# define LDS_L1_A_DATA *(.l1.data)
|
||||||
|
# define LDS_L1_A_BSS *(.l1.bss)
|
||||||
|
# define LDS_L1_A_CACHE *(.data_l1.cacheline_aligned)
|
||||||
|
#else
|
||||||
|
# define LDS_L1_A_DATA
|
||||||
|
# define LDS_L1_A_BSS
|
||||||
|
# define LDS_L1_A_CACHE
|
||||||
|
#endif
|
||||||
.data_l1 L1_DATA_A_START : AT(LOADADDR(.text_l1) + SIZEOF(.text_l1))
|
.data_l1 L1_DATA_A_START : AT(LOADADDR(.text_l1) + SIZEOF(.text_l1))
|
||||||
{
|
{
|
||||||
. = ALIGN(4);
|
. = ALIGN(4);
|
||||||
__sdata_l1 = .;
|
__sdata_l1 = .;
|
||||||
*(.l1.data)
|
LDS_L1_A_DATA
|
||||||
__edata_l1 = .;
|
__edata_l1 = .;
|
||||||
|
|
||||||
. = ALIGN(4);
|
. = ALIGN(4);
|
||||||
__sbss_l1 = .;
|
__sbss_l1 = .;
|
||||||
*(.l1.bss)
|
LDS_L1_A_BSS
|
||||||
|
|
||||||
. = ALIGN(32);
|
. = ALIGN(32);
|
||||||
*(.data_l1.cacheline_aligned)
|
LDS_L1_A_CACHE
|
||||||
|
|
||||||
. = ALIGN(4);
|
. = ALIGN(4);
|
||||||
__ebss_l1 = .;
|
__ebss_l1 = .;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
#if L1_DATA_B_LENGTH
|
||||||
|
# define LDS_L1_B_DATA *(.l1.data.B)
|
||||||
|
# define LDS_L1_B_BSS *(.l1.bss.B)
|
||||||
|
#else
|
||||||
|
# define LDS_L1_B_DATA
|
||||||
|
# define LDS_L1_B_BSS
|
||||||
|
#endif
|
||||||
.data_b_l1 L1_DATA_B_START : AT(LOADADDR(.data_l1) + SIZEOF(.data_l1))
|
.data_b_l1 L1_DATA_B_START : AT(LOADADDR(.data_l1) + SIZEOF(.data_l1))
|
||||||
{
|
{
|
||||||
. = ALIGN(4);
|
. = ALIGN(4);
|
||||||
__sdata_b_l1 = .;
|
__sdata_b_l1 = .;
|
||||||
*(.l1.data.B)
|
LDS_L1_B_DATA
|
||||||
__edata_b_l1 = .;
|
__edata_b_l1 = .;
|
||||||
|
|
||||||
. = ALIGN(4);
|
. = ALIGN(4);
|
||||||
__sbss_b_l1 = .;
|
__sbss_b_l1 = .;
|
||||||
*(.l1.bss.B)
|
LDS_L1_B_BSS
|
||||||
|
|
||||||
. = ALIGN(4);
|
. = ALIGN(4);
|
||||||
__ebss_b_l1 = .;
|
__ebss_b_l1 = .;
|
||||||
|
|
|
@ -180,8 +180,8 @@ static struct mtd_partition partition_info[] = {
|
||||||
},
|
},
|
||||||
{
|
{
|
||||||
.name = "File System",
|
.name = "File System",
|
||||||
.offset = 4 * SIZE_1M,
|
.offset = MTDPART_OFS_APPEND,
|
||||||
.size = (256 - 4) * SIZE_1M,
|
.size = MTDPART_SIZ_FULL,
|
||||||
},
|
},
|
||||||
};
|
};
|
||||||
|
|
||||||
|
@ -422,11 +422,11 @@ static struct mtd_partition bfin_spi_flash_partitions[] = {
|
||||||
}, {
|
}, {
|
||||||
.name = "kernel",
|
.name = "kernel",
|
||||||
.size = 0xe0000,
|
.size = 0xe0000,
|
||||||
.offset = 0x20000
|
.offset = MTDPART_OFS_APPEND,
|
||||||
}, {
|
}, {
|
||||||
.name = "file system",
|
.name = "file system",
|
||||||
.size = 0x700000,
|
.size = MTDPART_SIZ_FULL,
|
||||||
.offset = 0x00100000,
|
.offset = MTDPART_OFS_APPEND,
|
||||||
}
|
}
|
||||||
};
|
};
|
||||||
|
|
||||||
|
@ -484,13 +484,6 @@ static struct bfin5xx_spi_chip spi_si3xxx_chip_info = {
|
||||||
};
|
};
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#if defined(CONFIG_AD5304) || defined(CONFIG_AD5304_MODULE)
|
|
||||||
static struct bfin5xx_spi_chip ad5304_chip_info = {
|
|
||||||
.enable_dma = 0,
|
|
||||||
.bits_per_word = 16,
|
|
||||||
};
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
|
#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
|
||||||
static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
|
static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
|
||||||
.enable_dma = 0,
|
.enable_dma = 0,
|
||||||
|
@ -611,17 +604,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
|
||||||
.mode = SPI_MODE_3,
|
.mode = SPI_MODE_3,
|
||||||
},
|
},
|
||||||
#endif
|
#endif
|
||||||
#if defined(CONFIG_AD5304) || defined(CONFIG_AD5304_MODULE)
|
|
||||||
{
|
|
||||||
.modalias = "ad5304_spi",
|
|
||||||
.max_speed_hz = 1250000, /* max spi clock (SCK) speed in HZ */
|
|
||||||
.bus_num = 0,
|
|
||||||
.chip_select = 2,
|
|
||||||
.platform_data = NULL,
|
|
||||||
.controller_data = &ad5304_chip_info,
|
|
||||||
.mode = SPI_MODE_2,
|
|
||||||
},
|
|
||||||
#endif
|
|
||||||
#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
|
#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
|
||||||
{
|
{
|
||||||
.modalias = "ad7877",
|
.modalias = "ad7877",
|
||||||
|
@ -818,6 +800,19 @@ static struct platform_device bfin_device_gpiokeys = {
|
||||||
};
|
};
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
static struct resource bfin_gpios_resources = {
|
||||||
|
.start = 0,
|
||||||
|
.end = MAX_BLACKFIN_GPIOS - 1,
|
||||||
|
.flags = IORESOURCE_IRQ,
|
||||||
|
};
|
||||||
|
|
||||||
|
static struct platform_device bfin_gpios_device = {
|
||||||
|
.name = "simple-gpio",
|
||||||
|
.id = -1,
|
||||||
|
.num_resources = 1,
|
||||||
|
.resource = &bfin_gpios_resources,
|
||||||
|
};
|
||||||
|
|
||||||
static struct platform_device *stamp_devices[] __initdata = {
|
static struct platform_device *stamp_devices[] __initdata = {
|
||||||
#if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
|
#if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
|
||||||
&bf5xx_nand_device,
|
&bf5xx_nand_device,
|
||||||
|
@ -895,6 +890,8 @@ static struct platform_device *stamp_devices[] __initdata = {
|
||||||
#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
|
#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
|
||||||
&bfin_device_gpiokeys,
|
&bfin_device_gpiokeys,
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
&bfin_gpios_device,
|
||||||
};
|
};
|
||||||
|
|
||||||
static int __init stamp_init(void)
|
static int __init stamp_init(void)
|
||||||
|
@ -921,13 +918,18 @@ void native_machine_restart(char *cmd)
|
||||||
bfin_gpio_reset_spi0_ssel1();
|
bfin_gpio_reset_spi0_ssel1();
|
||||||
}
|
}
|
||||||
|
|
||||||
/*
|
|
||||||
* Currently the MAC address is saved in Flash by U-Boot
|
|
||||||
*/
|
|
||||||
#define FLASH_MAC 0x203f0000
|
|
||||||
void bfin_get_ether_addr(char *addr)
|
void bfin_get_ether_addr(char *addr)
|
||||||
{
|
{
|
||||||
*(u32 *)(&(addr[0])) = bfin_read32(FLASH_MAC);
|
/* the MAC is stored in OTP memory page 0xDF */
|
||||||
*(u16 *)(&(addr[4])) = bfin_read16(FLASH_MAC + 4);
|
u32 ret;
|
||||||
|
u64 otp_mac;
|
||||||
|
u32 (*otp_read)(u32 page, u32 flags, u64 *page_content) = (void *)0xEF00001A;
|
||||||
|
|
||||||
|
ret = otp_read(0xDF, 0x00, &otp_mac);
|
||||||
|
if (!(ret & 0x1)) {
|
||||||
|
char *otp_mac_p = (char *)&otp_mac;
|
||||||
|
for (ret = 0; ret < 6; ++ret)
|
||||||
|
addr[ret] = otp_mac_p[5 - ret];
|
||||||
|
}
|
||||||
}
|
}
|
||||||
EXPORT_SYMBOL(bfin_get_ether_addr);
|
EXPORT_SYMBOL(bfin_get_ether_addr);
|
||||||
|
|
|
@ -99,11 +99,11 @@ static struct mtd_partition bfin_spi_flash_partitions[] = {
|
||||||
}, {
|
}, {
|
||||||
.name = "kernel",
|
.name = "kernel",
|
||||||
.size = 0xe0000,
|
.size = 0xe0000,
|
||||||
.offset = 0x20000
|
.offset = MTDPART_OFS_APPEND,
|
||||||
}, {
|
}, {
|
||||||
.name = "file system",
|
.name = "file system",
|
||||||
.size = 0x700000,
|
.size = MTDPART_SIZ_FULL,
|
||||||
.offset = 0x00100000,
|
.offset = MTDPART_OFS_APPEND,
|
||||||
}
|
}
|
||||||
};
|
};
|
||||||
|
|
||||||
|
@ -298,6 +298,19 @@ static struct platform_device bfin_device_gpiokeys = {
|
||||||
};
|
};
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
static struct resource bfin_gpios_resources = {
|
||||||
|
.start = 0,
|
||||||
|
.end = MAX_BLACKFIN_GPIOS - 1,
|
||||||
|
.flags = IORESOURCE_IRQ,
|
||||||
|
};
|
||||||
|
|
||||||
|
static struct platform_device bfin_gpios_device = {
|
||||||
|
.name = "simple-gpio",
|
||||||
|
.id = -1,
|
||||||
|
.num_resources = 1,
|
||||||
|
.resource = &bfin_gpios_resources,
|
||||||
|
};
|
||||||
|
|
||||||
#if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
|
#if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
|
||||||
#include <linux/i2c-gpio.h>
|
#include <linux/i2c-gpio.h>
|
||||||
|
|
||||||
|
@ -350,6 +363,8 @@ static struct platform_device *ezkit_devices[] __initdata = {
|
||||||
#if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
|
#if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
|
||||||
&i2c_gpio_device,
|
&i2c_gpio_device,
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
&bfin_gpios_device,
|
||||||
};
|
};
|
||||||
|
|
||||||
static int __init ezkit_init(void)
|
static int __init ezkit_init(void)
|
||||||
|
|
|
@ -112,7 +112,7 @@ static struct platform_device net2272_bfin_device = {
|
||||||
static struct mtd_partition stamp_partitions[] = {
|
static struct mtd_partition stamp_partitions[] = {
|
||||||
{
|
{
|
||||||
.name = "Bootloader",
|
.name = "Bootloader",
|
||||||
.size = 0x20000,
|
.size = 0x40000,
|
||||||
.offset = 0,
|
.offset = 0,
|
||||||
}, {
|
}, {
|
||||||
.name = "Kernel",
|
.name = "Kernel",
|
||||||
|
@ -160,17 +160,17 @@ static struct platform_device stamp_flash_device = {
|
||||||
static struct mtd_partition bfin_spi_flash_partitions[] = {
|
static struct mtd_partition bfin_spi_flash_partitions[] = {
|
||||||
{
|
{
|
||||||
.name = "bootloader",
|
.name = "bootloader",
|
||||||
.size = 0x00020000,
|
.size = 0x00040000,
|
||||||
.offset = 0,
|
.offset = 0,
|
||||||
.mask_flags = MTD_CAP_ROM
|
.mask_flags = MTD_CAP_ROM
|
||||||
}, {
|
}, {
|
||||||
.name = "kernel",
|
.name = "kernel",
|
||||||
.size = 0xe0000,
|
.size = 0xe0000,
|
||||||
.offset = 0x20000
|
.offset = MTDPART_OFS_APPEND,
|
||||||
}, {
|
}, {
|
||||||
.name = "file system",
|
.name = "file system",
|
||||||
.size = 0x700000,
|
.size = MTDPART_SIZ_FULL,
|
||||||
.offset = 0x00100000,
|
.offset = MTDPART_OFS_APPEND,
|
||||||
}
|
}
|
||||||
};
|
};
|
||||||
|
|
||||||
|
@ -212,13 +212,6 @@ static struct bfin5xx_spi_chip spi_si3xxx_chip_info = {
|
||||||
};
|
};
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#if defined(CONFIG_AD5304) || defined(CONFIG_AD5304_MODULE)
|
|
||||||
static struct bfin5xx_spi_chip ad5304_chip_info = {
|
|
||||||
.enable_dma = 0,
|
|
||||||
.bits_per_word = 16,
|
|
||||||
};
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
|
#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
|
||||||
static struct bfin5xx_spi_chip spi_mmc_chip_info = {
|
static struct bfin5xx_spi_chip spi_mmc_chip_info = {
|
||||||
.enable_dma = 1,
|
.enable_dma = 1,
|
||||||
|
@ -308,17 +301,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
|
||||||
},
|
},
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#if defined(CONFIG_AD5304) || defined(CONFIG_AD5304_MODULE)
|
|
||||||
{
|
|
||||||
.modalias = "ad5304_spi",
|
|
||||||
.max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
|
|
||||||
.bus_num = 0,
|
|
||||||
.chip_select = 2,
|
|
||||||
.platform_data = NULL,
|
|
||||||
.controller_data = &ad5304_chip_info,
|
|
||||||
.mode = SPI_MODE_2,
|
|
||||||
},
|
|
||||||
#endif
|
|
||||||
#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
|
#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
|
||||||
{
|
{
|
||||||
.modalias = "spidev",
|
.modalias = "spidev",
|
||||||
|
@ -457,6 +439,19 @@ static struct platform_device bfin_device_gpiokeys = {
|
||||||
};
|
};
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
static struct resource bfin_gpios_resources = {
|
||||||
|
.start = 0,
|
||||||
|
.end = MAX_BLACKFIN_GPIOS - 1,
|
||||||
|
.flags = IORESOURCE_IRQ,
|
||||||
|
};
|
||||||
|
|
||||||
|
static struct platform_device bfin_gpios_device = {
|
||||||
|
.name = "simple-gpio",
|
||||||
|
.id = -1,
|
||||||
|
.num_resources = 1,
|
||||||
|
.resource = &bfin_gpios_resources,
|
||||||
|
};
|
||||||
|
|
||||||
#if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
|
#if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
|
||||||
#include <linux/i2c-gpio.h>
|
#include <linux/i2c-gpio.h>
|
||||||
|
|
||||||
|
@ -518,6 +513,8 @@ static struct platform_device *stamp_devices[] __initdata = {
|
||||||
#if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
|
#if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
|
||||||
&i2c_gpio_device,
|
&i2c_gpio_device,
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
&bfin_gpios_device,
|
||||||
&stamp_flash_device,
|
&stamp_flash_device,
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
|
@ -371,13 +371,6 @@ static struct bfin5xx_spi_chip spi_si3xxx_chip_info = {
|
||||||
};
|
};
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#if defined(CONFIG_AD5304) || defined(CONFIG_AD5304_MODULE)
|
|
||||||
static struct bfin5xx_spi_chip ad5304_chip_info = {
|
|
||||||
.enable_dma = 0,
|
|
||||||
.bits_per_word = 16,
|
|
||||||
};
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
|
#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
|
||||||
static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
|
static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
|
||||||
.enable_dma = 0,
|
.enable_dma = 0,
|
||||||
|
@ -483,17 +476,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
|
||||||
.mode = SPI_MODE_3,
|
.mode = SPI_MODE_3,
|
||||||
},
|
},
|
||||||
#endif
|
#endif
|
||||||
#if defined(CONFIG_AD5304) || defined(CONFIG_AD5304_MODULE)
|
|
||||||
{
|
|
||||||
.modalias = "ad5304_spi",
|
|
||||||
.max_speed_hz = 1250000, /* max spi clock (SCK) speed in HZ */
|
|
||||||
.bus_num = 0,
|
|
||||||
.chip_select = 2,
|
|
||||||
.platform_data = NULL,
|
|
||||||
.controller_data = &ad5304_chip_info,
|
|
||||||
.mode = SPI_MODE_2,
|
|
||||||
},
|
|
||||||
#endif
|
|
||||||
#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
|
#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
|
||||||
{
|
{
|
||||||
.modalias = "ad7877",
|
.modalias = "ad7877",
|
||||||
|
|
|
@ -128,6 +128,19 @@ static struct platform_device bfin_device_gpiokeys = {
|
||||||
};
|
};
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
static struct resource bfin_gpios_resources = {
|
||||||
|
.start = 0,
|
||||||
|
.end = MAX_BLACKFIN_GPIOS - 1,
|
||||||
|
.flags = IORESOURCE_IRQ,
|
||||||
|
};
|
||||||
|
|
||||||
|
static struct platform_device bfin_gpios_device = {
|
||||||
|
.name = "simple-gpio",
|
||||||
|
.id = -1,
|
||||||
|
.num_resources = 1,
|
||||||
|
.resource = &bfin_gpios_resources,
|
||||||
|
};
|
||||||
|
|
||||||
#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
|
#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
|
||||||
static struct resource bfin_pcmcia_cf_resources[] = {
|
static struct resource bfin_pcmcia_cf_resources[] = {
|
||||||
{
|
{
|
||||||
|
@ -343,7 +356,7 @@ static struct platform_device net2272_bfin_device = {
|
||||||
static struct mtd_partition stamp_partitions[] = {
|
static struct mtd_partition stamp_partitions[] = {
|
||||||
{
|
{
|
||||||
.name = "Bootloader",
|
.name = "Bootloader",
|
||||||
.size = 0x20000,
|
.size = 0x40000,
|
||||||
.offset = 0,
|
.offset = 0,
|
||||||
}, {
|
}, {
|
||||||
.name = "Kernel",
|
.name = "Kernel",
|
||||||
|
@ -351,7 +364,7 @@ static struct mtd_partition stamp_partitions[] = {
|
||||||
.offset = MTDPART_OFS_APPEND,
|
.offset = MTDPART_OFS_APPEND,
|
||||||
}, {
|
}, {
|
||||||
.name = "RootFS",
|
.name = "RootFS",
|
||||||
.size = 0x400000 - 0x20000 - 0xE0000 - 0x10000,
|
.size = 0x400000 - 0x40000 - 0xE0000 - 0x10000,
|
||||||
.offset = MTDPART_OFS_APPEND,
|
.offset = MTDPART_OFS_APPEND,
|
||||||
}, {
|
}, {
|
||||||
.name = "MAC Address",
|
.name = "MAC Address",
|
||||||
|
@ -391,17 +404,17 @@ static struct platform_device stamp_flash_device = {
|
||||||
static struct mtd_partition bfin_spi_flash_partitions[] = {
|
static struct mtd_partition bfin_spi_flash_partitions[] = {
|
||||||
{
|
{
|
||||||
.name = "bootloader",
|
.name = "bootloader",
|
||||||
.size = 0x00020000,
|
.size = 0x00040000,
|
||||||
.offset = 0,
|
.offset = 0,
|
||||||
.mask_flags = MTD_CAP_ROM
|
.mask_flags = MTD_CAP_ROM
|
||||||
}, {
|
}, {
|
||||||
.name = "kernel",
|
.name = "kernel",
|
||||||
.size = 0xe0000,
|
.size = 0xe0000,
|
||||||
.offset = 0x20000
|
.offset = MTDPART_OFS_APPEND,
|
||||||
}, {
|
}, {
|
||||||
.name = "file system",
|
.name = "file system",
|
||||||
.size = 0x700000,
|
.size = MTDPART_SIZ_FULL,
|
||||||
.offset = 0x00100000,
|
.offset = MTDPART_OFS_APPEND,
|
||||||
}
|
}
|
||||||
};
|
};
|
||||||
|
|
||||||
|
@ -459,13 +472,6 @@ static struct bfin5xx_spi_chip spi_si3xxx_chip_info = {
|
||||||
};
|
};
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#if defined(CONFIG_AD5304) || defined(CONFIG_AD5304_MODULE)
|
|
||||||
static struct bfin5xx_spi_chip ad5304_chip_info = {
|
|
||||||
.enable_dma = 0,
|
|
||||||
.bits_per_word = 16,
|
|
||||||
};
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
|
#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
|
||||||
static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
|
static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
|
||||||
.enable_dma = 0,
|
.enable_dma = 0,
|
||||||
|
@ -578,17 +584,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
|
||||||
.mode = SPI_MODE_3,
|
.mode = SPI_MODE_3,
|
||||||
},
|
},
|
||||||
#endif
|
#endif
|
||||||
#if defined(CONFIG_AD5304) || defined(CONFIG_AD5304_MODULE)
|
|
||||||
{
|
|
||||||
.modalias = "ad5304_spi",
|
|
||||||
.max_speed_hz = 1250000, /* max spi clock (SCK) speed in HZ */
|
|
||||||
.bus_num = 0,
|
|
||||||
.chip_select = 2,
|
|
||||||
.platform_data = NULL,
|
|
||||||
.controller_data = &ad5304_chip_info,
|
|
||||||
.mode = SPI_MODE_2,
|
|
||||||
},
|
|
||||||
#endif
|
|
||||||
#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
|
#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
|
||||||
{
|
{
|
||||||
.modalias = "ad7877",
|
.modalias = "ad7877",
|
||||||
|
@ -821,6 +816,8 @@ static struct platform_device *stamp_devices[] __initdata = {
|
||||||
#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
|
#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
|
||||||
&bfin_device_gpiokeys,
|
&bfin_device_gpiokeys,
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
&bfin_gpios_device,
|
||||||
&stamp_flash_device,
|
&stamp_flash_device,
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
|
@ -285,8 +285,8 @@ static struct mtd_partition partition_info[] = {
|
||||||
},
|
},
|
||||||
{
|
{
|
||||||
.name = "File System",
|
.name = "File System",
|
||||||
.offset = 4 * SIZE_1M,
|
.offset = MTDPART_OFS_APPEND,
|
||||||
.size = (256 - 4) * SIZE_1M,
|
.size = MTDPART_SIZ_FULL,
|
||||||
},
|
},
|
||||||
};
|
};
|
||||||
|
|
||||||
|
@ -333,7 +333,7 @@ static struct platform_device bf54x_sdh_device = {
|
||||||
static struct mtd_partition ezkit_partitions[] = {
|
static struct mtd_partition ezkit_partitions[] = {
|
||||||
{
|
{
|
||||||
.name = "Bootloader",
|
.name = "Bootloader",
|
||||||
.size = 0x20000,
|
.size = 0x40000,
|
||||||
.offset = 0,
|
.offset = 0,
|
||||||
}, {
|
}, {
|
||||||
.name = "Kernel",
|
.name = "Kernel",
|
||||||
|
@ -381,8 +381,8 @@ static struct mtd_partition bfin_spi_flash_partitions[] = {
|
||||||
.mask_flags = MTD_CAP_ROM
|
.mask_flags = MTD_CAP_ROM
|
||||||
}, {
|
}, {
|
||||||
.name = "linux kernel",
|
.name = "linux kernel",
|
||||||
.size = 0x1c0000,
|
.size = MTDPART_SIZ_FULL,
|
||||||
.offset = 0x40000
|
.offset = MTDPART_OFS_APPEND,
|
||||||
}
|
}
|
||||||
};
|
};
|
||||||
|
|
||||||
|
@ -594,6 +594,19 @@ static struct platform_device bfin_device_gpiokeys = {
|
||||||
};
|
};
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
static struct resource bfin_gpios_resources = {
|
||||||
|
.start = 0,
|
||||||
|
.end = MAX_BLACKFIN_GPIOS - 1,
|
||||||
|
.flags = IORESOURCE_IRQ,
|
||||||
|
};
|
||||||
|
|
||||||
|
static struct platform_device bfin_gpios_device = {
|
||||||
|
.name = "simple-gpio",
|
||||||
|
.id = -1,
|
||||||
|
.num_resources = 1,
|
||||||
|
.resource = &bfin_gpios_resources,
|
||||||
|
};
|
||||||
|
|
||||||
static struct platform_device *ezkit_devices[] __initdata = {
|
static struct platform_device *ezkit_devices[] __initdata = {
|
||||||
#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
|
#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
|
||||||
&rtc_device,
|
&rtc_device,
|
||||||
|
@ -646,6 +659,8 @@ static struct platform_device *ezkit_devices[] __initdata = {
|
||||||
#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
|
#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
|
||||||
&bfin_device_gpiokeys,
|
&bfin_device_gpiokeys,
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
&bfin_gpios_device,
|
||||||
&ezkit_flash_device,
|
&ezkit_flash_device,
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
|
@ -27,6 +27,8 @@
|
||||||
* 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
* 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
||||||
*/
|
*/
|
||||||
|
|
||||||
|
#include <linux/module.h>
|
||||||
|
|
||||||
#include <asm/blackfin.h>
|
#include <asm/blackfin.h>
|
||||||
#include <asm/dma.h>
|
#include <asm/dma.h>
|
||||||
|
|
||||||
|
|
|
@ -28,6 +28,7 @@
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#include <linux/linkage.h>
|
#include <linux/linkage.h>
|
||||||
|
#include <linux/init.h>
|
||||||
#include <asm/blackfin.h>
|
#include <asm/blackfin.h>
|
||||||
#include <asm/trace.h>
|
#include <asm/trace.h>
|
||||||
#if CONFIG_BFIN_KERNEL_CLOCK
|
#if CONFIG_BFIN_KERNEL_CLOCK
|
||||||
|
@ -44,10 +45,9 @@
|
||||||
|
|
||||||
#define INITIAL_STACK 0xFFB01000
|
#define INITIAL_STACK 0xFFB01000
|
||||||
|
|
||||||
.text
|
__INIT
|
||||||
|
|
||||||
ENTRY(__start)
|
ENTRY(__start)
|
||||||
ENTRY(__stext)
|
|
||||||
/* R0: argument of command line string, passed from uboot, save it */
|
/* R0: argument of command line string, passed from uboot, save it */
|
||||||
R7 = R0;
|
R7 = R0;
|
||||||
/* Enable Cycle Counter and Nesting Of Interrupts */
|
/* Enable Cycle Counter and Nesting Of Interrupts */
|
||||||
|
@ -213,6 +213,7 @@ ENTRY(__stext)
|
||||||
|
|
||||||
.LWAIT_HERE:
|
.LWAIT_HERE:
|
||||||
jump .LWAIT_HERE;
|
jump .LWAIT_HERE;
|
||||||
|
ENDPROC(__start)
|
||||||
|
|
||||||
ENTRY(_real_start)
|
ENTRY(_real_start)
|
||||||
[ -- sp ] = reti;
|
[ -- sp ] = reti;
|
||||||
|
@ -285,6 +286,9 @@ ENTRY(_real_start)
|
||||||
call _start_kernel;
|
call _start_kernel;
|
||||||
.L_exit:
|
.L_exit:
|
||||||
jump.s .L_exit;
|
jump.s .L_exit;
|
||||||
|
ENDPROC(_real_start)
|
||||||
|
|
||||||
|
__FINIT
|
||||||
|
|
||||||
.section .l1.text
|
.section .l1.text
|
||||||
#if CONFIG_BFIN_KERNEL_CLOCK
|
#if CONFIG_BFIN_KERNEL_CLOCK
|
||||||
|
@ -450,6 +454,7 @@ ENTRY(_start_dma_code)
|
||||||
SSYNC;
|
SSYNC;
|
||||||
|
|
||||||
RTS;
|
RTS;
|
||||||
|
ENDPROC(_start_dma_code)
|
||||||
#endif /* CONFIG_BFIN_KERNEL_CLOCK */
|
#endif /* CONFIG_BFIN_KERNEL_CLOCK */
|
||||||
|
|
||||||
.data
|
.data
|
||||||
|
|
|
@ -223,7 +223,7 @@ static struct platform_device bfin_uart_device = {
|
||||||
static struct mtd_partition ezkit_partitions[] = {
|
static struct mtd_partition ezkit_partitions[] = {
|
||||||
{
|
{
|
||||||
.name = "Bootloader",
|
.name = "Bootloader",
|
||||||
.size = 0x20000,
|
.size = 0x40000,
|
||||||
.offset = 0,
|
.offset = 0,
|
||||||
}, {
|
}, {
|
||||||
.name = "Kernel",
|
.name = "Kernel",
|
||||||
|
@ -389,6 +389,19 @@ static struct platform_device bfin_device_gpiokeys = {
|
||||||
};
|
};
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
static struct resource bfin_gpios_resources = {
|
||||||
|
.start = 0,
|
||||||
|
.end = MAX_BLACKFIN_GPIOS - 1,
|
||||||
|
.flags = IORESOURCE_IRQ,
|
||||||
|
};
|
||||||
|
|
||||||
|
static struct platform_device bfin_gpios_device = {
|
||||||
|
.name = "simple-gpio",
|
||||||
|
.id = -1,
|
||||||
|
.num_resources = 1,
|
||||||
|
.resource = &bfin_gpios_resources,
|
||||||
|
};
|
||||||
|
|
||||||
#if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
|
#if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
|
||||||
#include <linux/i2c-gpio.h>
|
#include <linux/i2c-gpio.h>
|
||||||
|
|
||||||
|
@ -446,6 +459,7 @@ static struct platform_device *ezkit_devices[] __initdata = {
|
||||||
&isp1362_hcd_device,
|
&isp1362_hcd_device,
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
&bfin_gpios_device,
|
||||||
&ezkit_flash_device,
|
&ezkit_flash_device,
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
|
@ -31,140 +31,6 @@
|
||||||
#include <asm/blackfin.h>
|
#include <asm/blackfin.h>
|
||||||
#include <asm/mach/irq.h>
|
#include <asm/mach/irq.h>
|
||||||
|
|
||||||
.text
|
|
||||||
|
|
||||||
ENTRY(_unmask_wdog_wakeup_evt)
|
|
||||||
[--SP] = ( R7:0, P5:0 );
|
|
||||||
#if defined(CONFIG_BF561)
|
|
||||||
P0.H = hi(SICA_IWR1);
|
|
||||||
P0.L = lo(SICA_IWR1);
|
|
||||||
#elif defined(CONFIG_BF54x) || defined(CONFIG_BF52x)
|
|
||||||
P0.h = HI(SIC_IWR0);
|
|
||||||
P0.l = LO(SIC_IWR0);
|
|
||||||
#else
|
|
||||||
P0.h = HI(SIC_IWR);
|
|
||||||
P0.l = LO(SIC_IWR);
|
|
||||||
#endif
|
|
||||||
R7 = [P0];
|
|
||||||
#if defined(CONFIG_BF561)
|
|
||||||
BITSET(R7, 27);
|
|
||||||
#else
|
|
||||||
BITSET(R7,(IRQ_WATCH - IVG7));
|
|
||||||
#endif
|
|
||||||
[P0] = R7;
|
|
||||||
SSYNC;
|
|
||||||
|
|
||||||
( R7:0, P5:0 ) = [SP++];
|
|
||||||
RTS;
|
|
||||||
|
|
||||||
.LWRITE_TO_STAT:
|
|
||||||
/* When watch dog timer is enabled, a write to STAT will load the
|
|
||||||
* contents of CNT to STAT
|
|
||||||
*/
|
|
||||||
R7 = 0x0000(z);
|
|
||||||
#if defined(CONFIG_BF561)
|
|
||||||
P0.h = HI(WDOGA_STAT);
|
|
||||||
P0.l = LO(WDOGA_STAT);
|
|
||||||
#else
|
|
||||||
P0.h = HI(WDOG_STAT);
|
|
||||||
P0.l = LO(WDOG_STAT);
|
|
||||||
#endif
|
|
||||||
[P0] = R7;
|
|
||||||
SSYNC;
|
|
||||||
JUMP .LSKIP_WRITE_TO_STAT;
|
|
||||||
|
|
||||||
ENTRY(_program_wdog_timer)
|
|
||||||
[--SP] = ( R7:0, P5:0 );
|
|
||||||
#if defined(CONFIG_BF561)
|
|
||||||
P0.h = HI(WDOGA_CNT);
|
|
||||||
P0.l = LO(WDOGA_CNT);
|
|
||||||
#else
|
|
||||||
P0.h = HI(WDOG_CNT);
|
|
||||||
P0.l = LO(WDOG_CNT);
|
|
||||||
#endif
|
|
||||||
[P0] = R0;
|
|
||||||
SSYNC;
|
|
||||||
|
|
||||||
#if defined(CONFIG_BF561)
|
|
||||||
P0.h = HI(WDOGA_CTL);
|
|
||||||
P0.l = LO(WDOGA_CTL);
|
|
||||||
#else
|
|
||||||
P0.h = HI(WDOG_CTL);
|
|
||||||
P0.l = LO(WDOG_CTL);
|
|
||||||
#endif
|
|
||||||
R7 = W[P0](Z);
|
|
||||||
CC = BITTST(R7,1);
|
|
||||||
if !CC JUMP .LWRITE_TO_STAT;
|
|
||||||
CC = BITTST(R7,2);
|
|
||||||
if !CC JUMP .LWRITE_TO_STAT;
|
|
||||||
|
|
||||||
.LSKIP_WRITE_TO_STAT:
|
|
||||||
#if defined(CONFIG_BF561)
|
|
||||||
P0.h = HI(WDOGA_CTL);
|
|
||||||
P0.l = LO(WDOGA_CTL);
|
|
||||||
#else
|
|
||||||
P0.h = HI(WDOG_CTL);
|
|
||||||
P0.l = LO(WDOG_CTL);
|
|
||||||
#endif
|
|
||||||
R7 = W[P0](Z);
|
|
||||||
BITCLR(R7,1); /* Enable GP event */
|
|
||||||
BITSET(R7,2);
|
|
||||||
W[P0] = R7.L;
|
|
||||||
SSYNC;
|
|
||||||
NOP;
|
|
||||||
|
|
||||||
R7 = W[P0](Z);
|
|
||||||
BITCLR(R7,4); /* Enable the wdog counter */
|
|
||||||
W[P0] = R7.L;
|
|
||||||
SSYNC;
|
|
||||||
|
|
||||||
( R7:0, P5:0 ) = [SP++];
|
|
||||||
RTS;
|
|
||||||
|
|
||||||
ENTRY(_clear_wdog_wakeup_evt)
|
|
||||||
[--SP] = ( R7:0, P5:0 );
|
|
||||||
|
|
||||||
#if defined(CONFIG_BF561)
|
|
||||||
P0.h = HI(WDOGA_CTL);
|
|
||||||
P0.l = LO(WDOGA_CTL);
|
|
||||||
#else
|
|
||||||
P0.h = HI(WDOG_CTL);
|
|
||||||
P0.l = LO(WDOG_CTL);
|
|
||||||
#endif
|
|
||||||
R7 = 0x0AD6(Z);
|
|
||||||
W[P0] = R7.L;
|
|
||||||
SSYNC;
|
|
||||||
|
|
||||||
R7 = W[P0](Z);
|
|
||||||
BITSET(R7,15);
|
|
||||||
W[P0] = R7.L;
|
|
||||||
SSYNC;
|
|
||||||
|
|
||||||
R7 = W[P0](Z);
|
|
||||||
BITSET(R7,1);
|
|
||||||
BITSET(R7,2);
|
|
||||||
W[P0] = R7.L;
|
|
||||||
SSYNC;
|
|
||||||
|
|
||||||
( R7:0, P5:0 ) = [SP++];
|
|
||||||
RTS;
|
|
||||||
|
|
||||||
ENTRY(_disable_wdog_timer)
|
|
||||||
[--SP] = ( R7:0, P5:0 );
|
|
||||||
#if defined(CONFIG_BF561)
|
|
||||||
P0.h = HI(WDOGA_CTL);
|
|
||||||
P0.l = LO(WDOGA_CTL);
|
|
||||||
#else
|
|
||||||
P0.h = HI(WDOG_CTL);
|
|
||||||
P0.l = LO(WDOG_CTL);
|
|
||||||
#endif
|
|
||||||
R7 = 0xAD6(Z);
|
|
||||||
W[P0] = R7.L;
|
|
||||||
SSYNC;
|
|
||||||
( R7:0, P5:0 ) = [SP++];
|
|
||||||
RTS;
|
|
||||||
|
|
||||||
#if !defined(CONFIG_BF561)
|
|
||||||
|
|
||||||
.section .l1.text
|
.section .l1.text
|
||||||
|
|
||||||
|
@ -459,10 +325,12 @@ ENTRY(_set_sic_iwr)
|
||||||
RTS;
|
RTS;
|
||||||
|
|
||||||
ENTRY(_set_rtc_istat)
|
ENTRY(_set_rtc_istat)
|
||||||
|
#ifndef CONFIG_BF561
|
||||||
P0.H = hi(RTC_ISTAT);
|
P0.H = hi(RTC_ISTAT);
|
||||||
P0.L = lo(RTC_ISTAT);
|
P0.L = lo(RTC_ISTAT);
|
||||||
w[P0] = R0.L;
|
w[P0] = R0.L;
|
||||||
SSYNC;
|
SSYNC;
|
||||||
|
#endif
|
||||||
RTS;
|
RTS;
|
||||||
|
|
||||||
ENTRY(_test_pll_locked)
|
ENTRY(_test_pll_locked)
|
||||||
|
@ -473,4 +341,3 @@ ENTRY(_test_pll_locked)
|
||||||
CC = BITTST(R0,5);
|
CC = BITTST(R0,5);
|
||||||
IF !CC JUMP 1b;
|
IF !CC JUMP 1b;
|
||||||
RTS;
|
RTS;
|
||||||
#endif
|
|
||||||
|
|
|
@ -74,7 +74,7 @@ unsigned long bfin_sic_iwr[3]; /* Up to 3 SIC_IWRx registers */
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
struct ivgx {
|
struct ivgx {
|
||||||
/* irq number for request_irq, available in mach-bf533/irq.h */
|
/* irq number for request_irq, available in mach-bf5xx/irq.h */
|
||||||
unsigned int irqno;
|
unsigned int irqno;
|
||||||
/* corresponding bit in the SIC_ISR register */
|
/* corresponding bit in the SIC_ISR register */
|
||||||
unsigned int isrflag;
|
unsigned int isrflag;
|
||||||
|
@ -86,7 +86,6 @@ struct ivg_slice {
|
||||||
struct ivgx *istop;
|
struct ivgx *istop;
|
||||||
} ivg7_13[IVG13 - IVG7 + 1];
|
} ivg7_13[IVG13 - IVG7 + 1];
|
||||||
|
|
||||||
static void search_IAR(void);
|
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Search SIC_IAR and fill tables with the irqvalues
|
* Search SIC_IAR and fill tables with the irqvalues
|
||||||
|
@ -120,10 +119,10 @@ static void __init search_IAR(void)
|
||||||
}
|
}
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* This is for BF533 internal IRQs
|
* This is for core internal IRQs
|
||||||
*/
|
*/
|
||||||
|
|
||||||
static void ack_noop(unsigned int irq)
|
static void bfin_ack_noop(unsigned int irq)
|
||||||
{
|
{
|
||||||
/* Dummy function. */
|
/* Dummy function. */
|
||||||
}
|
}
|
||||||
|
@ -156,11 +155,11 @@ static void bfin_internal_mask_irq(unsigned int irq)
|
||||||
{
|
{
|
||||||
#ifdef CONFIG_BF53x
|
#ifdef CONFIG_BF53x
|
||||||
bfin_write_SIC_IMASK(bfin_read_SIC_IMASK() &
|
bfin_write_SIC_IMASK(bfin_read_SIC_IMASK() &
|
||||||
~(1 << (irq - (IRQ_CORETMR + 1))));
|
~(1 << SIC_SYSIRQ(irq)));
|
||||||
#else
|
#else
|
||||||
unsigned mask_bank, mask_bit;
|
unsigned mask_bank, mask_bit;
|
||||||
mask_bank = (irq - (IRQ_CORETMR + 1)) / 32;
|
mask_bank = SIC_SYSIRQ(irq) / 32;
|
||||||
mask_bit = (irq - (IRQ_CORETMR + 1)) % 32;
|
mask_bit = SIC_SYSIRQ(irq) % 32;
|
||||||
bfin_write_SIC_IMASK(mask_bank, bfin_read_SIC_IMASK(mask_bank) &
|
bfin_write_SIC_IMASK(mask_bank, bfin_read_SIC_IMASK(mask_bank) &
|
||||||
~(1 << mask_bit));
|
~(1 << mask_bit));
|
||||||
#endif
|
#endif
|
||||||
|
@ -171,11 +170,11 @@ static void bfin_internal_unmask_irq(unsigned int irq)
|
||||||
{
|
{
|
||||||
#ifdef CONFIG_BF53x
|
#ifdef CONFIG_BF53x
|
||||||
bfin_write_SIC_IMASK(bfin_read_SIC_IMASK() |
|
bfin_write_SIC_IMASK(bfin_read_SIC_IMASK() |
|
||||||
(1 << (irq - (IRQ_CORETMR + 1))));
|
(1 << SIC_SYSIRQ(irq)));
|
||||||
#else
|
#else
|
||||||
unsigned mask_bank, mask_bit;
|
unsigned mask_bank, mask_bit;
|
||||||
mask_bank = (irq - (IRQ_CORETMR + 1)) / 32;
|
mask_bank = SIC_SYSIRQ(irq) / 32;
|
||||||
mask_bit = (irq - (IRQ_CORETMR + 1)) % 32;
|
mask_bit = SIC_SYSIRQ(irq) % 32;
|
||||||
bfin_write_SIC_IMASK(mask_bank, bfin_read_SIC_IMASK(mask_bank) |
|
bfin_write_SIC_IMASK(mask_bank, bfin_read_SIC_IMASK(mask_bank) |
|
||||||
(1 << mask_bit));
|
(1 << mask_bit));
|
||||||
#endif
|
#endif
|
||||||
|
@ -187,8 +186,8 @@ int bfin_internal_set_wake(unsigned int irq, unsigned int state)
|
||||||
{
|
{
|
||||||
unsigned bank, bit;
|
unsigned bank, bit;
|
||||||
unsigned long flags;
|
unsigned long flags;
|
||||||
bank = (irq - (IRQ_CORETMR + 1)) / 32;
|
bank = SIC_SYSIRQ(irq) / 32;
|
||||||
bit = (irq - (IRQ_CORETMR + 1)) % 32;
|
bit = SIC_SYSIRQ(irq) % 32;
|
||||||
|
|
||||||
local_irq_save(flags);
|
local_irq_save(flags);
|
||||||
|
|
||||||
|
@ -204,15 +203,18 @@ int bfin_internal_set_wake(unsigned int irq, unsigned int state)
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
static struct irq_chip bfin_core_irqchip = {
|
static struct irq_chip bfin_core_irqchip = {
|
||||||
.ack = ack_noop,
|
.ack = bfin_ack_noop,
|
||||||
.mask = bfin_core_mask_irq,
|
.mask = bfin_core_mask_irq,
|
||||||
.unmask = bfin_core_unmask_irq,
|
.unmask = bfin_core_unmask_irq,
|
||||||
};
|
};
|
||||||
|
|
||||||
static struct irq_chip bfin_internal_irqchip = {
|
static struct irq_chip bfin_internal_irqchip = {
|
||||||
.ack = ack_noop,
|
.ack = bfin_ack_noop,
|
||||||
.mask = bfin_internal_mask_irq,
|
.mask = bfin_internal_mask_irq,
|
||||||
.unmask = bfin_internal_unmask_irq,
|
.unmask = bfin_internal_unmask_irq,
|
||||||
|
.mask_ack = bfin_internal_mask_irq,
|
||||||
|
.disable = bfin_internal_mask_irq,
|
||||||
|
.enable = bfin_internal_unmask_irq,
|
||||||
#ifdef CONFIG_PM
|
#ifdef CONFIG_PM
|
||||||
.set_wake = bfin_internal_set_wake,
|
.set_wake = bfin_internal_set_wake,
|
||||||
#endif
|
#endif
|
||||||
|
@ -221,38 +223,23 @@ static struct irq_chip bfin_internal_irqchip = {
|
||||||
#ifdef BF537_GENERIC_ERROR_INT_DEMUX
|
#ifdef BF537_GENERIC_ERROR_INT_DEMUX
|
||||||
static int error_int_mask;
|
static int error_int_mask;
|
||||||
|
|
||||||
static void bfin_generic_error_ack_irq(unsigned int irq)
|
|
||||||
{
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
static void bfin_generic_error_mask_irq(unsigned int irq)
|
static void bfin_generic_error_mask_irq(unsigned int irq)
|
||||||
{
|
{
|
||||||
error_int_mask &= ~(1L << (irq - IRQ_PPI_ERROR));
|
error_int_mask &= ~(1L << (irq - IRQ_PPI_ERROR));
|
||||||
|
|
||||||
if (!error_int_mask) {
|
if (!error_int_mask)
|
||||||
local_irq_disable();
|
bfin_internal_mask_irq(IRQ_GENERIC_ERROR);
|
||||||
bfin_write_SIC_IMASK(bfin_read_SIC_IMASK() &
|
|
||||||
~(1 << (IRQ_GENERIC_ERROR -
|
|
||||||
(IRQ_CORETMR + 1))));
|
|
||||||
SSYNC();
|
|
||||||
local_irq_enable();
|
|
||||||
}
|
|
||||||
}
|
}
|
||||||
|
|
||||||
static void bfin_generic_error_unmask_irq(unsigned int irq)
|
static void bfin_generic_error_unmask_irq(unsigned int irq)
|
||||||
{
|
{
|
||||||
local_irq_disable();
|
bfin_internal_unmask_irq(IRQ_GENERIC_ERROR);
|
||||||
bfin_write_SIC_IMASK(bfin_read_SIC_IMASK() | 1 <<
|
|
||||||
(IRQ_GENERIC_ERROR - (IRQ_CORETMR + 1)));
|
|
||||||
SSYNC();
|
|
||||||
local_irq_enable();
|
|
||||||
|
|
||||||
error_int_mask |= 1L << (irq - IRQ_PPI_ERROR);
|
error_int_mask |= 1L << (irq - IRQ_PPI_ERROR);
|
||||||
}
|
}
|
||||||
|
|
||||||
static struct irq_chip bfin_generic_error_irqchip = {
|
static struct irq_chip bfin_generic_error_irqchip = {
|
||||||
.ack = bfin_generic_error_ack_irq,
|
.ack = bfin_ack_noop,
|
||||||
|
.mask_ack = bfin_generic_error_mask_irq,
|
||||||
.mask = bfin_generic_error_mask_irq,
|
.mask = bfin_generic_error_mask_irq,
|
||||||
.unmask = bfin_generic_error_unmask_irq,
|
.unmask = bfin_generic_error_unmask_irq,
|
||||||
};
|
};
|
||||||
|
@ -608,7 +595,7 @@ static struct pin_int_t *pint[NR_PINT_SYS_IRQS] = {
|
||||||
(struct pin_int_t *)PINT3_MASK_SET,
|
(struct pin_int_t *)PINT3_MASK_SET,
|
||||||
};
|
};
|
||||||
|
|
||||||
unsigned short get_irq_base(u8 bank, u8 bmap)
|
inline unsigned short get_irq_base(u8 bank, u8 bmap)
|
||||||
{
|
{
|
||||||
|
|
||||||
u16 irq_base;
|
u16 irq_base;
|
||||||
|
@ -969,17 +956,12 @@ int __init init_arch_irq(void)
|
||||||
#if defined(CONFIG_BF54x) || defined(CONFIG_BF52x) || defined(CONFIG_BF561)
|
#if defined(CONFIG_BF54x) || defined(CONFIG_BF52x) || defined(CONFIG_BF561)
|
||||||
bfin_write_SIC_IMASK0(SIC_UNMASK_ALL);
|
bfin_write_SIC_IMASK0(SIC_UNMASK_ALL);
|
||||||
bfin_write_SIC_IMASK1(SIC_UNMASK_ALL);
|
bfin_write_SIC_IMASK1(SIC_UNMASK_ALL);
|
||||||
bfin_write_SIC_IWR0(IWR_ENABLE_ALL);
|
|
||||||
bfin_write_SIC_IWR1(IWR_ENABLE_ALL);
|
|
||||||
# ifdef CONFIG_BF54x
|
# ifdef CONFIG_BF54x
|
||||||
bfin_write_SIC_IMASK2(SIC_UNMASK_ALL);
|
bfin_write_SIC_IMASK2(SIC_UNMASK_ALL);
|
||||||
bfin_write_SIC_IWR2(IWR_ENABLE_ALL);
|
|
||||||
# endif
|
# endif
|
||||||
#else
|
#else
|
||||||
bfin_write_SIC_IMASK(SIC_UNMASK_ALL);
|
bfin_write_SIC_IMASK(SIC_UNMASK_ALL);
|
||||||
bfin_write_SIC_IWR(IWR_ENABLE_ALL);
|
|
||||||
#endif
|
#endif
|
||||||
SSYNC();
|
|
||||||
|
|
||||||
local_irq_disable();
|
local_irq_disable();
|
||||||
|
|
||||||
|
@ -1001,90 +983,53 @@ int __init init_arch_irq(void)
|
||||||
set_irq_chip(irq, &bfin_core_irqchip);
|
set_irq_chip(irq, &bfin_core_irqchip);
|
||||||
else
|
else
|
||||||
set_irq_chip(irq, &bfin_internal_irqchip);
|
set_irq_chip(irq, &bfin_internal_irqchip);
|
||||||
#ifdef BF537_GENERIC_ERROR_INT_DEMUX
|
|
||||||
if (irq != IRQ_GENERIC_ERROR) {
|
|
||||||
#endif
|
|
||||||
|
|
||||||
switch (irq) {
|
switch (irq) {
|
||||||
#if defined(CONFIG_BF53x)
|
#if defined(CONFIG_BF53x)
|
||||||
case IRQ_PROG_INTA:
|
case IRQ_PROG_INTA:
|
||||||
set_irq_chained_handler(irq,
|
|
||||||
bfin_demux_gpio_irq);
|
|
||||||
break;
|
|
||||||
# if defined(BF537_FAMILY) && !(defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE))
|
# if defined(BF537_FAMILY) && !(defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE))
|
||||||
case IRQ_MAC_RX:
|
case IRQ_MAC_RX:
|
||||||
set_irq_chained_handler(irq,
|
|
||||||
bfin_demux_gpio_irq);
|
|
||||||
break;
|
|
||||||
# endif
|
# endif
|
||||||
#elif defined(CONFIG_BF54x)
|
#elif defined(CONFIG_BF54x)
|
||||||
case IRQ_PINT0:
|
case IRQ_PINT0:
|
||||||
set_irq_chained_handler(irq,
|
case IRQ_PINT1:
|
||||||
bfin_demux_gpio_irq);
|
case IRQ_PINT2:
|
||||||
break;
|
case IRQ_PINT3:
|
||||||
case IRQ_PINT1:
|
|
||||||
set_irq_chained_handler(irq,
|
|
||||||
bfin_demux_gpio_irq);
|
|
||||||
break;
|
|
||||||
case IRQ_PINT2:
|
|
||||||
set_irq_chained_handler(irq,
|
|
||||||
bfin_demux_gpio_irq);
|
|
||||||
break;
|
|
||||||
case IRQ_PINT3:
|
|
||||||
set_irq_chained_handler(irq,
|
|
||||||
bfin_demux_gpio_irq);
|
|
||||||
break;
|
|
||||||
#elif defined(CONFIG_BF52x)
|
#elif defined(CONFIG_BF52x)
|
||||||
case IRQ_PORTF_INTA:
|
case IRQ_PORTF_INTA:
|
||||||
set_irq_chained_handler(irq,
|
case IRQ_PORTG_INTA:
|
||||||
bfin_demux_gpio_irq);
|
case IRQ_PORTH_INTA:
|
||||||
break;
|
|
||||||
case IRQ_PORTG_INTA:
|
|
||||||
set_irq_chained_handler(irq,
|
|
||||||
bfin_demux_gpio_irq);
|
|
||||||
break;
|
|
||||||
case IRQ_PORTH_INTA:
|
|
||||||
set_irq_chained_handler(irq,
|
|
||||||
bfin_demux_gpio_irq);
|
|
||||||
break;
|
|
||||||
#elif defined(CONFIG_BF561)
|
#elif defined(CONFIG_BF561)
|
||||||
case IRQ_PROG0_INTA:
|
case IRQ_PROG0_INTA:
|
||||||
set_irq_chained_handler(irq,
|
case IRQ_PROG1_INTA:
|
||||||
bfin_demux_gpio_irq);
|
case IRQ_PROG2_INTA:
|
||||||
break;
|
|
||||||
case IRQ_PROG1_INTA:
|
|
||||||
set_irq_chained_handler(irq,
|
|
||||||
bfin_demux_gpio_irq);
|
|
||||||
break;
|
|
||||||
case IRQ_PROG2_INTA:
|
|
||||||
set_irq_chained_handler(irq,
|
|
||||||
bfin_demux_gpio_irq);
|
|
||||||
break;
|
|
||||||
#endif
|
#endif
|
||||||
default:
|
set_irq_chained_handler(irq,
|
||||||
set_irq_handler(irq, handle_simple_irq);
|
bfin_demux_gpio_irq);
|
||||||
break;
|
break;
|
||||||
}
|
|
||||||
|
|
||||||
#ifdef BF537_GENERIC_ERROR_INT_DEMUX
|
#ifdef BF537_GENERIC_ERROR_INT_DEMUX
|
||||||
} else {
|
case IRQ_GENERIC_ERROR:
|
||||||
set_irq_handler(irq, bfin_demux_error_irq);
|
set_irq_handler(irq, bfin_demux_error_irq);
|
||||||
|
|
||||||
|
break;
|
||||||
|
#endif
|
||||||
|
default:
|
||||||
|
set_irq_handler(irq, handle_simple_irq);
|
||||||
|
break;
|
||||||
}
|
}
|
||||||
#endif
|
|
||||||
}
|
}
|
||||||
|
|
||||||
#ifdef BF537_GENERIC_ERROR_INT_DEMUX
|
#ifdef BF537_GENERIC_ERROR_INT_DEMUX
|
||||||
for (irq = IRQ_PPI_ERROR; irq <= IRQ_UART1_ERROR; irq++) {
|
for (irq = IRQ_PPI_ERROR; irq <= IRQ_UART1_ERROR; irq++)
|
||||||
set_irq_chip(irq, &bfin_generic_error_irqchip);
|
set_irq_chip_and_handler(irq, &bfin_generic_error_irqchip,
|
||||||
set_irq_handler(irq, handle_level_irq);
|
handle_level_irq);
|
||||||
}
|
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
for (irq = GPIO_IRQ_BASE; irq < NR_IRQS; irq++) {
|
/* if configured as edge, then will be changed to do_edge_IRQ */
|
||||||
|
for (irq = GPIO_IRQ_BASE; irq < NR_IRQS; irq++)
|
||||||
|
set_irq_chip_and_handler(irq, &bfin_gpio_irqchip,
|
||||||
|
handle_level_irq);
|
||||||
|
|
||||||
set_irq_chip(irq, &bfin_gpio_irqchip);
|
|
||||||
/* if configured as edge, then will be changed to do_edge_IRQ */
|
|
||||||
set_irq_handler(irq, handle_level_irq);
|
|
||||||
}
|
|
||||||
|
|
||||||
bfin_write_IMASK(0);
|
bfin_write_IMASK(0);
|
||||||
CSYNC();
|
CSYNC();
|
||||||
|
@ -1106,6 +1051,16 @@ int __init init_arch_irq(void)
|
||||||
IMASK_IVG14 | IMASK_IVG13 | IMASK_IVG12 | IMASK_IVG11 |
|
IMASK_IVG14 | IMASK_IVG13 | IMASK_IVG12 | IMASK_IVG11 |
|
||||||
IMASK_IVG10 | IMASK_IVG9 | IMASK_IVG8 | IMASK_IVG7 | IMASK_IVGHW;
|
IMASK_IVG10 | IMASK_IVG9 | IMASK_IVG8 | IMASK_IVG7 | IMASK_IVGHW;
|
||||||
|
|
||||||
|
#if defined(CONFIG_BF54x) || defined(CONFIG_BF52x) || defined(CONFIG_BF561)
|
||||||
|
bfin_write_SIC_IWR0(IWR_ENABLE_ALL);
|
||||||
|
bfin_write_SIC_IWR1(IWR_ENABLE_ALL);
|
||||||
|
# ifdef CONFIG_BF54x
|
||||||
|
bfin_write_SIC_IWR2(IWR_ENABLE_ALL);
|
||||||
|
# endif
|
||||||
|
#else
|
||||||
|
bfin_write_SIC_IWR(IWR_ENABLE_ALL);
|
||||||
|
#endif
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -1122,7 +1077,6 @@ void do_irq(int vec, struct pt_regs *fp)
|
||||||
#if defined(CONFIG_BF54x) || defined(CONFIG_BF52x) || defined(CONFIG_BF561)
|
#if defined(CONFIG_BF54x) || defined(CONFIG_BF52x) || defined(CONFIG_BF561)
|
||||||
unsigned long sic_status[3];
|
unsigned long sic_status[3];
|
||||||
|
|
||||||
SSYNC();
|
|
||||||
sic_status[0] = bfin_read_SIC_ISR0() & bfin_read_SIC_IMASK0();
|
sic_status[0] = bfin_read_SIC_ISR0() & bfin_read_SIC_IMASK0();
|
||||||
sic_status[1] = bfin_read_SIC_ISR1() & bfin_read_SIC_IMASK1();
|
sic_status[1] = bfin_read_SIC_ISR1() & bfin_read_SIC_IMASK1();
|
||||||
#ifdef CONFIG_BF54x
|
#ifdef CONFIG_BF54x
|
||||||
|
@ -1138,7 +1092,7 @@ void do_irq(int vec, struct pt_regs *fp)
|
||||||
}
|
}
|
||||||
#else
|
#else
|
||||||
unsigned long sic_status;
|
unsigned long sic_status;
|
||||||
SSYNC();
|
|
||||||
sic_status = bfin_read_SIC_IMASK() & bfin_read_SIC_ISR();
|
sic_status = bfin_read_SIC_IMASK() & bfin_read_SIC_ISR();
|
||||||
|
|
||||||
for (;; ivg++) {
|
for (;; ivg++) {
|
||||||
|
|
|
@ -181,7 +181,7 @@ void __init mem_init(void)
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
static __init void free_init_pages(const char *what, unsigned long begin, unsigned long end)
|
static void __init free_init_pages(const char *what, unsigned long begin, unsigned long end)
|
||||||
{
|
{
|
||||||
unsigned long addr;
|
unsigned long addr;
|
||||||
/* next to check that the page we free is not a partial page */
|
/* next to check that the page we free is not a partial page */
|
||||||
|
@ -203,7 +203,7 @@ void __init free_initrd_mem(unsigned long start, unsigned long end)
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
void __init free_initmem(void)
|
void __init_refok free_initmem(void)
|
||||||
{
|
{
|
||||||
#if defined CONFIG_RAMKERNEL && !defined CONFIG_MPU
|
#if defined CONFIG_RAMKERNEL && !defined CONFIG_MPU
|
||||||
free_init_pages("unused kernel memory",
|
free_init_pages("unused kernel memory",
|
||||||
|
|
|
@ -17,6 +17,7 @@
|
||||||
#include "44x.h"
|
#include "44x.h"
|
||||||
#include "cuboot.h"
|
#include "cuboot.h"
|
||||||
|
|
||||||
|
#define TARGET_4xx
|
||||||
#define TARGET_44x
|
#define TARGET_44x
|
||||||
#include "ppcboot.h"
|
#include "ppcboot.h"
|
||||||
|
|
||||||
|
|
|
@ -17,6 +17,7 @@
|
||||||
#include "44x.h"
|
#include "44x.h"
|
||||||
#include "cuboot.h"
|
#include "cuboot.h"
|
||||||
|
|
||||||
|
#define TARGET_4xx
|
||||||
#define TARGET_44x
|
#define TARGET_44x
|
||||||
#include "ppcboot.h"
|
#include "ppcboot.h"
|
||||||
|
|
||||||
|
|
|
@ -22,6 +22,7 @@
|
||||||
#include "44x.h"
|
#include "44x.h"
|
||||||
#include "cuboot.h"
|
#include "cuboot.h"
|
||||||
|
|
||||||
|
#define TARGET_4xx
|
||||||
#define TARGET_44x
|
#define TARGET_44x
|
||||||
#include "ppcboot.h"
|
#include "ppcboot.h"
|
||||||
|
|
||||||
|
|
|
@ -21,7 +21,9 @@
|
||||||
#include "dcr.h"
|
#include "dcr.h"
|
||||||
#include "4xx.h"
|
#include "4xx.h"
|
||||||
|
|
||||||
|
#define TARGET_4xx
|
||||||
#define TARGET_44x
|
#define TARGET_44x
|
||||||
|
#define TARGET_440GX
|
||||||
#include "ppcboot.h"
|
#include "ppcboot.h"
|
||||||
|
|
||||||
static bd_t bd;
|
static bd_t bd;
|
||||||
|
|
|
@ -11,6 +11,7 @@
|
||||||
#include "4xx.h"
|
#include "4xx.h"
|
||||||
#include "cuboot.h"
|
#include "cuboot.h"
|
||||||
|
|
||||||
|
#define TARGET_4xx
|
||||||
#define TARGET_44x
|
#define TARGET_44x
|
||||||
#include "ppcboot.h"
|
#include "ppcboot.h"
|
||||||
|
|
||||||
|
|
|
@ -235,7 +235,7 @@
|
||||||
#interrupt-cells = <1>;
|
#interrupt-cells = <1>;
|
||||||
#size-cells = <2>;
|
#size-cells = <2>;
|
||||||
#address-cells = <3>;
|
#address-cells = <3>;
|
||||||
compatible = "ibm,plb-pciex-405exr", "ibm,plb-pciex";
|
compatible = "ibm,plb-pciex-405ex", "ibm,plb-pciex";
|
||||||
primary;
|
primary;
|
||||||
port = <0>; /* port number */
|
port = <0>; /* port number */
|
||||||
reg = <a0000000 20000000 /* Config space access */
|
reg = <a0000000 20000000 /* Config space access */
|
||||||
|
|
|
@ -38,8 +38,8 @@
|
||||||
timebase-frequency = <0>; /* Filled in by zImage */
|
timebase-frequency = <0>; /* Filled in by zImage */
|
||||||
i-cache-line-size = <20>;
|
i-cache-line-size = <20>;
|
||||||
d-cache-line-size = <20>;
|
d-cache-line-size = <20>;
|
||||||
i-cache-size = <20000>;
|
i-cache-size = <8000>;
|
||||||
d-cache-size = <20000>;
|
d-cache-size = <8000>;
|
||||||
dcr-controller;
|
dcr-controller;
|
||||||
dcr-access-method = "native";
|
dcr-access-method = "native";
|
||||||
};
|
};
|
||||||
|
@ -136,11 +136,11 @@
|
||||||
};
|
};
|
||||||
|
|
||||||
POB0: opb {
|
POB0: opb {
|
||||||
compatible = "ibm,opb-440spe", "ibm,opb-440gp", "ibm,opb";
|
compatible = "ibm,opb-440spe", "ibm,opb-440gp", "ibm,opb";
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
#size-cells = <1>;
|
#size-cells = <1>;
|
||||||
ranges = <00000000 4 e0000000 20000000>;
|
ranges = <00000000 4 e0000000 20000000>;
|
||||||
clock-frequency = <0>; /* Filled in by zImage */
|
clock-frequency = <0>; /* Filled in by zImage */
|
||||||
|
|
||||||
EBC0: ebc {
|
EBC0: ebc {
|
||||||
compatible = "ibm,ebc-440spe", "ibm,ebc-440gp", "ibm,ebc";
|
compatible = "ibm,ebc-440spe", "ibm,ebc-440gp", "ibm,ebc";
|
||||||
|
@ -153,38 +153,38 @@
|
||||||
};
|
};
|
||||||
|
|
||||||
UART0: serial@10000200 {
|
UART0: serial@10000200 {
|
||||||
device_type = "serial";
|
device_type = "serial";
|
||||||
compatible = "ns16550";
|
compatible = "ns16550";
|
||||||
reg = <10000200 8>;
|
reg = <10000200 8>;
|
||||||
virtual-reg = <a0000200>;
|
virtual-reg = <a0000200>;
|
||||||
clock-frequency = <0>; /* Filled in by zImage */
|
clock-frequency = <0>; /* Filled in by zImage */
|
||||||
current-speed = <1c200>;
|
current-speed = <1c200>;
|
||||||
interrupt-parent = <&UIC0>;
|
interrupt-parent = <&UIC0>;
|
||||||
interrupts = <0 4>;
|
interrupts = <0 4>;
|
||||||
};
|
};
|
||||||
|
|
||||||
UART1: serial@10000300 {
|
UART1: serial@10000300 {
|
||||||
device_type = "serial";
|
device_type = "serial";
|
||||||
compatible = "ns16550";
|
compatible = "ns16550";
|
||||||
reg = <10000300 8>;
|
reg = <10000300 8>;
|
||||||
virtual-reg = <a0000300>;
|
virtual-reg = <a0000300>;
|
||||||
clock-frequency = <0>;
|
clock-frequency = <0>;
|
||||||
current-speed = <0>;
|
current-speed = <0>;
|
||||||
interrupt-parent = <&UIC0>;
|
interrupt-parent = <&UIC0>;
|
||||||
interrupts = <1 4>;
|
interrupts = <1 4>;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
||||||
UART2: serial@10000600 {
|
UART2: serial@10000600 {
|
||||||
device_type = "serial";
|
device_type = "serial";
|
||||||
compatible = "ns16550";
|
compatible = "ns16550";
|
||||||
reg = <10000600 8>;
|
reg = <10000600 8>;
|
||||||
virtual-reg = <a0000600>;
|
virtual-reg = <a0000600>;
|
||||||
clock-frequency = <0>;
|
clock-frequency = <0>;
|
||||||
current-speed = <0>;
|
current-speed = <0>;
|
||||||
interrupt-parent = <&UIC1>;
|
interrupt-parent = <&UIC1>;
|
||||||
interrupts = <5 4>;
|
interrupts = <5 4>;
|
||||||
};
|
};
|
||||||
|
|
||||||
IIC0: i2c@10000400 {
|
IIC0: i2c@10000400 {
|
||||||
compatible = "ibm,iic-440spe", "ibm,iic-440gp", "ibm,iic";
|
compatible = "ibm,iic-440spe", "ibm,iic-440gp", "ibm,iic";
|
||||||
|
|
|
@ -1151,7 +1151,7 @@ static void cell_handle_interrupt(struct pt_regs *regs,
|
||||||
for (i = 0; i < num_counters; ++i) {
|
for (i = 0; i < num_counters; ++i) {
|
||||||
if ((interrupt_mask & CBE_PM_CTR_OVERFLOW_INTR(i))
|
if ((interrupt_mask & CBE_PM_CTR_OVERFLOW_INTR(i))
|
||||||
&& ctr[i].enabled) {
|
&& ctr[i].enabled) {
|
||||||
oprofile_add_pc(pc, is_kernel, i);
|
oprofile_add_ext_sample(pc, regs, i, is_kernel);
|
||||||
cbe_write_ctr(cpu, i, reset_value[i]);
|
cbe_write_ctr(cpu, i, reset_value[i]);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
|
@ -199,6 +199,7 @@ int mpc52xx_set_psc_clkdiv(int psc_id, int clkdiv)
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
EXPORT_SYMBOL(mpc52xx_set_psc_clkdiv);
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* mpc52xx_restart: ppc_md->restart hook for mpc5200 using the watchdog timer
|
* mpc52xx_restart: ppc_md->restart hook for mpc5200 using the watchdog timer
|
||||||
|
|
|
@ -113,7 +113,7 @@
|
||||||
|
|
||||||
/* IOMMU sizing */
|
/* IOMMU sizing */
|
||||||
#define IO_SEGMENT_SHIFT 28
|
#define IO_SEGMENT_SHIFT 28
|
||||||
#define IO_PAGENO_BITS (IO_SEGMENT_SHIFT - IOMMU_PAGE_SHIFT)
|
#define IO_PAGENO_BITS(shift) (IO_SEGMENT_SHIFT - (shift))
|
||||||
|
|
||||||
/* The high bit needs to be set on every DMA address */
|
/* The high bit needs to be set on every DMA address */
|
||||||
#define SPIDER_DMA_OFFSET 0x80000000ul
|
#define SPIDER_DMA_OFFSET 0x80000000ul
|
||||||
|
@ -123,7 +123,6 @@ struct iommu_window {
|
||||||
struct cbe_iommu *iommu;
|
struct cbe_iommu *iommu;
|
||||||
unsigned long offset;
|
unsigned long offset;
|
||||||
unsigned long size;
|
unsigned long size;
|
||||||
unsigned long pte_offset;
|
|
||||||
unsigned int ioid;
|
unsigned int ioid;
|
||||||
struct iommu_table table;
|
struct iommu_table table;
|
||||||
};
|
};
|
||||||
|
@ -200,7 +199,7 @@ static void tce_build_cell(struct iommu_table *tbl, long index, long npages,
|
||||||
(window->ioid & IOPTE_IOID_Mask);
|
(window->ioid & IOPTE_IOID_Mask);
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
io_pte = (unsigned long *)tbl->it_base + (index - window->pte_offset);
|
io_pte = (unsigned long *)tbl->it_base + (index - tbl->it_offset);
|
||||||
|
|
||||||
for (i = 0; i < npages; i++, uaddr += IOMMU_PAGE_SIZE)
|
for (i = 0; i < npages; i++, uaddr += IOMMU_PAGE_SIZE)
|
||||||
io_pte[i] = base_pte | (__pa(uaddr) & IOPTE_RPN_Mask);
|
io_pte[i] = base_pte | (__pa(uaddr) & IOPTE_RPN_Mask);
|
||||||
|
@ -232,7 +231,7 @@ static void tce_free_cell(struct iommu_table *tbl, long index, long npages)
|
||||||
| (window->ioid & IOPTE_IOID_Mask);
|
| (window->ioid & IOPTE_IOID_Mask);
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
io_pte = (unsigned long *)tbl->it_base + (index - window->pte_offset);
|
io_pte = (unsigned long *)tbl->it_base + (index - tbl->it_offset);
|
||||||
|
|
||||||
for (i = 0; i < npages; i++)
|
for (i = 0; i < npages; i++)
|
||||||
io_pte[i] = pte;
|
io_pte[i] = pte;
|
||||||
|
@ -307,76 +306,84 @@ static int cell_iommu_find_ioc(int nid, unsigned long *base)
|
||||||
return -ENODEV;
|
return -ENODEV;
|
||||||
}
|
}
|
||||||
|
|
||||||
static void cell_iommu_setup_page_tables(struct cbe_iommu *iommu,
|
static void cell_iommu_setup_stab(struct cbe_iommu *iommu,
|
||||||
unsigned long dbase, unsigned long dsize,
|
unsigned long dbase, unsigned long dsize,
|
||||||
unsigned long fbase, unsigned long fsize)
|
unsigned long fbase, unsigned long fsize)
|
||||||
{
|
{
|
||||||
struct page *page;
|
struct page *page;
|
||||||
int i;
|
unsigned long segments, stab_size;
|
||||||
unsigned long reg, segments, pages_per_segment, ptab_size, stab_size,
|
|
||||||
n_pte_pages, base;
|
|
||||||
|
|
||||||
base = dbase;
|
|
||||||
if (fsize != 0)
|
|
||||||
base = min(fbase, dbase);
|
|
||||||
|
|
||||||
segments = max(dbase + dsize, fbase + fsize) >> IO_SEGMENT_SHIFT;
|
segments = max(dbase + dsize, fbase + fsize) >> IO_SEGMENT_SHIFT;
|
||||||
pages_per_segment = 1ull << IO_PAGENO_BITS;
|
|
||||||
|
|
||||||
pr_debug("%s: iommu[%d]: segments: %lu, pages per segment: %lu\n",
|
pr_debug("%s: iommu[%d]: segments: %lu\n",
|
||||||
__FUNCTION__, iommu->nid, segments, pages_per_segment);
|
__FUNCTION__, iommu->nid, segments);
|
||||||
|
|
||||||
/* set up the segment table */
|
/* set up the segment table */
|
||||||
stab_size = segments * sizeof(unsigned long);
|
stab_size = segments * sizeof(unsigned long);
|
||||||
page = alloc_pages_node(iommu->nid, GFP_KERNEL, get_order(stab_size));
|
page = alloc_pages_node(iommu->nid, GFP_KERNEL, get_order(stab_size));
|
||||||
BUG_ON(!page);
|
BUG_ON(!page);
|
||||||
iommu->stab = page_address(page);
|
iommu->stab = page_address(page);
|
||||||
clear_page(iommu->stab);
|
memset(iommu->stab, 0, stab_size);
|
||||||
|
}
|
||||||
|
|
||||||
|
static unsigned long *cell_iommu_alloc_ptab(struct cbe_iommu *iommu,
|
||||||
|
unsigned long base, unsigned long size, unsigned long gap_base,
|
||||||
|
unsigned long gap_size, unsigned long page_shift)
|
||||||
|
{
|
||||||
|
struct page *page;
|
||||||
|
int i;
|
||||||
|
unsigned long reg, segments, pages_per_segment, ptab_size,
|
||||||
|
n_pte_pages, start_seg, *ptab;
|
||||||
|
|
||||||
|
start_seg = base >> IO_SEGMENT_SHIFT;
|
||||||
|
segments = size >> IO_SEGMENT_SHIFT;
|
||||||
|
pages_per_segment = 1ull << IO_PAGENO_BITS(page_shift);
|
||||||
|
/* PTEs for each segment must start on a 4K bounday */
|
||||||
|
pages_per_segment = max(pages_per_segment,
|
||||||
|
(1 << 12) / sizeof(unsigned long));
|
||||||
|
|
||||||
/* ... and the page tables. Since these are contiguous, we can treat
|
|
||||||
* the page tables as one array of ptes, like pSeries does.
|
|
||||||
*/
|
|
||||||
ptab_size = segments * pages_per_segment * sizeof(unsigned long);
|
ptab_size = segments * pages_per_segment * sizeof(unsigned long);
|
||||||
pr_debug("%s: iommu[%d]: ptab_size: %lu, order: %d\n", __FUNCTION__,
|
pr_debug("%s: iommu[%d]: ptab_size: %lu, order: %d\n", __FUNCTION__,
|
||||||
iommu->nid, ptab_size, get_order(ptab_size));
|
iommu->nid, ptab_size, get_order(ptab_size));
|
||||||
page = alloc_pages_node(iommu->nid, GFP_KERNEL, get_order(ptab_size));
|
page = alloc_pages_node(iommu->nid, GFP_KERNEL, get_order(ptab_size));
|
||||||
BUG_ON(!page);
|
BUG_ON(!page);
|
||||||
|
|
||||||
iommu->ptab = page_address(page);
|
ptab = page_address(page);
|
||||||
memset(iommu->ptab, 0, ptab_size);
|
memset(ptab, 0, ptab_size);
|
||||||
|
|
||||||
/* allocate a bogus page for the end of each mapping */
|
/* number of 4K pages needed for a page table */
|
||||||
page = alloc_pages_node(iommu->nid, GFP_KERNEL, 0);
|
n_pte_pages = (pages_per_segment * sizeof(unsigned long)) >> 12;
|
||||||
BUG_ON(!page);
|
|
||||||
iommu->pad_page = page_address(page);
|
|
||||||
clear_page(iommu->pad_page);
|
|
||||||
|
|
||||||
/* number of pages needed for a page table */
|
|
||||||
n_pte_pages = (pages_per_segment *
|
|
||||||
sizeof(unsigned long)) >> IOMMU_PAGE_SHIFT;
|
|
||||||
|
|
||||||
pr_debug("%s: iommu[%d]: stab at %p, ptab at %p, n_pte_pages: %lu\n",
|
pr_debug("%s: iommu[%d]: stab at %p, ptab at %p, n_pte_pages: %lu\n",
|
||||||
__FUNCTION__, iommu->nid, iommu->stab, iommu->ptab,
|
__FUNCTION__, iommu->nid, iommu->stab, ptab,
|
||||||
n_pte_pages);
|
n_pte_pages);
|
||||||
|
|
||||||
/* initialise the STEs */
|
/* initialise the STEs */
|
||||||
reg = IOSTE_V | ((n_pte_pages - 1) << 5);
|
reg = IOSTE_V | ((n_pte_pages - 1) << 5);
|
||||||
|
|
||||||
if (IOMMU_PAGE_SIZE == 0x1000)
|
switch (page_shift) {
|
||||||
reg |= IOSTE_PS_4K;
|
case 12: reg |= IOSTE_PS_4K; break;
|
||||||
else if (IOMMU_PAGE_SIZE == 0x10000)
|
case 16: reg |= IOSTE_PS_64K; break;
|
||||||
reg |= IOSTE_PS_64K;
|
case 20: reg |= IOSTE_PS_1M; break;
|
||||||
else {
|
case 24: reg |= IOSTE_PS_16M; break;
|
||||||
extern void __unknown_page_size_error(void);
|
default: BUG();
|
||||||
__unknown_page_size_error();
|
|
||||||
}
|
}
|
||||||
|
|
||||||
|
gap_base = gap_base >> IO_SEGMENT_SHIFT;
|
||||||
|
gap_size = gap_size >> IO_SEGMENT_SHIFT;
|
||||||
|
|
||||||
pr_debug("Setting up IOMMU stab:\n");
|
pr_debug("Setting up IOMMU stab:\n");
|
||||||
for (i = base >> IO_SEGMENT_SHIFT; i < segments; i++) {
|
for (i = start_seg; i < (start_seg + segments); i++) {
|
||||||
iommu->stab[i] = reg |
|
if (i >= gap_base && i < (gap_base + gap_size)) {
|
||||||
(__pa(iommu->ptab) + n_pte_pages * IOMMU_PAGE_SIZE * i);
|
pr_debug("\toverlap at %d, skipping\n", i);
|
||||||
|
continue;
|
||||||
|
}
|
||||||
|
iommu->stab[i] = reg | (__pa(ptab) + (n_pte_pages << 12) *
|
||||||
|
(i - start_seg));
|
||||||
pr_debug("\t[%d] 0x%016lx\n", i, iommu->stab[i]);
|
pr_debug("\t[%d] 0x%016lx\n", i, iommu->stab[i]);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
return ptab;
|
||||||
}
|
}
|
||||||
|
|
||||||
static void cell_iommu_enable_hardware(struct cbe_iommu *iommu)
|
static void cell_iommu_enable_hardware(struct cbe_iommu *iommu)
|
||||||
|
@ -423,7 +430,9 @@ static void cell_iommu_enable_hardware(struct cbe_iommu *iommu)
|
||||||
static void cell_iommu_setup_hardware(struct cbe_iommu *iommu,
|
static void cell_iommu_setup_hardware(struct cbe_iommu *iommu,
|
||||||
unsigned long base, unsigned long size)
|
unsigned long base, unsigned long size)
|
||||||
{
|
{
|
||||||
cell_iommu_setup_page_tables(iommu, base, size, 0, 0);
|
cell_iommu_setup_stab(iommu, base, size, 0, 0);
|
||||||
|
iommu->ptab = cell_iommu_alloc_ptab(iommu, base, size, 0, 0,
|
||||||
|
IOMMU_PAGE_SHIFT);
|
||||||
cell_iommu_enable_hardware(iommu);
|
cell_iommu_enable_hardware(iommu);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -464,6 +473,7 @@ cell_iommu_setup_window(struct cbe_iommu *iommu, struct device_node *np,
|
||||||
unsigned long pte_offset)
|
unsigned long pte_offset)
|
||||||
{
|
{
|
||||||
struct iommu_window *window;
|
struct iommu_window *window;
|
||||||
|
struct page *page;
|
||||||
u32 ioid;
|
u32 ioid;
|
||||||
|
|
||||||
ioid = cell_iommu_get_ioid(np);
|
ioid = cell_iommu_get_ioid(np);
|
||||||
|
@ -475,13 +485,11 @@ cell_iommu_setup_window(struct cbe_iommu *iommu, struct device_node *np,
|
||||||
window->size = size;
|
window->size = size;
|
||||||
window->ioid = ioid;
|
window->ioid = ioid;
|
||||||
window->iommu = iommu;
|
window->iommu = iommu;
|
||||||
window->pte_offset = pte_offset;
|
|
||||||
|
|
||||||
window->table.it_blocksize = 16;
|
window->table.it_blocksize = 16;
|
||||||
window->table.it_base = (unsigned long)iommu->ptab;
|
window->table.it_base = (unsigned long)iommu->ptab;
|
||||||
window->table.it_index = iommu->nid;
|
window->table.it_index = iommu->nid;
|
||||||
window->table.it_offset = (offset >> IOMMU_PAGE_SHIFT) +
|
window->table.it_offset = (offset >> IOMMU_PAGE_SHIFT) + pte_offset;
|
||||||
window->pte_offset;
|
|
||||||
window->table.it_size = size >> IOMMU_PAGE_SHIFT;
|
window->table.it_size = size >> IOMMU_PAGE_SHIFT;
|
||||||
|
|
||||||
iommu_init_table(&window->table, iommu->nid);
|
iommu_init_table(&window->table, iommu->nid);
|
||||||
|
@ -504,6 +512,11 @@ cell_iommu_setup_window(struct cbe_iommu *iommu, struct device_node *np,
|
||||||
* This code also assumes that we have a window that starts at 0,
|
* This code also assumes that we have a window that starts at 0,
|
||||||
* which is the case on all spider based blades.
|
* which is the case on all spider based blades.
|
||||||
*/
|
*/
|
||||||
|
page = alloc_pages_node(iommu->nid, GFP_KERNEL, 0);
|
||||||
|
BUG_ON(!page);
|
||||||
|
iommu->pad_page = page_address(page);
|
||||||
|
clear_page(iommu->pad_page);
|
||||||
|
|
||||||
__set_bit(0, window->table.it_map);
|
__set_bit(0, window->table.it_map);
|
||||||
tce_build_cell(&window->table, window->table.it_offset, 1,
|
tce_build_cell(&window->table, window->table.it_offset, 1,
|
||||||
(unsigned long)iommu->pad_page, DMA_TO_DEVICE);
|
(unsigned long)iommu->pad_page, DMA_TO_DEVICE);
|
||||||
|
@ -549,7 +562,7 @@ static void cell_dma_dev_setup_iommu(struct device *dev)
|
||||||
archdata->dma_data = &window->table;
|
archdata->dma_data = &window->table;
|
||||||
}
|
}
|
||||||
|
|
||||||
static void cell_dma_dev_setup_static(struct device *dev);
|
static void cell_dma_dev_setup_fixed(struct device *dev);
|
||||||
|
|
||||||
static void cell_dma_dev_setup(struct device *dev)
|
static void cell_dma_dev_setup(struct device *dev)
|
||||||
{
|
{
|
||||||
|
@ -557,7 +570,7 @@ static void cell_dma_dev_setup(struct device *dev)
|
||||||
|
|
||||||
/* Order is important here, these are not mutually exclusive */
|
/* Order is important here, these are not mutually exclusive */
|
||||||
if (get_dma_ops(dev) == &dma_iommu_fixed_ops)
|
if (get_dma_ops(dev) == &dma_iommu_fixed_ops)
|
||||||
cell_dma_dev_setup_static(dev);
|
cell_dma_dev_setup_fixed(dev);
|
||||||
else if (get_pci_dma_ops() == &dma_iommu_ops)
|
else if (get_pci_dma_ops() == &dma_iommu_ops)
|
||||||
cell_dma_dev_setup_iommu(dev);
|
cell_dma_dev_setup_iommu(dev);
|
||||||
else if (get_pci_dma_ops() == &dma_direct_ops)
|
else if (get_pci_dma_ops() == &dma_direct_ops)
|
||||||
|
@ -858,7 +871,7 @@ static int dma_set_mask_and_switch(struct device *dev, u64 dma_mask)
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
static void cell_dma_dev_setup_static(struct device *dev)
|
static void cell_dma_dev_setup_fixed(struct device *dev)
|
||||||
{
|
{
|
||||||
struct dev_archdata *archdata = &dev->archdata;
|
struct dev_archdata *archdata = &dev->archdata;
|
||||||
u64 addr;
|
u64 addr;
|
||||||
|
@ -869,35 +882,45 @@ static void cell_dma_dev_setup_static(struct device *dev)
|
||||||
dev_dbg(dev, "iommu: fixed addr = %lx\n", addr);
|
dev_dbg(dev, "iommu: fixed addr = %lx\n", addr);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
static void insert_16M_pte(unsigned long addr, unsigned long *ptab,
|
||||||
|
unsigned long base_pte)
|
||||||
|
{
|
||||||
|
unsigned long segment, offset;
|
||||||
|
|
||||||
|
segment = addr >> IO_SEGMENT_SHIFT;
|
||||||
|
offset = (addr >> 24) - (segment << IO_PAGENO_BITS(24));
|
||||||
|
ptab = ptab + (segment * (1 << 12) / sizeof(unsigned long));
|
||||||
|
|
||||||
|
pr_debug("iommu: addr %lx ptab %p segment %lx offset %lx\n",
|
||||||
|
addr, ptab, segment, offset);
|
||||||
|
|
||||||
|
ptab[offset] = base_pte | (__pa(addr) & IOPTE_RPN_Mask);
|
||||||
|
}
|
||||||
|
|
||||||
static void cell_iommu_setup_fixed_ptab(struct cbe_iommu *iommu,
|
static void cell_iommu_setup_fixed_ptab(struct cbe_iommu *iommu,
|
||||||
struct device_node *np, unsigned long dbase, unsigned long dsize,
|
struct device_node *np, unsigned long dbase, unsigned long dsize,
|
||||||
unsigned long fbase, unsigned long fsize)
|
unsigned long fbase, unsigned long fsize)
|
||||||
{
|
{
|
||||||
unsigned long base_pte, uaddr, *io_pte;
|
unsigned long base_pte, uaddr, ioaddr, *ptab;
|
||||||
int i;
|
|
||||||
|
ptab = cell_iommu_alloc_ptab(iommu, fbase, fsize, dbase, dsize, 24);
|
||||||
|
|
||||||
dma_iommu_fixed_base = fbase;
|
dma_iommu_fixed_base = fbase;
|
||||||
|
|
||||||
/* convert from bytes into page table indices */
|
|
||||||
dbase = dbase >> IOMMU_PAGE_SHIFT;
|
|
||||||
dsize = dsize >> IOMMU_PAGE_SHIFT;
|
|
||||||
fbase = fbase >> IOMMU_PAGE_SHIFT;
|
|
||||||
fsize = fsize >> IOMMU_PAGE_SHIFT;
|
|
||||||
|
|
||||||
pr_debug("iommu: mapping 0x%lx pages from 0x%lx\n", fsize, fbase);
|
pr_debug("iommu: mapping 0x%lx pages from 0x%lx\n", fsize, fbase);
|
||||||
|
|
||||||
io_pte = iommu->ptab;
|
|
||||||
base_pte = IOPTE_PP_W | IOPTE_PP_R | IOPTE_M | IOPTE_SO_RW
|
base_pte = IOPTE_PP_W | IOPTE_PP_R | IOPTE_M | IOPTE_SO_RW
|
||||||
| (cell_iommu_get_ioid(np) & IOPTE_IOID_Mask);
|
| (cell_iommu_get_ioid(np) & IOPTE_IOID_Mask);
|
||||||
|
|
||||||
uaddr = 0;
|
for (uaddr = 0; uaddr < fsize; uaddr += (1 << 24)) {
|
||||||
for (i = fbase; i < fbase + fsize; i++, uaddr += IOMMU_PAGE_SIZE) {
|
|
||||||
/* Don't touch the dynamic region */
|
/* Don't touch the dynamic region */
|
||||||
if (i >= dbase && i < (dbase + dsize)) {
|
ioaddr = uaddr + fbase;
|
||||||
pr_debug("iommu: static/dynamic overlap, skipping\n");
|
if (ioaddr >= dbase && ioaddr < (dbase + dsize)) {
|
||||||
|
pr_debug("iommu: fixed/dynamic overlap, skipping\n");
|
||||||
continue;
|
continue;
|
||||||
}
|
}
|
||||||
io_pte[i] = base_pte | (__pa(uaddr) & IOPTE_RPN_Mask);
|
|
||||||
|
insert_16M_pte(uaddr, ptab, base_pte);
|
||||||
}
|
}
|
||||||
|
|
||||||
mb();
|
mb();
|
||||||
|
@ -995,7 +1018,9 @@ static int __init cell_iommu_fixed_mapping_init(void)
|
||||||
"fixed window 0x%lx-0x%lx\n", iommu->nid, dbase,
|
"fixed window 0x%lx-0x%lx\n", iommu->nid, dbase,
|
||||||
dbase + dsize, fbase, fbase + fsize);
|
dbase + dsize, fbase, fbase + fsize);
|
||||||
|
|
||||||
cell_iommu_setup_page_tables(iommu, dbase, dsize, fbase, fsize);
|
cell_iommu_setup_stab(iommu, dbase, dsize, fbase, fsize);
|
||||||
|
iommu->ptab = cell_iommu_alloc_ptab(iommu, dbase, dsize, 0, 0,
|
||||||
|
IOMMU_PAGE_SHIFT);
|
||||||
cell_iommu_setup_fixed_ptab(iommu, np, dbase, dsize,
|
cell_iommu_setup_fixed_ptab(iommu, np, dbase, dsize,
|
||||||
fbase, fsize);
|
fbase, fsize);
|
||||||
cell_iommu_enable_hardware(iommu);
|
cell_iommu_enable_hardware(iommu);
|
||||||
|
|
|
@ -149,6 +149,11 @@ static void __init cell_init_irq(void)
|
||||||
mpic_init_IRQ();
|
mpic_init_IRQ();
|
||||||
}
|
}
|
||||||
|
|
||||||
|
static void __init cell_set_dabrx(void)
|
||||||
|
{
|
||||||
|
mtspr(SPRN_DABRX, DABRX_KERNEL | DABRX_USER);
|
||||||
|
}
|
||||||
|
|
||||||
static void __init cell_setup_arch(void)
|
static void __init cell_setup_arch(void)
|
||||||
{
|
{
|
||||||
#ifdef CONFIG_SPU_BASE
|
#ifdef CONFIG_SPU_BASE
|
||||||
|
@ -158,6 +163,8 @@ static void __init cell_setup_arch(void)
|
||||||
|
|
||||||
cbe_regs_init();
|
cbe_regs_init();
|
||||||
|
|
||||||
|
cell_set_dabrx();
|
||||||
|
|
||||||
#ifdef CONFIG_CBE_RAS
|
#ifdef CONFIG_CBE_RAS
|
||||||
cbe_ras_init();
|
cbe_ras_init();
|
||||||
#endif
|
#endif
|
||||||
|
|
|
@ -81,9 +81,12 @@ struct spu_slb {
|
||||||
void spu_invalidate_slbs(struct spu *spu)
|
void spu_invalidate_slbs(struct spu *spu)
|
||||||
{
|
{
|
||||||
struct spu_priv2 __iomem *priv2 = spu->priv2;
|
struct spu_priv2 __iomem *priv2 = spu->priv2;
|
||||||
|
unsigned long flags;
|
||||||
|
|
||||||
|
spin_lock_irqsave(&spu->register_lock, flags);
|
||||||
if (spu_mfc_sr1_get(spu) & MFC_STATE1_RELOCATE_MASK)
|
if (spu_mfc_sr1_get(spu) & MFC_STATE1_RELOCATE_MASK)
|
||||||
out_be64(&priv2->slb_invalidate_all_W, 0UL);
|
out_be64(&priv2->slb_invalidate_all_W, 0UL);
|
||||||
|
spin_unlock_irqrestore(&spu->register_lock, flags);
|
||||||
}
|
}
|
||||||
EXPORT_SYMBOL_GPL(spu_invalidate_slbs);
|
EXPORT_SYMBOL_GPL(spu_invalidate_slbs);
|
||||||
|
|
||||||
|
@ -148,7 +151,11 @@ static inline void spu_load_slb(struct spu *spu, int slbe, struct spu_slb *slb)
|
||||||
__func__, slbe, slb->vsid, slb->esid);
|
__func__, slbe, slb->vsid, slb->esid);
|
||||||
|
|
||||||
out_be64(&priv2->slb_index_W, slbe);
|
out_be64(&priv2->slb_index_W, slbe);
|
||||||
|
/* set invalid before writing vsid */
|
||||||
|
out_be64(&priv2->slb_esid_RW, 0);
|
||||||
|
/* now it's safe to write the vsid */
|
||||||
out_be64(&priv2->slb_vsid_RW, slb->vsid);
|
out_be64(&priv2->slb_vsid_RW, slb->vsid);
|
||||||
|
/* setting the new esid makes the entry valid again */
|
||||||
out_be64(&priv2->slb_esid_RW, slb->esid);
|
out_be64(&priv2->slb_esid_RW, slb->esid);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -290,9 +297,11 @@ void spu_setup_kernel_slbs(struct spu *spu, struct spu_lscsa *lscsa,
|
||||||
nr_slbs++;
|
nr_slbs++;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
spin_lock_irq(&spu->register_lock);
|
||||||
/* Add the set of SLBs */
|
/* Add the set of SLBs */
|
||||||
for (i = 0; i < nr_slbs; i++)
|
for (i = 0; i < nr_slbs; i++)
|
||||||
spu_load_slb(spu, i, &slbs[i]);
|
spu_load_slb(spu, i, &slbs[i]);
|
||||||
|
spin_unlock_irq(&spu->register_lock);
|
||||||
}
|
}
|
||||||
EXPORT_SYMBOL_GPL(spu_setup_kernel_slbs);
|
EXPORT_SYMBOL_GPL(spu_setup_kernel_slbs);
|
||||||
|
|
||||||
|
@ -337,13 +346,14 @@ spu_irq_class_1(int irq, void *data)
|
||||||
if (stat & CLASS1_STORAGE_FAULT_INTR)
|
if (stat & CLASS1_STORAGE_FAULT_INTR)
|
||||||
spu_mfc_dsisr_set(spu, 0ul);
|
spu_mfc_dsisr_set(spu, 0ul);
|
||||||
spu_int_stat_clear(spu, 1, stat);
|
spu_int_stat_clear(spu, 1, stat);
|
||||||
spin_unlock(&spu->register_lock);
|
|
||||||
pr_debug("%s: %lx %lx %lx %lx\n", __FUNCTION__, mask, stat,
|
|
||||||
dar, dsisr);
|
|
||||||
|
|
||||||
if (stat & CLASS1_SEGMENT_FAULT_INTR)
|
if (stat & CLASS1_SEGMENT_FAULT_INTR)
|
||||||
__spu_trap_data_seg(spu, dar);
|
__spu_trap_data_seg(spu, dar);
|
||||||
|
|
||||||
|
spin_unlock(&spu->register_lock);
|
||||||
|
pr_debug("%s: %lx %lx %lx %lx\n", __FUNCTION__, mask, stat,
|
||||||
|
dar, dsisr);
|
||||||
|
|
||||||
if (stat & CLASS1_STORAGE_FAULT_INTR)
|
if (stat & CLASS1_STORAGE_FAULT_INTR)
|
||||||
__spu_trap_data_map(spu, dar, dsisr);
|
__spu_trap_data_map(spu, dar, dsisr);
|
||||||
|
|
||||||
|
|
|
@ -109,13 +109,12 @@ void spu_forget(struct spu_context *ctx)
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* This is basically an open-coded spu_acquire_saved, except that
|
* This is basically an open-coded spu_acquire_saved, except that
|
||||||
* we don't acquire the state mutex interruptible.
|
* we don't acquire the state mutex interruptible, and we don't
|
||||||
|
* want this context to be rescheduled on release.
|
||||||
*/
|
*/
|
||||||
mutex_lock(&ctx->state_mutex);
|
mutex_lock(&ctx->state_mutex);
|
||||||
if (ctx->state != SPU_STATE_SAVED) {
|
if (ctx->state != SPU_STATE_SAVED)
|
||||||
set_bit(SPU_SCHED_WAS_ACTIVE, &ctx->sched_flags);
|
|
||||||
spu_deactivate(ctx);
|
spu_deactivate(ctx);
|
||||||
}
|
|
||||||
|
|
||||||
mm = ctx->owner;
|
mm = ctx->owner;
|
||||||
ctx->owner = NULL;
|
ctx->owner = NULL;
|
||||||
|
|
|
@ -366,6 +366,13 @@ static unsigned long spufs_ps_nopfn(struct vm_area_struct *vma,
|
||||||
if (offset >= ps_size)
|
if (offset >= ps_size)
|
||||||
return NOPFN_SIGBUS;
|
return NOPFN_SIGBUS;
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Because we release the mmap_sem, the context may be destroyed while
|
||||||
|
* we're in spu_wait. Grab an extra reference so it isn't destroyed
|
||||||
|
* in the meantime.
|
||||||
|
*/
|
||||||
|
get_spu_context(ctx);
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* We have to wait for context to be loaded before we have
|
* We have to wait for context to be loaded before we have
|
||||||
* pages to hand out to the user, but we don't want to wait
|
* pages to hand out to the user, but we don't want to wait
|
||||||
|
@ -375,7 +382,7 @@ static unsigned long spufs_ps_nopfn(struct vm_area_struct *vma,
|
||||||
* hanged.
|
* hanged.
|
||||||
*/
|
*/
|
||||||
if (spu_acquire(ctx))
|
if (spu_acquire(ctx))
|
||||||
return NOPFN_REFAULT;
|
goto refault;
|
||||||
|
|
||||||
if (ctx->state == SPU_STATE_SAVED) {
|
if (ctx->state == SPU_STATE_SAVED) {
|
||||||
up_read(¤t->mm->mmap_sem);
|
up_read(¤t->mm->mmap_sem);
|
||||||
|
@ -391,6 +398,9 @@ static unsigned long spufs_ps_nopfn(struct vm_area_struct *vma,
|
||||||
|
|
||||||
if (!ret)
|
if (!ret)
|
||||||
spu_release(ctx);
|
spu_release(ctx);
|
||||||
|
|
||||||
|
refault:
|
||||||
|
put_spu_context(ctx);
|
||||||
return NOPFN_REFAULT;
|
return NOPFN_REFAULT;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -246,7 +246,7 @@ static void spu_bind_context(struct spu *spu, struct spu_context *ctx)
|
||||||
spu_switch_notify(spu, ctx);
|
spu_switch_notify(spu, ctx);
|
||||||
ctx->state = SPU_STATE_RUNNABLE;
|
ctx->state = SPU_STATE_RUNNABLE;
|
||||||
|
|
||||||
spuctx_switch_state(ctx, SPU_UTIL_IDLE_LOADED);
|
spuctx_switch_state(ctx, SPU_UTIL_USER);
|
||||||
}
|
}
|
||||||
|
|
||||||
/*
|
/*
|
||||||
|
|
|
@ -58,12 +58,12 @@ static int sputrace_sprint(char *tbuf, int n)
|
||||||
ktime_to_timespec(ktime_sub(t->tstamp, sputrace_start));
|
ktime_to_timespec(ktime_sub(t->tstamp, sputrace_start));
|
||||||
|
|
||||||
return snprintf(tbuf, n,
|
return snprintf(tbuf, n,
|
||||||
"[%lu.%09lu] %d: %s (thread = %d, spu = %d)\n",
|
"[%lu.%09lu] %d: %s (ctxthread = %d, spu = %d)\n",
|
||||||
(unsigned long) tv.tv_sec,
|
(unsigned long) tv.tv_sec,
|
||||||
(unsigned long) tv.tv_nsec,
|
(unsigned long) tv.tv_nsec,
|
||||||
t->owner_tid,
|
|
||||||
t->name,
|
|
||||||
t->curr_tid,
|
t->curr_tid,
|
||||||
|
t->name,
|
||||||
|
t->owner_tid,
|
||||||
t->number);
|
t->number);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -188,6 +188,7 @@ struct spu_probe spu_probes[] = {
|
||||||
{ "spufs_ps_nopfn__insert", "%p %p", spu_context_event },
|
{ "spufs_ps_nopfn__insert", "%p %p", spu_context_event },
|
||||||
{ "spu_acquire_saved__enter", "%p", spu_context_nospu_event },
|
{ "spu_acquire_saved__enter", "%p", spu_context_nospu_event },
|
||||||
{ "destroy_spu_context__enter", "%p", spu_context_nospu_event },
|
{ "destroy_spu_context__enter", "%p", spu_context_nospu_event },
|
||||||
|
{ "spufs_stop_callback__enter", "%p %p", spu_context_event },
|
||||||
};
|
};
|
||||||
|
|
||||||
static int __init sputrace_init(void)
|
static int __init sputrace_init(void)
|
||||||
|
|
|
@ -34,6 +34,7 @@
|
||||||
|
|
||||||
#include <linux/module.h>
|
#include <linux/module.h>
|
||||||
#include <linux/errno.h>
|
#include <linux/errno.h>
|
||||||
|
#include <linux/hardirq.h>
|
||||||
#include <linux/sched.h>
|
#include <linux/sched.h>
|
||||||
#include <linux/kernel.h>
|
#include <linux/kernel.h>
|
||||||
#include <linux/mm.h>
|
#include <linux/mm.h>
|
||||||
|
@ -117,6 +118,8 @@ static inline void disable_interrupts(struct spu_state *csa, struct spu *spu)
|
||||||
* Write INT_MASK_class1 with value of 0.
|
* Write INT_MASK_class1 with value of 0.
|
||||||
* Save INT_Mask_class2 in CSA.
|
* Save INT_Mask_class2 in CSA.
|
||||||
* Write INT_MASK_class2 with value of 0.
|
* Write INT_MASK_class2 with value of 0.
|
||||||
|
* Synchronize all three interrupts to be sure
|
||||||
|
* we no longer execute a handler on another CPU.
|
||||||
*/
|
*/
|
||||||
spin_lock_irq(&spu->register_lock);
|
spin_lock_irq(&spu->register_lock);
|
||||||
if (csa) {
|
if (csa) {
|
||||||
|
@ -129,6 +132,9 @@ static inline void disable_interrupts(struct spu_state *csa, struct spu *spu)
|
||||||
spu_int_mask_set(spu, 2, 0ul);
|
spu_int_mask_set(spu, 2, 0ul);
|
||||||
eieio();
|
eieio();
|
||||||
spin_unlock_irq(&spu->register_lock);
|
spin_unlock_irq(&spu->register_lock);
|
||||||
|
synchronize_irq(spu->irqs[0]);
|
||||||
|
synchronize_irq(spu->irqs[1]);
|
||||||
|
synchronize_irq(spu->irqs[2]);
|
||||||
}
|
}
|
||||||
|
|
||||||
static inline void set_watchdog_timer(struct spu_state *csa, struct spu *spu)
|
static inline void set_watchdog_timer(struct spu_state *csa, struct spu *spu)
|
||||||
|
|
|
@ -21,9 +21,6 @@
|
||||||
#ifndef _CELLEB_BEAT_H
|
#ifndef _CELLEB_BEAT_H
|
||||||
#define _CELLEB_BEAT_H
|
#define _CELLEB_BEAT_H
|
||||||
|
|
||||||
#define DABRX_KERNEL (1UL<<1)
|
|
||||||
#define DABRX_USER (1UL<<0)
|
|
||||||
|
|
||||||
int64_t beat_get_term_char(uint64_t,uint64_t*,uint64_t*,uint64_t*);
|
int64_t beat_get_term_char(uint64_t,uint64_t*,uint64_t*,uint64_t*);
|
||||||
int64_t beat_put_term_char(uint64_t,uint64_t,uint64_t,uint64_t);
|
int64_t beat_put_term_char(uint64_t,uint64_t,uint64_t,uint64_t);
|
||||||
int64_t beat_repository_encode(int, const char *, uint64_t[4]);
|
int64_t beat_repository_encode(int, const char *, uint64_t[4]);
|
||||||
|
|
|
@ -330,6 +330,7 @@ config CPU_SUBTYPE_SH5_101
|
||||||
|
|
||||||
config CPU_SUBTYPE_SH5_103
|
config CPU_SUBTYPE_SH5_103
|
||||||
bool "Support SH5-103 processor"
|
bool "Support SH5-103 processor"
|
||||||
|
select CPU_SH5
|
||||||
|
|
||||||
endchoice
|
endchoice
|
||||||
|
|
||||||
|
|
|
@ -90,7 +90,7 @@ static irqreturn_t dma_tei(int irq, void *dev_id)
|
||||||
|
|
||||||
static int sh_dmac_request_dma(struct dma_channel *chan)
|
static int sh_dmac_request_dma(struct dma_channel *chan)
|
||||||
{
|
{
|
||||||
if (unlikely(!chan->flags & DMA_TEI_CAPABLE))
|
if (unlikely(!(chan->flags & DMA_TEI_CAPABLE)))
|
||||||
return 0;
|
return 0;
|
||||||
|
|
||||||
return request_irq(get_dmte_irq(chan->chan), dma_tei,
|
return request_irq(get_dmte_irq(chan->chan), dma_tei,
|
||||||
|
|
|
@ -93,7 +93,7 @@ static int heartbeat_drv_probe(struct platform_device *pdev)
|
||||||
}
|
}
|
||||||
|
|
||||||
hd->base = ioremap_nocache(res->start, res->end - res->start + 1);
|
hd->base = ioremap_nocache(res->start, res->end - res->start + 1);
|
||||||
if (!unlikely(hd->base)) {
|
if (unlikely(!hd->base)) {
|
||||||
dev_err(&pdev->dev, "ioremap failed\n");
|
dev_err(&pdev->dev, "ioremap failed\n");
|
||||||
|
|
||||||
if (!pdev->dev.platform_data)
|
if (!pdev->dev.platform_data)
|
||||||
|
|
|
@ -83,9 +83,9 @@ static int gapspci_read(struct pci_bus *bus, unsigned int devfn, int where, int
|
||||||
return PCIBIOS_DEVICE_NOT_FOUND;
|
return PCIBIOS_DEVICE_NOT_FOUND;
|
||||||
|
|
||||||
switch (size) {
|
switch (size) {
|
||||||
case 1: *val = ctrl_inb(GAPSPCI_BBA_CONFIG+where); break;
|
case 1: *val = inb(GAPSPCI_BBA_CONFIG+where); break;
|
||||||
case 2: *val = ctrl_inw(GAPSPCI_BBA_CONFIG+where); break;
|
case 2: *val = inw(GAPSPCI_BBA_CONFIG+where); break;
|
||||||
case 4: *val = ctrl_inl(GAPSPCI_BBA_CONFIG+where); break;
|
case 4: *val = inl(GAPSPCI_BBA_CONFIG+where); break;
|
||||||
}
|
}
|
||||||
|
|
||||||
return PCIBIOS_SUCCESSFUL;
|
return PCIBIOS_SUCCESSFUL;
|
||||||
|
@ -97,9 +97,9 @@ static int gapspci_write(struct pci_bus *bus, unsigned int devfn, int where, int
|
||||||
return PCIBIOS_DEVICE_NOT_FOUND;
|
return PCIBIOS_DEVICE_NOT_FOUND;
|
||||||
|
|
||||||
switch (size) {
|
switch (size) {
|
||||||
case 1: ctrl_outb(( u8)val, GAPSPCI_BBA_CONFIG+where); break;
|
case 1: outb(( u8)val, GAPSPCI_BBA_CONFIG+where); break;
|
||||||
case 2: ctrl_outw((u16)val, GAPSPCI_BBA_CONFIG+where); break;
|
case 2: outw((u16)val, GAPSPCI_BBA_CONFIG+where); break;
|
||||||
case 4: ctrl_outl((u32)val, GAPSPCI_BBA_CONFIG+where); break;
|
case 4: outl((u32)val, GAPSPCI_BBA_CONFIG+where); break;
|
||||||
}
|
}
|
||||||
|
|
||||||
return PCIBIOS_SUCCESSFUL;
|
return PCIBIOS_SUCCESSFUL;
|
||||||
|
@ -127,36 +127,36 @@ int __init gapspci_init(void)
|
||||||
*/
|
*/
|
||||||
|
|
||||||
for (i=0; i<16; i++)
|
for (i=0; i<16; i++)
|
||||||
idbuf[i] = ctrl_inb(GAPSPCI_REGS+i);
|
idbuf[i] = inb(GAPSPCI_REGS+i);
|
||||||
|
|
||||||
if (strncmp(idbuf, "GAPSPCI_BRIDGE_2", 16))
|
if (strncmp(idbuf, "GAPSPCI_BRIDGE_2", 16))
|
||||||
return -ENODEV;
|
return -ENODEV;
|
||||||
|
|
||||||
ctrl_outl(0x5a14a501, GAPSPCI_REGS+0x18);
|
outl(0x5a14a501, GAPSPCI_REGS+0x18);
|
||||||
|
|
||||||
for (i=0; i<1000000; i++)
|
for (i=0; i<1000000; i++)
|
||||||
;
|
;
|
||||||
|
|
||||||
if (ctrl_inl(GAPSPCI_REGS+0x18) != 1)
|
if (inl(GAPSPCI_REGS+0x18) != 1)
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
|
|
||||||
ctrl_outl(0x01000000, GAPSPCI_REGS+0x20);
|
outl(0x01000000, GAPSPCI_REGS+0x20);
|
||||||
ctrl_outl(0x01000000, GAPSPCI_REGS+0x24);
|
outl(0x01000000, GAPSPCI_REGS+0x24);
|
||||||
|
|
||||||
ctrl_outl(GAPSPCI_DMA_BASE, GAPSPCI_REGS+0x28);
|
outl(GAPSPCI_DMA_BASE, GAPSPCI_REGS+0x28);
|
||||||
ctrl_outl(GAPSPCI_DMA_BASE+GAPSPCI_DMA_SIZE, GAPSPCI_REGS+0x2c);
|
outl(GAPSPCI_DMA_BASE+GAPSPCI_DMA_SIZE, GAPSPCI_REGS+0x2c);
|
||||||
|
|
||||||
ctrl_outl(1, GAPSPCI_REGS+0x14);
|
outl(1, GAPSPCI_REGS+0x14);
|
||||||
ctrl_outl(1, GAPSPCI_REGS+0x34);
|
outl(1, GAPSPCI_REGS+0x34);
|
||||||
|
|
||||||
/* Setting Broadband Adapter */
|
/* Setting Broadband Adapter */
|
||||||
ctrl_outw(0xf900, GAPSPCI_BBA_CONFIG+0x06);
|
outw(0xf900, GAPSPCI_BBA_CONFIG+0x06);
|
||||||
ctrl_outl(0x00000000, GAPSPCI_BBA_CONFIG+0x30);
|
outl(0x00000000, GAPSPCI_BBA_CONFIG+0x30);
|
||||||
ctrl_outb(0x00, GAPSPCI_BBA_CONFIG+0x3c);
|
outb(0x00, GAPSPCI_BBA_CONFIG+0x3c);
|
||||||
ctrl_outb(0xf0, GAPSPCI_BBA_CONFIG+0x0d);
|
outb(0xf0, GAPSPCI_BBA_CONFIG+0x0d);
|
||||||
ctrl_outw(0x0006, GAPSPCI_BBA_CONFIG+0x04);
|
outw(0x0006, GAPSPCI_BBA_CONFIG+0x04);
|
||||||
ctrl_outl(0x00002001, GAPSPCI_BBA_CONFIG+0x10);
|
outl(0x00002001, GAPSPCI_BBA_CONFIG+0x10);
|
||||||
ctrl_outl(0x01000000, GAPSPCI_BBA_CONFIG+0x14);
|
outl(0x01000000, GAPSPCI_BBA_CONFIG+0x14);
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
|
@ -10,7 +10,7 @@
|
||||||
#include <linux/platform_device.h>
|
#include <linux/platform_device.h>
|
||||||
#include <linux/init.h>
|
#include <linux/init.h>
|
||||||
#include <linux/serial.h>
|
#include <linux/serial.h>
|
||||||
#include <asm/sci.h>
|
#include <linux/serial_sci.h>
|
||||||
|
|
||||||
enum {
|
enum {
|
||||||
UNUSED = 0,
|
UNUSED = 0,
|
||||||
|
|
|
@ -21,8 +21,8 @@
|
||||||
#include <asm/freq.h>
|
#include <asm/freq.h>
|
||||||
#include <asm/io.h>
|
#include <asm/io.h>
|
||||||
|
|
||||||
const static int pll1rate[]={8,12,16,0};
|
static const int pll1rate[]={8,12,16,0};
|
||||||
const static int pfc_divisors[]={1,2,3,4,6,8,12};
|
static const int pfc_divisors[]={1,2,3,4,6,8,12};
|
||||||
#define ifc_divisors pfc_divisors
|
#define ifc_divisors pfc_divisors
|
||||||
|
|
||||||
#if (CONFIG_SH_CLK_MD == 0)
|
#if (CONFIG_SH_CLK_MD == 0)
|
||||||
|
|
|
@ -10,7 +10,7 @@
|
||||||
#include <linux/platform_device.h>
|
#include <linux/platform_device.h>
|
||||||
#include <linux/init.h>
|
#include <linux/init.h>
|
||||||
#include <linux/serial.h>
|
#include <linux/serial.h>
|
||||||
#include <asm/sci.h>
|
#include <linux/serial_sci.h>
|
||||||
|
|
||||||
enum {
|
enum {
|
||||||
UNUSED = 0,
|
UNUSED = 0,
|
||||||
|
|
|
@ -10,7 +10,7 @@
|
||||||
#include <linux/platform_device.h>
|
#include <linux/platform_device.h>
|
||||||
#include <linux/init.h>
|
#include <linux/init.h>
|
||||||
#include <linux/serial.h>
|
#include <linux/serial.h>
|
||||||
#include <asm/sci.h>
|
#include <linux/serial_sci.h>
|
||||||
|
|
||||||
enum {
|
enum {
|
||||||
UNUSED = 0,
|
UNUSED = 0,
|
||||||
|
|
|
@ -94,9 +94,9 @@ int __uses_jump_to_uncached detect_cpu_and_cache_system(void)
|
||||||
boot_cpu_data.dcache.way_incr = (1 << 13);
|
boot_cpu_data.dcache.way_incr = (1 << 13);
|
||||||
boot_cpu_data.dcache.entry_mask = 0x1ff0;
|
boot_cpu_data.dcache.entry_mask = 0x1ff0;
|
||||||
boot_cpu_data.dcache.sets = 512;
|
boot_cpu_data.dcache.sets = 512;
|
||||||
ctrl_outl(CCR_CACHE_32KB, CCR3);
|
ctrl_outl(CCR_CACHE_32KB, CCR3_REG);
|
||||||
#else
|
#else
|
||||||
ctrl_outl(CCR_CACHE_16KB, CCR3);
|
ctrl_outl(CCR_CACHE_16KB, CCR3_REG);
|
||||||
#endif
|
#endif
|
||||||
#endif
|
#endif
|
||||||
}
|
}
|
||||||
|
|
|
@ -12,7 +12,7 @@
|
||||||
#include <linux/init.h>
|
#include <linux/init.h>
|
||||||
#include <linux/irq.h>
|
#include <linux/irq.h>
|
||||||
#include <linux/serial.h>
|
#include <linux/serial.h>
|
||||||
#include <asm/sci.h>
|
#include <linux/serial_sci.h>
|
||||||
#include <asm/rtc.h>
|
#include <asm/rtc.h>
|
||||||
|
|
||||||
enum {
|
enum {
|
||||||
|
|
|
@ -16,7 +16,7 @@
|
||||||
#include <linux/irq.h>
|
#include <linux/irq.h>
|
||||||
#include <linux/platform_device.h>
|
#include <linux/platform_device.h>
|
||||||
#include <linux/serial.h>
|
#include <linux/serial.h>
|
||||||
#include <asm/sci.h>
|
#include <linux/serial_sci.h>
|
||||||
|
|
||||||
enum {
|
enum {
|
||||||
UNUSED = 0,
|
UNUSED = 0,
|
||||||
|
@ -123,15 +123,15 @@ static struct resource rtc_resources[] = {
|
||||||
.flags = IORESOURCE_IO,
|
.flags = IORESOURCE_IO,
|
||||||
},
|
},
|
||||||
[1] = {
|
[1] = {
|
||||||
.start = 20,
|
.start = 21,
|
||||||
.flags = IORESOURCE_IRQ,
|
.flags = IORESOURCE_IRQ,
|
||||||
},
|
},
|
||||||
[2] = {
|
[2] = {
|
||||||
.start = 21,
|
.start = 22,
|
||||||
.flags = IORESOURCE_IRQ,
|
.flags = IORESOURCE_IRQ,
|
||||||
},
|
},
|
||||||
[3] = {
|
[3] = {
|
||||||
.start = 22,
|
.start = 20,
|
||||||
.flags = IORESOURCE_IRQ,
|
.flags = IORESOURCE_IRQ,
|
||||||
},
|
},
|
||||||
};
|
};
|
||||||
|
|
|
@ -12,7 +12,7 @@
|
||||||
#include <linux/init.h>
|
#include <linux/init.h>
|
||||||
#include <linux/irq.h>
|
#include <linux/irq.h>
|
||||||
#include <linux/serial.h>
|
#include <linux/serial.h>
|
||||||
#include <asm/sci.h>
|
#include <linux/serial_sci.h>
|
||||||
#include <asm/rtc.h>
|
#include <asm/rtc.h>
|
||||||
|
|
||||||
enum {
|
enum {
|
||||||
|
|
|
@ -16,7 +16,7 @@
|
||||||
#include <linux/init.h>
|
#include <linux/init.h>
|
||||||
#include <linux/serial.h>
|
#include <linux/serial.h>
|
||||||
#include <linux/io.h>
|
#include <linux/io.h>
|
||||||
#include <asm/sci.h>
|
#include <linux/serial_sci.h>
|
||||||
#include <asm/rtc.h>
|
#include <asm/rtc.h>
|
||||||
|
|
||||||
#define INTC_ICR1 0xA4140010UL
|
#define INTC_ICR1 0xA4140010UL
|
||||||
|
|
|
@ -10,7 +10,7 @@
|
||||||
#include <linux/platform_device.h>
|
#include <linux/platform_device.h>
|
||||||
#include <linux/init.h>
|
#include <linux/init.h>
|
||||||
#include <linux/serial.h>
|
#include <linux/serial.h>
|
||||||
#include <asm/sci.h>
|
#include <linux/serial_sci.h>
|
||||||
|
|
||||||
static struct plat_sci_port sci_platform_data[] = {
|
static struct plat_sci_port sci_platform_data[] = {
|
||||||
{
|
{
|
||||||
|
|
|
@ -12,7 +12,7 @@
|
||||||
#include <linux/init.h>
|
#include <linux/init.h>
|
||||||
#include <linux/serial.h>
|
#include <linux/serial.h>
|
||||||
#include <linux/io.h>
|
#include <linux/io.h>
|
||||||
#include <asm/sci.h>
|
#include <linux/serial_sci.h>
|
||||||
|
|
||||||
static struct resource rtc_resources[] = {
|
static struct resource rtc_resources[] = {
|
||||||
[0] = {
|
[0] = {
|
||||||
|
|
|
@ -10,7 +10,7 @@
|
||||||
#include <linux/platform_device.h>
|
#include <linux/platform_device.h>
|
||||||
#include <linux/init.h>
|
#include <linux/init.h>
|
||||||
#include <linux/serial.h>
|
#include <linux/serial.h>
|
||||||
#include <asm/sci.h>
|
#include <linux/serial_sci.h>
|
||||||
|
|
||||||
enum {
|
enum {
|
||||||
UNUSED = 0,
|
UNUSED = 0,
|
||||||
|
|
|
@ -10,7 +10,7 @@
|
||||||
#include <linux/platform_device.h>
|
#include <linux/platform_device.h>
|
||||||
#include <linux/init.h>
|
#include <linux/init.h>
|
||||||
#include <linux/serial.h>
|
#include <linux/serial.h>
|
||||||
#include <asm/sci.h>
|
#include <linux/serial_sci.h>
|
||||||
|
|
||||||
static struct plat_sci_port sci_platform_data[] = {
|
static struct plat_sci_port sci_platform_data[] = {
|
||||||
{
|
{
|
||||||
|
|
|
@ -12,7 +12,7 @@
|
||||||
#include <linux/platform_device.h>
|
#include <linux/platform_device.h>
|
||||||
#include <linux/init.h>
|
#include <linux/init.h>
|
||||||
#include <linux/serial.h>
|
#include <linux/serial.h>
|
||||||
#include <asm/sci.h>
|
#include <linux/serial_sci.h>
|
||||||
|
|
||||||
static struct plat_sci_port sci_platform_data[] = {
|
static struct plat_sci_port sci_platform_data[] = {
|
||||||
{
|
{
|
||||||
|
|
|
@ -10,9 +10,9 @@
|
||||||
#include <linux/platform_device.h>
|
#include <linux/platform_device.h>
|
||||||
#include <linux/init.h>
|
#include <linux/init.h>
|
||||||
#include <linux/serial.h>
|
#include <linux/serial.h>
|
||||||
|
#include <linux/serial_sci.h>
|
||||||
#include <linux/mm.h>
|
#include <linux/mm.h>
|
||||||
#include <asm/mmzone.h>
|
#include <asm/mmzone.h>
|
||||||
#include <asm/sci.h>
|
|
||||||
|
|
||||||
static struct resource usbf_resources[] = {
|
static struct resource usbf_resources[] = {
|
||||||
[0] = {
|
[0] = {
|
||||||
|
|
|
@ -12,7 +12,7 @@
|
||||||
#include <linux/init.h>
|
#include <linux/init.h>
|
||||||
#include <linux/serial.h>
|
#include <linux/serial.h>
|
||||||
#include <linux/io.h>
|
#include <linux/io.h>
|
||||||
#include <asm/sci.h>
|
#include <linux/serial_sci.h>
|
||||||
|
|
||||||
static struct resource rtc_resources[] = {
|
static struct resource rtc_resources[] = {
|
||||||
[0] = {
|
[0] = {
|
||||||
|
|
|
@ -10,7 +10,7 @@
|
||||||
#include <linux/platform_device.h>
|
#include <linux/platform_device.h>
|
||||||
#include <linux/init.h>
|
#include <linux/init.h>
|
||||||
#include <linux/serial.h>
|
#include <linux/serial.h>
|
||||||
#include <asm/sci.h>
|
#include <linux/serial_sci.h>
|
||||||
|
|
||||||
static struct plat_sci_port sci_platform_data[] = {
|
static struct plat_sci_port sci_platform_data[] = {
|
||||||
{
|
{
|
||||||
|
|
|
@ -11,7 +11,7 @@
|
||||||
#include <linux/init.h>
|
#include <linux/init.h>
|
||||||
#include <linux/serial.h>
|
#include <linux/serial.h>
|
||||||
#include <linux/io.h>
|
#include <linux/io.h>
|
||||||
#include <asm/sci.h>
|
#include <linux/serial_sci.h>
|
||||||
|
|
||||||
static struct resource rtc_resources[] = {
|
static struct resource rtc_resources[] = {
|
||||||
[0] = {
|
[0] = {
|
||||||
|
|
|
@ -10,10 +10,10 @@
|
||||||
#include <linux/platform_device.h>
|
#include <linux/platform_device.h>
|
||||||
#include <linux/init.h>
|
#include <linux/init.h>
|
||||||
#include <linux/serial.h>
|
#include <linux/serial.h>
|
||||||
|
#include <linux/serial_sci.h>
|
||||||
#include <linux/io.h>
|
#include <linux/io.h>
|
||||||
#include <linux/mm.h>
|
#include <linux/mm.h>
|
||||||
#include <asm/mmzone.h>
|
#include <asm/mmzone.h>
|
||||||
#include <asm/sci.h>
|
|
||||||
|
|
||||||
static struct plat_sci_port sci_platform_data[] = {
|
static struct plat_sci_port sci_platform_data[] = {
|
||||||
{
|
{
|
||||||
|
|
|
@ -10,9 +10,9 @@
|
||||||
#include <linux/platform_device.h>
|
#include <linux/platform_device.h>
|
||||||
#include <linux/init.h>
|
#include <linux/init.h>
|
||||||
#include <linux/serial.h>
|
#include <linux/serial.h>
|
||||||
|
#include <linux/serial_sci.h>
|
||||||
#include <linux/io.h>
|
#include <linux/io.h>
|
||||||
#include <asm/mmzone.h>
|
#include <asm/mmzone.h>
|
||||||
#include <asm/sci.h>
|
|
||||||
|
|
||||||
static struct plat_sci_port sci_platform_data[] = {
|
static struct plat_sci_port sci_platform_data[] = {
|
||||||
{
|
{
|
||||||
|
|
|
@ -3,6 +3,9 @@
|
||||||
#include <linux/init.h>
|
#include <linux/init.h>
|
||||||
#include <linux/proc_fs.h>
|
#include <linux/proc_fs.h>
|
||||||
#include <linux/string.h>
|
#include <linux/string.h>
|
||||||
|
#include <linux/jiffies.h>
|
||||||
|
#include <linux/timer.h>
|
||||||
|
#include <linux/uaccess.h>
|
||||||
|
|
||||||
#include <asm/auxio.h>
|
#include <asm/auxio.h>
|
||||||
|
|
||||||
|
|
|
@ -525,10 +525,10 @@ static void dr_cpu_mark(struct ds_data *resp, int cpu, int ncpus,
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
static int dr_cpu_configure(struct ds_info *dp,
|
static int __cpuinit dr_cpu_configure(struct ds_info *dp,
|
||||||
struct ds_cap_state *cp,
|
struct ds_cap_state *cp,
|
||||||
u64 req_num,
|
u64 req_num,
|
||||||
cpumask_t *mask)
|
cpumask_t *mask)
|
||||||
{
|
{
|
||||||
struct ds_data *resp;
|
struct ds_data *resp;
|
||||||
int resp_len, ncpus, cpu;
|
int resp_len, ncpus, cpu;
|
||||||
|
@ -623,9 +623,9 @@ static int dr_cpu_unconfigure(struct ds_info *dp,
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
static void dr_cpu_data(struct ds_info *dp,
|
static void __cpuinit dr_cpu_data(struct ds_info *dp,
|
||||||
struct ds_cap_state *cp,
|
struct ds_cap_state *cp,
|
||||||
void *buf, int len)
|
void *buf, int len)
|
||||||
{
|
{
|
||||||
struct ds_data *data = buf;
|
struct ds_data *data = buf;
|
||||||
struct dr_cpu_tag *tag = (struct dr_cpu_tag *) (data + 1);
|
struct dr_cpu_tag *tag = (struct dr_cpu_tag *) (data + 1);
|
||||||
|
|
|
@ -758,7 +758,7 @@ static void __devinit get_mondo_data(struct mdesc_handle *hp, u64 mp,
|
||||||
get_one_mondo_bits(val, &tb->nonresum_qmask, 2);
|
get_one_mondo_bits(val, &tb->nonresum_qmask, 2);
|
||||||
}
|
}
|
||||||
|
|
||||||
void __devinit mdesc_fill_in_cpu_data(cpumask_t mask)
|
void __cpuinit mdesc_fill_in_cpu_data(cpumask_t mask)
|
||||||
{
|
{
|
||||||
struct mdesc_handle *hp = mdesc_grab();
|
struct mdesc_handle *hp = mdesc_grab();
|
||||||
u64 mp;
|
u64 mp;
|
||||||
|
|
|
@ -244,16 +244,8 @@ static void do_kernel_fault(struct pt_regs *regs, int si_code, int fault_code,
|
||||||
if (regs->tstate & TSTATE_PRIV) {
|
if (regs->tstate & TSTATE_PRIV) {
|
||||||
const struct exception_table_entry *entry;
|
const struct exception_table_entry *entry;
|
||||||
|
|
||||||
if (asi == ASI_P && (insn & 0xc0800000) == 0xc0800000) {
|
entry = search_exception_tables(regs->tpc);
|
||||||
if (insn & 0x2000)
|
if (entry) {
|
||||||
asi = (regs->tstate >> 24);
|
|
||||||
else
|
|
||||||
asi = (insn >> 5);
|
|
||||||
}
|
|
||||||
|
|
||||||
/* Look in asi.h: All _S asis have LS bit set */
|
|
||||||
if ((asi & 0x1) &&
|
|
||||||
(entry = search_exception_tables(regs->tpc))) {
|
|
||||||
regs->tpc = entry->fixup;
|
regs->tpc = entry->fixup;
|
||||||
regs->tnpc = regs->tpc + 4;
|
regs->tnpc = regs->tpc + 4;
|
||||||
return;
|
return;
|
||||||
|
@ -294,7 +286,7 @@ asmlinkage void __kprobes do_sparc64_fault(struct pt_regs *regs)
|
||||||
unsigned long tpc = regs->tpc;
|
unsigned long tpc = regs->tpc;
|
||||||
|
|
||||||
/* Sanity check the PC. */
|
/* Sanity check the PC. */
|
||||||
if ((tpc >= KERNBASE && tpc < (unsigned long) _etext) ||
|
if ((tpc >= KERNBASE && tpc < (unsigned long) __init_end) ||
|
||||||
(tpc >= MODULES_VADDR && tpc < MODULES_END)) {
|
(tpc >= MODULES_VADDR && tpc < MODULES_END)) {
|
||||||
/* Valid, no problems... */
|
/* Valid, no problems... */
|
||||||
} else {
|
} else {
|
||||||
|
|
|
@ -1010,7 +1010,8 @@ static struct linux_prom64_registers pall[MAX_BANKS] __initdata;
|
||||||
static int pall_ents __initdata;
|
static int pall_ents __initdata;
|
||||||
|
|
||||||
#ifdef CONFIG_DEBUG_PAGEALLOC
|
#ifdef CONFIG_DEBUG_PAGEALLOC
|
||||||
static unsigned long kernel_map_range(unsigned long pstart, unsigned long pend, pgprot_t prot)
|
static unsigned long __ref kernel_map_range(unsigned long pstart,
|
||||||
|
unsigned long pend, pgprot_t prot)
|
||||||
{
|
{
|
||||||
unsigned long vstart = PAGE_OFFSET + pstart;
|
unsigned long vstart = PAGE_OFFSET + pstart;
|
||||||
unsigned long vend = PAGE_OFFSET + pend;
|
unsigned long vend = PAGE_OFFSET + pend;
|
||||||
|
|
|
@ -15,6 +15,7 @@ static struct files_struct init_files = INIT_FILES;
|
||||||
static struct signal_struct init_signals = INIT_SIGNALS(init_signals);
|
static struct signal_struct init_signals = INIT_SIGNALS(init_signals);
|
||||||
static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand);
|
static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand);
|
||||||
struct mm_struct init_mm = INIT_MM(init_mm);
|
struct mm_struct init_mm = INIT_MM(init_mm);
|
||||||
|
EXPORT_UNUSED_SYMBOL(init_mm); /* will be removed in 2.6.26 */
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Initial thread structure.
|
* Initial thread structure.
|
||||||
|
|
|
@ -603,11 +603,13 @@ __switch_to_xtra(struct task_struct *prev_p, struct task_struct *next_p,
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
#ifdef X86_BTS
|
||||||
if (test_tsk_thread_flag(prev_p, TIF_BTS_TRACE_TS))
|
if (test_tsk_thread_flag(prev_p, TIF_BTS_TRACE_TS))
|
||||||
ptrace_bts_take_timestamp(prev_p, BTS_TASK_DEPARTS);
|
ptrace_bts_take_timestamp(prev_p, BTS_TASK_DEPARTS);
|
||||||
|
|
||||||
if (test_tsk_thread_flag(next_p, TIF_BTS_TRACE_TS))
|
if (test_tsk_thread_flag(next_p, TIF_BTS_TRACE_TS))
|
||||||
ptrace_bts_take_timestamp(next_p, BTS_TASK_ARRIVES);
|
ptrace_bts_take_timestamp(next_p, BTS_TASK_ARRIVES);
|
||||||
|
#endif
|
||||||
|
|
||||||
|
|
||||||
if (!test_tsk_thread_flag(next_p, TIF_IO_BITMAP)) {
|
if (!test_tsk_thread_flag(next_p, TIF_IO_BITMAP)) {
|
||||||
|
|
|
@ -604,11 +604,13 @@ static inline void __switch_to_xtra(struct task_struct *prev_p,
|
||||||
memset(tss->io_bitmap, 0xff, prev->io_bitmap_max);
|
memset(tss->io_bitmap, 0xff, prev->io_bitmap_max);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
#ifdef X86_BTS
|
||||||
if (test_tsk_thread_flag(prev_p, TIF_BTS_TRACE_TS))
|
if (test_tsk_thread_flag(prev_p, TIF_BTS_TRACE_TS))
|
||||||
ptrace_bts_take_timestamp(prev_p, BTS_TASK_DEPARTS);
|
ptrace_bts_take_timestamp(prev_p, BTS_TASK_DEPARTS);
|
||||||
|
|
||||||
if (test_tsk_thread_flag(next_p, TIF_BTS_TRACE_TS))
|
if (test_tsk_thread_flag(next_p, TIF_BTS_TRACE_TS))
|
||||||
ptrace_bts_take_timestamp(next_p, BTS_TASK_ARRIVES);
|
ptrace_bts_take_timestamp(next_p, BTS_TASK_ARRIVES);
|
||||||
|
#endif
|
||||||
}
|
}
|
||||||
|
|
||||||
/*
|
/*
|
||||||
|
|
|
@ -544,6 +544,8 @@ static int ptrace_set_debugreg(struct task_struct *child,
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
#ifdef X86_BTS
|
||||||
|
|
||||||
static int ptrace_bts_get_size(struct task_struct *child)
|
static int ptrace_bts_get_size(struct task_struct *child)
|
||||||
{
|
{
|
||||||
if (!child->thread.ds_area_msr)
|
if (!child->thread.ds_area_msr)
|
||||||
|
@ -826,6 +828,7 @@ void ptrace_bts_take_timestamp(struct task_struct *tsk,
|
||||||
|
|
||||||
ptrace_bts_write_record(tsk, &rec);
|
ptrace_bts_write_record(tsk, &rec);
|
||||||
}
|
}
|
||||||
|
#endif /* X86_BTS */
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Called by kernel/ptrace.c when detaching..
|
* Called by kernel/ptrace.c when detaching..
|
||||||
|
@ -839,7 +842,9 @@ void ptrace_disable(struct task_struct *child)
|
||||||
clear_tsk_thread_flag(child, TIF_SYSCALL_EMU);
|
clear_tsk_thread_flag(child, TIF_SYSCALL_EMU);
|
||||||
#endif
|
#endif
|
||||||
if (child->thread.ds_area_msr) {
|
if (child->thread.ds_area_msr) {
|
||||||
|
#ifdef X86_BTS
|
||||||
ptrace_bts_realloc(child, 0, 0);
|
ptrace_bts_realloc(child, 0, 0);
|
||||||
|
#endif
|
||||||
child->thread.debugctlmsr &= ~ds_debugctl_mask();
|
child->thread.debugctlmsr &= ~ds_debugctl_mask();
|
||||||
if (!child->thread.debugctlmsr)
|
if (!child->thread.debugctlmsr)
|
||||||
clear_tsk_thread_flag(child, TIF_DEBUGCTLMSR);
|
clear_tsk_thread_flag(child, TIF_DEBUGCTLMSR);
|
||||||
|
@ -961,6 +966,10 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
|
||||||
break;
|
break;
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
/*
|
||||||
|
* These bits need more cooking - not enabled yet:
|
||||||
|
*/
|
||||||
|
#ifdef X86_BTS
|
||||||
case PTRACE_BTS_CONFIG:
|
case PTRACE_BTS_CONFIG:
|
||||||
ret = ptrace_bts_config
|
ret = ptrace_bts_config
|
||||||
(child, data, (struct ptrace_bts_config __user *)addr);
|
(child, data, (struct ptrace_bts_config __user *)addr);
|
||||||
|
@ -988,6 +997,7 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
|
||||||
ret = ptrace_bts_drain
|
ret = ptrace_bts_drain
|
||||||
(child, data, (struct bts_struct __user *) addr);
|
(child, data, (struct bts_struct __user *) addr);
|
||||||
break;
|
break;
|
||||||
|
#endif
|
||||||
|
|
||||||
default:
|
default:
|
||||||
ret = ptrace_request(child, request, addr, data);
|
ret = ptrace_request(child, request, addr, data);
|
||||||
|
@ -1226,12 +1236,14 @@ asmlinkage long sys32_ptrace(long request, u32 pid, u32 addr, u32 data)
|
||||||
case PTRACE_SETOPTIONS:
|
case PTRACE_SETOPTIONS:
|
||||||
case PTRACE_SET_THREAD_AREA:
|
case PTRACE_SET_THREAD_AREA:
|
||||||
case PTRACE_GET_THREAD_AREA:
|
case PTRACE_GET_THREAD_AREA:
|
||||||
|
#ifdef X86_BTS
|
||||||
case PTRACE_BTS_CONFIG:
|
case PTRACE_BTS_CONFIG:
|
||||||
case PTRACE_BTS_STATUS:
|
case PTRACE_BTS_STATUS:
|
||||||
case PTRACE_BTS_SIZE:
|
case PTRACE_BTS_SIZE:
|
||||||
case PTRACE_BTS_GET:
|
case PTRACE_BTS_GET:
|
||||||
case PTRACE_BTS_CLEAR:
|
case PTRACE_BTS_CLEAR:
|
||||||
case PTRACE_BTS_DRAIN:
|
case PTRACE_BTS_DRAIN:
|
||||||
|
#endif
|
||||||
return sys_ptrace(request, pid, addr, data);
|
return sys_ptrace(request, pid, addr, data);
|
||||||
|
|
||||||
default:
|
default:
|
||||||
|
|
|
@ -91,7 +91,9 @@ int do_set_thread_area(struct task_struct *p, int idx,
|
||||||
|
|
||||||
asmlinkage int sys_set_thread_area(struct user_desc __user *u_info)
|
asmlinkage int sys_set_thread_area(struct user_desc __user *u_info)
|
||||||
{
|
{
|
||||||
return do_set_thread_area(current, -1, u_info, 1);
|
int ret = do_set_thread_area(current, -1, u_info, 1);
|
||||||
|
prevent_tail_call(ret);
|
||||||
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
@ -139,7 +141,9 @@ int do_get_thread_area(struct task_struct *p, int idx,
|
||||||
|
|
||||||
asmlinkage int sys_get_thread_area(struct user_desc __user *u_info)
|
asmlinkage int sys_get_thread_area(struct user_desc __user *u_info)
|
||||||
{
|
{
|
||||||
return do_get_thread_area(current, -1, u_info);
|
int ret = do_get_thread_area(current, -1, u_info);
|
||||||
|
prevent_tail_call(ret);
|
||||||
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
||||||
int regset_tls_active(struct task_struct *target,
|
int regset_tls_active(struct task_struct *target,
|
||||||
|
|
|
@ -222,10 +222,19 @@ long __vsyscall(3) venosys_1(void)
|
||||||
}
|
}
|
||||||
|
|
||||||
#ifdef CONFIG_SYSCTL
|
#ifdef CONFIG_SYSCTL
|
||||||
|
|
||||||
|
static int
|
||||||
|
vsyscall_sysctl_change(ctl_table *ctl, int write, struct file * filp,
|
||||||
|
void __user *buffer, size_t *lenp, loff_t *ppos)
|
||||||
|
{
|
||||||
|
return proc_dointvec(ctl, write, filp, buffer, lenp, ppos);
|
||||||
|
}
|
||||||
|
|
||||||
static ctl_table kernel_table2[] = {
|
static ctl_table kernel_table2[] = {
|
||||||
{ .procname = "vsyscall64",
|
{ .procname = "vsyscall64",
|
||||||
.data = &vsyscall_gtod_data.sysctl_enabled, .maxlen = sizeof(int),
|
.data = &vsyscall_gtod_data.sysctl_enabled, .maxlen = sizeof(int),
|
||||||
.mode = 0644 },
|
.mode = 0644,
|
||||||
|
.proc_handler = vsyscall_sysctl_change },
|
||||||
{}
|
{}
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
|
@ -162,7 +162,7 @@ static void __iomem *__ioremap(unsigned long phys_addr, unsigned long size,
|
||||||
area->phys_addr = phys_addr;
|
area->phys_addr = phys_addr;
|
||||||
vaddr = (unsigned long) area->addr;
|
vaddr = (unsigned long) area->addr;
|
||||||
if (ioremap_page_range(vaddr, vaddr + size, phys_addr, prot)) {
|
if (ioremap_page_range(vaddr, vaddr + size, phys_addr, prot)) {
|
||||||
remove_vm_area((void *)(vaddr & PAGE_MASK));
|
free_vm_area(area);
|
||||||
return NULL;
|
return NULL;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -48,9 +48,11 @@ obj-$(VDSO64-y) += vdso-syms.lds
|
||||||
# Match symbols in the DSO that look like VDSO*; produce a file of constants.
|
# Match symbols in the DSO that look like VDSO*; produce a file of constants.
|
||||||
#
|
#
|
||||||
sed-vdsosym := -e 's/^00*/0/' \
|
sed-vdsosym := -e 's/^00*/0/' \
|
||||||
-e 's/^\([[:xdigit:]]*\) . \(VDSO[[:alnum:]_]*\)$$/\2 = 0x\1;/p'
|
-e 's/^\([0-9a-fA-F]*\) . \(VDSO[a-zA-Z0-9_]*\)$$/\2 = 0x\1;/p'
|
||||||
quiet_cmd_vdsosym = VDSOSYM $@
|
quiet_cmd_vdsosym = VDSOSYM $@
|
||||||
cmd_vdsosym = $(NM) $< | sed -n $(sed-vdsosym) | LC_ALL=C sort > $@
|
define cmd_vdsosym
|
||||||
|
$(NM) $< | LC_ALL=C sed -n $(sed-vdsosym) | LC_ALL=C sort > $@
|
||||||
|
endef
|
||||||
|
|
||||||
$(obj)/%-syms.lds: $(obj)/%.so.dbg FORCE
|
$(obj)/%-syms.lds: $(obj)/%.so.dbg FORCE
|
||||||
$(call if_changed,vdsosym)
|
$(call if_changed,vdsosym)
|
||||||
|
|
|
@ -153,6 +153,7 @@ static void xen_cpuid(unsigned int *ax, unsigned int *bx,
|
||||||
if (*ax == 1)
|
if (*ax == 1)
|
||||||
maskedx = ~((1 << X86_FEATURE_APIC) | /* disable APIC */
|
maskedx = ~((1 << X86_FEATURE_APIC) | /* disable APIC */
|
||||||
(1 << X86_FEATURE_ACPI) | /* disable ACPI */
|
(1 << X86_FEATURE_ACPI) | /* disable ACPI */
|
||||||
|
(1 << X86_FEATURE_SEP) | /* disable SEP */
|
||||||
(1 << X86_FEATURE_ACC)); /* thermal monitoring */
|
(1 << X86_FEATURE_ACC)); /* thermal monitoring */
|
||||||
|
|
||||||
asm(XEN_EMULATE_PREFIX "cpuid"
|
asm(XEN_EMULATE_PREFIX "cpuid"
|
||||||
|
|
|
@ -1694,12 +1694,17 @@ void ata_scsi_rbuf_fill(struct ata_scsi_args *args,
|
||||||
u8 *rbuf;
|
u8 *rbuf;
|
||||||
unsigned int buflen, rc;
|
unsigned int buflen, rc;
|
||||||
struct scsi_cmnd *cmd = args->cmd;
|
struct scsi_cmnd *cmd = args->cmd;
|
||||||
|
unsigned long flags;
|
||||||
|
|
||||||
|
local_irq_save(flags);
|
||||||
|
|
||||||
buflen = ata_scsi_rbuf_get(cmd, &rbuf);
|
buflen = ata_scsi_rbuf_get(cmd, &rbuf);
|
||||||
memset(rbuf, 0, buflen);
|
memset(rbuf, 0, buflen);
|
||||||
rc = actor(args, rbuf, buflen);
|
rc = actor(args, rbuf, buflen);
|
||||||
ata_scsi_rbuf_put(cmd, rbuf);
|
ata_scsi_rbuf_put(cmd, rbuf);
|
||||||
|
|
||||||
|
local_irq_restore(flags);
|
||||||
|
|
||||||
if (rc == 0)
|
if (rc == 0)
|
||||||
cmd->result = SAM_STAT_GOOD;
|
cmd->result = SAM_STAT_GOOD;
|
||||||
args->done(cmd);
|
args->done(cmd);
|
||||||
|
@ -2473,6 +2478,9 @@ static void atapi_qc_complete(struct ata_queued_cmd *qc)
|
||||||
if ((scsicmd[0] == INQUIRY) && ((scsicmd[1] & 0x03) == 0)) {
|
if ((scsicmd[0] == INQUIRY) && ((scsicmd[1] & 0x03) == 0)) {
|
||||||
u8 *buf = NULL;
|
u8 *buf = NULL;
|
||||||
unsigned int buflen;
|
unsigned int buflen;
|
||||||
|
unsigned long flags;
|
||||||
|
|
||||||
|
local_irq_save(flags);
|
||||||
|
|
||||||
buflen = ata_scsi_rbuf_get(cmd, &buf);
|
buflen = ata_scsi_rbuf_get(cmd, &buf);
|
||||||
|
|
||||||
|
@ -2490,6 +2498,8 @@ static void atapi_qc_complete(struct ata_queued_cmd *qc)
|
||||||
}
|
}
|
||||||
|
|
||||||
ata_scsi_rbuf_put(cmd, buf);
|
ata_scsi_rbuf_put(cmd, buf);
|
||||||
|
|
||||||
|
local_irq_restore(flags);
|
||||||
}
|
}
|
||||||
|
|
||||||
cmd->result = SAM_STAT_GOOD;
|
cmd->result = SAM_STAT_GOOD;
|
||||||
|
|
|
@ -45,6 +45,8 @@
|
||||||
#include <linux/interrupt.h>
|
#include <linux/interrupt.h>
|
||||||
#include <linux/device.h>
|
#include <linux/device.h>
|
||||||
#include <scsi/scsi_host.h>
|
#include <scsi/scsi_host.h>
|
||||||
|
#include <scsi/scsi_cmnd.h>
|
||||||
|
#include <scsi/scsi.h>
|
||||||
#include <linux/libata.h>
|
#include <linux/libata.h>
|
||||||
|
|
||||||
#ifdef CONFIG_PPC_OF
|
#ifdef CONFIG_PPC_OF
|
||||||
|
@ -59,6 +61,7 @@ enum {
|
||||||
/* ap->flags bits */
|
/* ap->flags bits */
|
||||||
K2_FLAG_SATA_8_PORTS = (1 << 24),
|
K2_FLAG_SATA_8_PORTS = (1 << 24),
|
||||||
K2_FLAG_NO_ATAPI_DMA = (1 << 25),
|
K2_FLAG_NO_ATAPI_DMA = (1 << 25),
|
||||||
|
K2_FLAG_BAR_POS_3 = (1 << 26),
|
||||||
|
|
||||||
/* Taskfile registers offsets */
|
/* Taskfile registers offsets */
|
||||||
K2_SATA_TF_CMD_OFFSET = 0x00,
|
K2_SATA_TF_CMD_OFFSET = 0x00,
|
||||||
|
@ -88,8 +91,10 @@ enum {
|
||||||
/* Port stride */
|
/* Port stride */
|
||||||
K2_SATA_PORT_OFFSET = 0x100,
|
K2_SATA_PORT_OFFSET = 0x100,
|
||||||
|
|
||||||
board_svw4 = 0,
|
chip_svw4 = 0,
|
||||||
board_svw8 = 1,
|
chip_svw8 = 1,
|
||||||
|
chip_svw42 = 2, /* bar 3 */
|
||||||
|
chip_svw43 = 3, /* bar 5 */
|
||||||
};
|
};
|
||||||
|
|
||||||
static u8 k2_stat_check_status(struct ata_port *ap);
|
static u8 k2_stat_check_status(struct ata_port *ap);
|
||||||
|
@ -97,10 +102,25 @@ static u8 k2_stat_check_status(struct ata_port *ap);
|
||||||
|
|
||||||
static int k2_sata_check_atapi_dma(struct ata_queued_cmd *qc)
|
static int k2_sata_check_atapi_dma(struct ata_queued_cmd *qc)
|
||||||
{
|
{
|
||||||
|
u8 cmnd = qc->scsicmd->cmnd[0];
|
||||||
|
|
||||||
if (qc->ap->flags & K2_FLAG_NO_ATAPI_DMA)
|
if (qc->ap->flags & K2_FLAG_NO_ATAPI_DMA)
|
||||||
return -1; /* ATAPI DMA not supported */
|
return -1; /* ATAPI DMA not supported */
|
||||||
|
else {
|
||||||
|
switch (cmnd) {
|
||||||
|
case READ_10:
|
||||||
|
case READ_12:
|
||||||
|
case READ_16:
|
||||||
|
case WRITE_10:
|
||||||
|
case WRITE_12:
|
||||||
|
case WRITE_16:
|
||||||
|
return 0;
|
||||||
|
|
||||||
return 0;
|
default:
|
||||||
|
return -1;
|
||||||
|
}
|
||||||
|
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
static int k2_sata_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val)
|
static int k2_sata_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val)
|
||||||
|
@ -354,7 +374,7 @@ static const struct ata_port_operations k2_sata_ops = {
|
||||||
};
|
};
|
||||||
|
|
||||||
static const struct ata_port_info k2_port_info[] = {
|
static const struct ata_port_info k2_port_info[] = {
|
||||||
/* board_svw4 */
|
/* chip_svw4 */
|
||||||
{
|
{
|
||||||
.flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY |
|
.flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY |
|
||||||
ATA_FLAG_MMIO | K2_FLAG_NO_ATAPI_DMA,
|
ATA_FLAG_MMIO | K2_FLAG_NO_ATAPI_DMA,
|
||||||
|
@ -363,7 +383,7 @@ static const struct ata_port_info k2_port_info[] = {
|
||||||
.udma_mask = ATA_UDMA6,
|
.udma_mask = ATA_UDMA6,
|
||||||
.port_ops = &k2_sata_ops,
|
.port_ops = &k2_sata_ops,
|
||||||
},
|
},
|
||||||
/* board_svw8 */
|
/* chip_svw8 */
|
||||||
{
|
{
|
||||||
.flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY |
|
.flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY |
|
||||||
ATA_FLAG_MMIO | K2_FLAG_NO_ATAPI_DMA |
|
ATA_FLAG_MMIO | K2_FLAG_NO_ATAPI_DMA |
|
||||||
|
@ -373,6 +393,24 @@ static const struct ata_port_info k2_port_info[] = {
|
||||||
.udma_mask = ATA_UDMA6,
|
.udma_mask = ATA_UDMA6,
|
||||||
.port_ops = &k2_sata_ops,
|
.port_ops = &k2_sata_ops,
|
||||||
},
|
},
|
||||||
|
/* chip_svw42 */
|
||||||
|
{
|
||||||
|
.flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY |
|
||||||
|
ATA_FLAG_MMIO | K2_FLAG_BAR_POS_3,
|
||||||
|
.pio_mask = 0x1f,
|
||||||
|
.mwdma_mask = 0x07,
|
||||||
|
.udma_mask = ATA_UDMA6,
|
||||||
|
.port_ops = &k2_sata_ops,
|
||||||
|
},
|
||||||
|
/* chip_svw43 */
|
||||||
|
{
|
||||||
|
.flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY |
|
||||||
|
ATA_FLAG_MMIO,
|
||||||
|
.pio_mask = 0x1f,
|
||||||
|
.mwdma_mask = 0x07,
|
||||||
|
.udma_mask = ATA_UDMA6,
|
||||||
|
.port_ops = &k2_sata_ops,
|
||||||
|
},
|
||||||
};
|
};
|
||||||
|
|
||||||
static void k2_sata_setup_port(struct ata_ioports *port, void __iomem *base)
|
static void k2_sata_setup_port(struct ata_ioports *port, void __iomem *base)
|
||||||
|
@ -402,7 +440,7 @@ static int k2_sata_init_one(struct pci_dev *pdev, const struct pci_device_id *en
|
||||||
{ &k2_port_info[ent->driver_data], NULL };
|
{ &k2_port_info[ent->driver_data], NULL };
|
||||||
struct ata_host *host;
|
struct ata_host *host;
|
||||||
void __iomem *mmio_base;
|
void __iomem *mmio_base;
|
||||||
int n_ports, i, rc;
|
int n_ports, i, rc, bar_pos;
|
||||||
|
|
||||||
if (!printed_version++)
|
if (!printed_version++)
|
||||||
dev_printk(KERN_DEBUG, &pdev->dev, "version " DRV_VERSION "\n");
|
dev_printk(KERN_DEBUG, &pdev->dev, "version " DRV_VERSION "\n");
|
||||||
|
@ -416,6 +454,9 @@ static int k2_sata_init_one(struct pci_dev *pdev, const struct pci_device_id *en
|
||||||
if (!host)
|
if (!host)
|
||||||
return -ENOMEM;
|
return -ENOMEM;
|
||||||
|
|
||||||
|
bar_pos = 5;
|
||||||
|
if (ppi[0]->flags & K2_FLAG_BAR_POS_3)
|
||||||
|
bar_pos = 3;
|
||||||
/*
|
/*
|
||||||
* If this driver happens to only be useful on Apple's K2, then
|
* If this driver happens to only be useful on Apple's K2, then
|
||||||
* we should check that here as it has a normal Serverworks ID
|
* we should check that here as it has a normal Serverworks ID
|
||||||
|
@ -428,17 +469,23 @@ static int k2_sata_init_one(struct pci_dev *pdev, const struct pci_device_id *en
|
||||||
* Check if we have resources mapped at all (second function may
|
* Check if we have resources mapped at all (second function may
|
||||||
* have been disabled by firmware)
|
* have been disabled by firmware)
|
||||||
*/
|
*/
|
||||||
if (pci_resource_len(pdev, 5) == 0)
|
if (pci_resource_len(pdev, bar_pos) == 0) {
|
||||||
|
/* In IDE mode we need to pin the device to ensure that
|
||||||
|
pcim_release does not clear the busmaster bit in config
|
||||||
|
space, clearing causes busmaster DMA to fail on
|
||||||
|
ports 3 & 4 */
|
||||||
|
pcim_pin_device(pdev);
|
||||||
return -ENODEV;
|
return -ENODEV;
|
||||||
|
}
|
||||||
|
|
||||||
/* Request and iomap PCI regions */
|
/* Request and iomap PCI regions */
|
||||||
rc = pcim_iomap_regions(pdev, 1 << 5, DRV_NAME);
|
rc = pcim_iomap_regions(pdev, 1 << bar_pos, DRV_NAME);
|
||||||
if (rc == -EBUSY)
|
if (rc == -EBUSY)
|
||||||
pcim_pin_device(pdev);
|
pcim_pin_device(pdev);
|
||||||
if (rc)
|
if (rc)
|
||||||
return rc;
|
return rc;
|
||||||
host->iomap = pcim_iomap_table(pdev);
|
host->iomap = pcim_iomap_table(pdev);
|
||||||
mmio_base = host->iomap[5];
|
mmio_base = host->iomap[bar_pos];
|
||||||
|
|
||||||
/* different controllers have different number of ports - currently 4 or 8 */
|
/* different controllers have different number of ports - currently 4 or 8 */
|
||||||
/* All ports are on the same function. Multi-function device is no
|
/* All ports are on the same function. Multi-function device is no
|
||||||
|
@ -483,11 +530,13 @@ static int k2_sata_init_one(struct pci_dev *pdev, const struct pci_device_id *en
|
||||||
* controller
|
* controller
|
||||||
* */
|
* */
|
||||||
static const struct pci_device_id k2_sata_pci_tbl[] = {
|
static const struct pci_device_id k2_sata_pci_tbl[] = {
|
||||||
{ PCI_VDEVICE(SERVERWORKS, 0x0240), board_svw4 },
|
{ PCI_VDEVICE(SERVERWORKS, 0x0240), chip_svw4 },
|
||||||
{ PCI_VDEVICE(SERVERWORKS, 0x0241), board_svw4 },
|
{ PCI_VDEVICE(SERVERWORKS, 0x0241), chip_svw4 },
|
||||||
{ PCI_VDEVICE(SERVERWORKS, 0x0242), board_svw8 },
|
{ PCI_VDEVICE(SERVERWORKS, 0x0242), chip_svw8 },
|
||||||
{ PCI_VDEVICE(SERVERWORKS, 0x024a), board_svw4 },
|
{ PCI_VDEVICE(SERVERWORKS, 0x024a), chip_svw4 },
|
||||||
{ PCI_VDEVICE(SERVERWORKS, 0x024b), board_svw4 },
|
{ PCI_VDEVICE(SERVERWORKS, 0x024b), chip_svw4 },
|
||||||
|
{ PCI_VDEVICE(SERVERWORKS, 0x0410), chip_svw42 },
|
||||||
|
{ PCI_VDEVICE(SERVERWORKS, 0x0411), chip_svw43 },
|
||||||
|
|
||||||
{ }
|
{ }
|
||||||
};
|
};
|
||||||
|
|
|
@ -126,9 +126,7 @@ static int transport_setup_classdev(struct attribute_container *cont,
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* transport_setup_device - declare a new dev for transport class association
|
* transport_setup_device - declare a new dev for transport class association but don't make it visible yet.
|
||||||
* but don't make it visible yet.
|
|
||||||
*
|
|
||||||
* @dev: the generic device representing the entity being added
|
* @dev: the generic device representing the entity being added
|
||||||
*
|
*
|
||||||
* Usually, dev represents some component in the HBA system (either
|
* Usually, dev represents some component in the HBA system (either
|
||||||
|
|
|
@ -110,8 +110,8 @@ static int rtc_has_irq = 1;
|
||||||
#define hpet_set_rtc_irq_bit(arg) 0
|
#define hpet_set_rtc_irq_bit(arg) 0
|
||||||
#define hpet_rtc_timer_init() do { } while (0)
|
#define hpet_rtc_timer_init() do { } while (0)
|
||||||
#define hpet_rtc_dropped_irq() 0
|
#define hpet_rtc_dropped_irq() 0
|
||||||
#define hpet_register_irq_handler(h) 0
|
#define hpet_register_irq_handler(h) ({ 0; })
|
||||||
#define hpet_unregister_irq_handler(h) 0
|
#define hpet_unregister_irq_handler(h) ({ 0; })
|
||||||
#ifdef RTC_IRQ
|
#ifdef RTC_IRQ
|
||||||
static irqreturn_t hpet_rtc_interrupt(int irq, void *dev_id)
|
static irqreturn_t hpet_rtc_interrupt(int irq, void *dev_id)
|
||||||
{
|
{
|
||||||
|
|
|
@ -73,8 +73,8 @@
|
||||||
#define XHI_BUFFER_START 0
|
#define XHI_BUFFER_START 0
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* buffer_icap_get_status: Get the contents of the status register.
|
* buffer_icap_get_status - Get the contents of the status register.
|
||||||
* @parameter base_address: is the base address of the device
|
* @base_address: is the base address of the device
|
||||||
*
|
*
|
||||||
* The status register contains the ICAP status and the done bit.
|
* The status register contains the ICAP status and the done bit.
|
||||||
*
|
*
|
||||||
|
@ -94,9 +94,9 @@ static inline u32 buffer_icap_get_status(void __iomem *base_address)
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* buffer_icap_get_bram: Reads data from the storage buffer bram.
|
* buffer_icap_get_bram - Reads data from the storage buffer bram.
|
||||||
* @parameter base_address: contains the base address of the component.
|
* @base_address: contains the base address of the component.
|
||||||
* @parameter offset: The word offset from which the data should be read.
|
* @offset: The word offset from which the data should be read.
|
||||||
*
|
*
|
||||||
* A bram is used as a configuration memory cache. One frame of data can
|
* A bram is used as a configuration memory cache. One frame of data can
|
||||||
* be stored in this "storage buffer".
|
* be stored in this "storage buffer".
|
||||||
|
@ -108,8 +108,8 @@ static inline u32 buffer_icap_get_bram(void __iomem *base_address,
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* buffer_icap_busy: Return true if the icap device is busy
|
* buffer_icap_busy - Return true if the icap device is busy
|
||||||
* @parameter base_address: is the base address of the device
|
* @base_address: is the base address of the device
|
||||||
*
|
*
|
||||||
* The queries the low order bit of the status register, which
|
* The queries the low order bit of the status register, which
|
||||||
* indicates whether the current configuration or readback operation
|
* indicates whether the current configuration or readback operation
|
||||||
|
@ -121,8 +121,8 @@ static inline bool buffer_icap_busy(void __iomem *base_address)
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* buffer_icap_busy: Return true if the icap device is not busy
|
* buffer_icap_busy - Return true if the icap device is not busy
|
||||||
* @parameter base_address: is the base address of the device
|
* @base_address: is the base address of the device
|
||||||
*
|
*
|
||||||
* The queries the low order bit of the status register, which
|
* The queries the low order bit of the status register, which
|
||||||
* indicates whether the current configuration or readback operation
|
* indicates whether the current configuration or readback operation
|
||||||
|
@ -134,9 +134,9 @@ static inline bool buffer_icap_done(void __iomem *base_address)
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* buffer_icap_set_size: Set the size register.
|
* buffer_icap_set_size - Set the size register.
|
||||||
* @parameter base_address: is the base address of the device
|
* @base_address: is the base address of the device
|
||||||
* @parameter data: The size in bytes.
|
* @data: The size in bytes.
|
||||||
*
|
*
|
||||||
* The size register holds the number of 8 bit bytes to transfer between
|
* The size register holds the number of 8 bit bytes to transfer between
|
||||||
* bram and the icap (or icap to bram).
|
* bram and the icap (or icap to bram).
|
||||||
|
@ -148,9 +148,9 @@ static inline void buffer_icap_set_size(void __iomem *base_address,
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* buffer_icap_mSetoffsetReg: Set the bram offset register.
|
* buffer_icap_set_offset - Set the bram offset register.
|
||||||
* @parameter base_address: contains the base address of the device.
|
* @base_address: contains the base address of the device.
|
||||||
* @parameter data: is the value to be written to the data register.
|
* @data: is the value to be written to the data register.
|
||||||
*
|
*
|
||||||
* The bram offset register holds the starting bram address to transfer
|
* The bram offset register holds the starting bram address to transfer
|
||||||
* data from during configuration or write data to during readback.
|
* data from during configuration or write data to during readback.
|
||||||
|
@ -162,9 +162,9 @@ static inline void buffer_icap_set_offset(void __iomem *base_address,
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* buffer_icap_set_rnc: Set the RNC (Readback not Configure) register.
|
* buffer_icap_set_rnc - Set the RNC (Readback not Configure) register.
|
||||||
* @parameter base_address: contains the base address of the device.
|
* @base_address: contains the base address of the device.
|
||||||
* @parameter data: is the value to be written to the data register.
|
* @data: is the value to be written to the data register.
|
||||||
*
|
*
|
||||||
* The RNC register determines the direction of the data transfer. It
|
* The RNC register determines the direction of the data transfer. It
|
||||||
* controls whether a configuration or readback take place. Writing to
|
* controls whether a configuration or readback take place. Writing to
|
||||||
|
@ -178,10 +178,10 @@ static inline void buffer_icap_set_rnc(void __iomem *base_address,
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* buffer_icap_set_bram: Write data to the storage buffer bram.
|
* buffer_icap_set_bram - Write data to the storage buffer bram.
|
||||||
* @parameter base_address: contains the base address of the component.
|
* @base_address: contains the base address of the component.
|
||||||
* @parameter offset: The word offset at which the data should be written.
|
* @offset: The word offset at which the data should be written.
|
||||||
* @parameter data: The value to be written to the bram offset.
|
* @data: The value to be written to the bram offset.
|
||||||
*
|
*
|
||||||
* A bram is used as a configuration memory cache. One frame of data can
|
* A bram is used as a configuration memory cache. One frame of data can
|
||||||
* be stored in this "storage buffer".
|
* be stored in this "storage buffer".
|
||||||
|
@ -193,10 +193,10 @@ static inline void buffer_icap_set_bram(void __iomem *base_address,
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* buffer_icap_device_read: Transfer bytes from ICAP to the storage buffer.
|
* buffer_icap_device_read - Transfer bytes from ICAP to the storage buffer.
|
||||||
* @parameter drvdata: a pointer to the drvdata.
|
* @drvdata: a pointer to the drvdata.
|
||||||
* @parameter offset: The storage buffer start address.
|
* @offset: The storage buffer start address.
|
||||||
* @parameter count: The number of words (32 bit) to read from the
|
* @count: The number of words (32 bit) to read from the
|
||||||
* device (ICAP).
|
* device (ICAP).
|
||||||
**/
|
**/
|
||||||
static int buffer_icap_device_read(struct hwicap_drvdata *drvdata,
|
static int buffer_icap_device_read(struct hwicap_drvdata *drvdata,
|
||||||
|
@ -227,10 +227,10 @@ static int buffer_icap_device_read(struct hwicap_drvdata *drvdata,
|
||||||
};
|
};
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* buffer_icap_device_write: Transfer bytes from ICAP to the storage buffer.
|
* buffer_icap_device_write - Transfer bytes from ICAP to the storage buffer.
|
||||||
* @parameter drvdata: a pointer to the drvdata.
|
* @drvdata: a pointer to the drvdata.
|
||||||
* @parameter offset: The storage buffer start address.
|
* @offset: The storage buffer start address.
|
||||||
* @parameter count: The number of words (32 bit) to read from the
|
* @count: The number of words (32 bit) to read from the
|
||||||
* device (ICAP).
|
* device (ICAP).
|
||||||
**/
|
**/
|
||||||
static int buffer_icap_device_write(struct hwicap_drvdata *drvdata,
|
static int buffer_icap_device_write(struct hwicap_drvdata *drvdata,
|
||||||
|
@ -261,8 +261,8 @@ static int buffer_icap_device_write(struct hwicap_drvdata *drvdata,
|
||||||
};
|
};
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* buffer_icap_reset: Reset the logic of the icap device.
|
* buffer_icap_reset - Reset the logic of the icap device.
|
||||||
* @parameter drvdata: a pointer to the drvdata.
|
* @drvdata: a pointer to the drvdata.
|
||||||
*
|
*
|
||||||
* Writing to the status register resets the ICAP logic in an internal
|
* Writing to the status register resets the ICAP logic in an internal
|
||||||
* version of the core. For the version of the core published in EDK,
|
* version of the core. For the version of the core published in EDK,
|
||||||
|
@ -274,10 +274,10 @@ void buffer_icap_reset(struct hwicap_drvdata *drvdata)
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* buffer_icap_set_configuration: Load a partial bitstream from system memory.
|
* buffer_icap_set_configuration - Load a partial bitstream from system memory.
|
||||||
* @parameter drvdata: a pointer to the drvdata.
|
* @drvdata: a pointer to the drvdata.
|
||||||
* @parameter data: Kernel address of the partial bitstream.
|
* @data: Kernel address of the partial bitstream.
|
||||||
* @parameter size: the size of the partial bitstream in 32 bit words.
|
* @size: the size of the partial bitstream in 32 bit words.
|
||||||
**/
|
**/
|
||||||
int buffer_icap_set_configuration(struct hwicap_drvdata *drvdata, u32 *data,
|
int buffer_icap_set_configuration(struct hwicap_drvdata *drvdata, u32 *data,
|
||||||
u32 size)
|
u32 size)
|
||||||
|
@ -333,10 +333,10 @@ int buffer_icap_set_configuration(struct hwicap_drvdata *drvdata, u32 *data,
|
||||||
};
|
};
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* buffer_icap_get_configuration: Read configuration data from the device.
|
* buffer_icap_get_configuration - Read configuration data from the device.
|
||||||
* @parameter drvdata: a pointer to the drvdata.
|
* @drvdata: a pointer to the drvdata.
|
||||||
* @parameter data: Address of the data representing the partial bitstream
|
* @data: Address of the data representing the partial bitstream
|
||||||
* @parameter size: the size of the partial bitstream in 32 bit words.
|
* @size: the size of the partial bitstream in 32 bit words.
|
||||||
**/
|
**/
|
||||||
int buffer_icap_get_configuration(struct hwicap_drvdata *drvdata, u32 *data,
|
int buffer_icap_get_configuration(struct hwicap_drvdata *drvdata, u32 *data,
|
||||||
u32 size)
|
u32 size)
|
||||||
|
|
|
@ -94,9 +94,9 @@
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* fifo_icap_fifo_write: Write data to the write FIFO.
|
* fifo_icap_fifo_write - Write data to the write FIFO.
|
||||||
* @parameter drvdata: a pointer to the drvdata.
|
* @drvdata: a pointer to the drvdata.
|
||||||
* @parameter data: the 32-bit value to be written to the FIFO.
|
* @data: the 32-bit value to be written to the FIFO.
|
||||||
*
|
*
|
||||||
* This function will silently fail if the fifo is full.
|
* This function will silently fail if the fifo is full.
|
||||||
**/
|
**/
|
||||||
|
@ -108,8 +108,8 @@ static inline void fifo_icap_fifo_write(struct hwicap_drvdata *drvdata,
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* fifo_icap_fifo_read: Read data from the Read FIFO.
|
* fifo_icap_fifo_read - Read data from the Read FIFO.
|
||||||
* @parameter drvdata: a pointer to the drvdata.
|
* @drvdata: a pointer to the drvdata.
|
||||||
*
|
*
|
||||||
* This function will silently fail if the fifo is empty.
|
* This function will silently fail if the fifo is empty.
|
||||||
**/
|
**/
|
||||||
|
@ -121,9 +121,9 @@ static inline u32 fifo_icap_fifo_read(struct hwicap_drvdata *drvdata)
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* fifo_icap_set_read_size: Set the the size register.
|
* fifo_icap_set_read_size - Set the the size register.
|
||||||
* @parameter drvdata: a pointer to the drvdata.
|
* @drvdata: a pointer to the drvdata.
|
||||||
* @parameter data: the size of the following read transaction, in words.
|
* @data: the size of the following read transaction, in words.
|
||||||
**/
|
**/
|
||||||
static inline void fifo_icap_set_read_size(struct hwicap_drvdata *drvdata,
|
static inline void fifo_icap_set_read_size(struct hwicap_drvdata *drvdata,
|
||||||
u32 data)
|
u32 data)
|
||||||
|
@ -132,8 +132,8 @@ static inline void fifo_icap_set_read_size(struct hwicap_drvdata *drvdata,
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* fifo_icap_start_config: Initiate a configuration (write) to the device.
|
* fifo_icap_start_config - Initiate a configuration (write) to the device.
|
||||||
* @parameter drvdata: a pointer to the drvdata.
|
* @drvdata: a pointer to the drvdata.
|
||||||
**/
|
**/
|
||||||
static inline void fifo_icap_start_config(struct hwicap_drvdata *drvdata)
|
static inline void fifo_icap_start_config(struct hwicap_drvdata *drvdata)
|
||||||
{
|
{
|
||||||
|
@ -142,8 +142,8 @@ static inline void fifo_icap_start_config(struct hwicap_drvdata *drvdata)
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* fifo_icap_start_readback: Initiate a readback from the device.
|
* fifo_icap_start_readback - Initiate a readback from the device.
|
||||||
* @parameter drvdata: a pointer to the drvdata.
|
* @drvdata: a pointer to the drvdata.
|
||||||
**/
|
**/
|
||||||
static inline void fifo_icap_start_readback(struct hwicap_drvdata *drvdata)
|
static inline void fifo_icap_start_readback(struct hwicap_drvdata *drvdata)
|
||||||
{
|
{
|
||||||
|
@ -152,8 +152,8 @@ static inline void fifo_icap_start_readback(struct hwicap_drvdata *drvdata)
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* fifo_icap_busy: Return true if the ICAP is still processing a transaction.
|
* fifo_icap_busy - Return true if the ICAP is still processing a transaction.
|
||||||
* @parameter drvdata: a pointer to the drvdata.
|
* @drvdata: a pointer to the drvdata.
|
||||||
**/
|
**/
|
||||||
static inline u32 fifo_icap_busy(struct hwicap_drvdata *drvdata)
|
static inline u32 fifo_icap_busy(struct hwicap_drvdata *drvdata)
|
||||||
{
|
{
|
||||||
|
@ -163,8 +163,8 @@ static inline u32 fifo_icap_busy(struct hwicap_drvdata *drvdata)
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* fifo_icap_write_fifo_vacancy: Query the write fifo available space.
|
* fifo_icap_write_fifo_vacancy - Query the write fifo available space.
|
||||||
* @parameter drvdata: a pointer to the drvdata.
|
* @drvdata: a pointer to the drvdata.
|
||||||
*
|
*
|
||||||
* Return the number of words that can be safely pushed into the write fifo.
|
* Return the number of words that can be safely pushed into the write fifo.
|
||||||
**/
|
**/
|
||||||
|
@ -175,8 +175,8 @@ static inline u32 fifo_icap_write_fifo_vacancy(
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* fifo_icap_read_fifo_occupancy: Query the read fifo available data.
|
* fifo_icap_read_fifo_occupancy - Query the read fifo available data.
|
||||||
* @parameter drvdata: a pointer to the drvdata.
|
* @drvdata: a pointer to the drvdata.
|
||||||
*
|
*
|
||||||
* Return the number of words that can be safely read from the read fifo.
|
* Return the number of words that can be safely read from the read fifo.
|
||||||
**/
|
**/
|
||||||
|
@ -187,11 +187,11 @@ static inline u32 fifo_icap_read_fifo_occupancy(
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* fifo_icap_set_configuration: Send configuration data to the ICAP.
|
* fifo_icap_set_configuration - Send configuration data to the ICAP.
|
||||||
* @parameter drvdata: a pointer to the drvdata.
|
* @drvdata: a pointer to the drvdata.
|
||||||
* @parameter frame_buffer: a pointer to the data to be written to the
|
* @frame_buffer: a pointer to the data to be written to the
|
||||||
* ICAP device.
|
* ICAP device.
|
||||||
* @parameter num_words: the number of words (32 bit) to write to the ICAP
|
* @num_words: the number of words (32 bit) to write to the ICAP
|
||||||
* device.
|
* device.
|
||||||
|
|
||||||
* This function writes the given user data to the Write FIFO in
|
* This function writes the given user data to the Write FIFO in
|
||||||
|
@ -266,10 +266,10 @@ int fifo_icap_set_configuration(struct hwicap_drvdata *drvdata,
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* fifo_icap_get_configuration: Read configuration data from the device.
|
* fifo_icap_get_configuration - Read configuration data from the device.
|
||||||
* @parameter drvdata: a pointer to the drvdata.
|
* @drvdata: a pointer to the drvdata.
|
||||||
* @parameter data: Address of the data representing the partial bitstream
|
* @data: Address of the data representing the partial bitstream
|
||||||
* @parameter size: the size of the partial bitstream in 32 bit words.
|
* @size: the size of the partial bitstream in 32 bit words.
|
||||||
*
|
*
|
||||||
* This function reads the specified number of words from the ICAP device in
|
* This function reads the specified number of words from the ICAP device in
|
||||||
* the polled mode.
|
* the polled mode.
|
||||||
|
@ -335,8 +335,8 @@ int fifo_icap_get_configuration(struct hwicap_drvdata *drvdata,
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* buffer_icap_reset: Reset the logic of the icap device.
|
* buffer_icap_reset - Reset the logic of the icap device.
|
||||||
* @parameter drvdata: a pointer to the drvdata.
|
* @drvdata: a pointer to the drvdata.
|
||||||
*
|
*
|
||||||
* This function forces the software reset of the complete HWICAP device.
|
* This function forces the software reset of the complete HWICAP device.
|
||||||
* All the registers will return to the default value and the FIFO is also
|
* All the registers will return to the default value and the FIFO is also
|
||||||
|
@ -360,8 +360,8 @@ void fifo_icap_reset(struct hwicap_drvdata *drvdata)
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* fifo_icap_flush_fifo: This function flushes the FIFOs in the device.
|
* fifo_icap_flush_fifo - This function flushes the FIFOs in the device.
|
||||||
* @parameter drvdata: a pointer to the drvdata.
|
* @drvdata: a pointer to the drvdata.
|
||||||
*/
|
*/
|
||||||
void fifo_icap_flush_fifo(struct hwicap_drvdata *drvdata)
|
void fifo_icap_flush_fifo(struct hwicap_drvdata *drvdata)
|
||||||
{
|
{
|
||||||
|
|
|
@ -84,7 +84,7 @@
|
||||||
#include <linux/init.h>
|
#include <linux/init.h>
|
||||||
#include <linux/poll.h>
|
#include <linux/poll.h>
|
||||||
#include <linux/proc_fs.h>
|
#include <linux/proc_fs.h>
|
||||||
#include <asm/semaphore.h>
|
#include <linux/mutex.h>
|
||||||
#include <linux/sysctl.h>
|
#include <linux/sysctl.h>
|
||||||
#include <linux/version.h>
|
#include <linux/version.h>
|
||||||
#include <linux/fs.h>
|
#include <linux/fs.h>
|
||||||
|
@ -119,6 +119,7 @@ module_param(xhwicap_minor, int, S_IRUGO);
|
||||||
|
|
||||||
/* An array, which is set to true when the device is registered. */
|
/* An array, which is set to true when the device is registered. */
|
||||||
static bool probed_devices[HWICAP_DEVICES];
|
static bool probed_devices[HWICAP_DEVICES];
|
||||||
|
static struct mutex icap_sem;
|
||||||
|
|
||||||
static struct class *icap_class;
|
static struct class *icap_class;
|
||||||
|
|
||||||
|
@ -199,14 +200,14 @@ static const struct config_registers v5_config_registers = {
|
||||||
};
|
};
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* hwicap_command_desync: Send a DESYNC command to the ICAP port.
|
* hwicap_command_desync - Send a DESYNC command to the ICAP port.
|
||||||
* @parameter drvdata: a pointer to the drvdata.
|
* @drvdata: a pointer to the drvdata.
|
||||||
*
|
*
|
||||||
* This command desynchronizes the ICAP After this command, a
|
* This command desynchronizes the ICAP After this command, a
|
||||||
* bitstream containing a NULL packet, followed by a SYNCH packet is
|
* bitstream containing a NULL packet, followed by a SYNCH packet is
|
||||||
* required before the ICAP will recognize commands.
|
* required before the ICAP will recognize commands.
|
||||||
*/
|
*/
|
||||||
int hwicap_command_desync(struct hwicap_drvdata *drvdata)
|
static int hwicap_command_desync(struct hwicap_drvdata *drvdata)
|
||||||
{
|
{
|
||||||
u32 buffer[4];
|
u32 buffer[4];
|
||||||
u32 index = 0;
|
u32 index = 0;
|
||||||
|
@ -228,51 +229,18 @@ int hwicap_command_desync(struct hwicap_drvdata *drvdata)
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* hwicap_command_capture: Send a CAPTURE command to the ICAP port.
|
* hwicap_get_configuration_register - Query a configuration register.
|
||||||
* @parameter drvdata: a pointer to the drvdata.
|
* @drvdata: a pointer to the drvdata.
|
||||||
*
|
* @reg: a constant which represents the configuration
|
||||||
* This command captures all of the flip flop states so they will be
|
|
||||||
* available during readback. One can use this command instead of
|
|
||||||
* enabling the CAPTURE block in the design.
|
|
||||||
*/
|
|
||||||
int hwicap_command_capture(struct hwicap_drvdata *drvdata)
|
|
||||||
{
|
|
||||||
u32 buffer[7];
|
|
||||||
u32 index = 0;
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Create the data to be written to the ICAP.
|
|
||||||
*/
|
|
||||||
buffer[index++] = XHI_DUMMY_PACKET;
|
|
||||||
buffer[index++] = XHI_SYNC_PACKET;
|
|
||||||
buffer[index++] = XHI_NOOP_PACKET;
|
|
||||||
buffer[index++] = hwicap_type_1_write(drvdata->config_regs->CMD) | 1;
|
|
||||||
buffer[index++] = XHI_CMD_GCAPTURE;
|
|
||||||
buffer[index++] = XHI_DUMMY_PACKET;
|
|
||||||
buffer[index++] = XHI_DUMMY_PACKET;
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Write the data to the FIFO and intiate the transfer of data
|
|
||||||
* present in the FIFO to the ICAP device.
|
|
||||||
*/
|
|
||||||
return drvdata->config->set_configuration(drvdata,
|
|
||||||
&buffer[0], index);
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
/**
|
|
||||||
* hwicap_get_configuration_register: Query a configuration register.
|
|
||||||
* @parameter drvdata: a pointer to the drvdata.
|
|
||||||
* @parameter reg: a constant which represents the configuration
|
|
||||||
* register value to be returned.
|
* register value to be returned.
|
||||||
* Examples: XHI_IDCODE, XHI_FLR.
|
* Examples: XHI_IDCODE, XHI_FLR.
|
||||||
* @parameter RegData: returns the value of the register.
|
* @reg_data: returns the value of the register.
|
||||||
*
|
*
|
||||||
* Sends a query packet to the ICAP and then receives the response.
|
* Sends a query packet to the ICAP and then receives the response.
|
||||||
* The icap is left in Synched state.
|
* The icap is left in Synched state.
|
||||||
*/
|
*/
|
||||||
int hwicap_get_configuration_register(struct hwicap_drvdata *drvdata,
|
static int hwicap_get_configuration_register(struct hwicap_drvdata *drvdata,
|
||||||
u32 reg, u32 *RegData)
|
u32 reg, u32 *reg_data)
|
||||||
{
|
{
|
||||||
int status;
|
int status;
|
||||||
u32 buffer[6];
|
u32 buffer[6];
|
||||||
|
@ -300,14 +268,14 @@ int hwicap_get_configuration_register(struct hwicap_drvdata *drvdata,
|
||||||
/*
|
/*
|
||||||
* Read the configuration register
|
* Read the configuration register
|
||||||
*/
|
*/
|
||||||
status = drvdata->config->get_configuration(drvdata, RegData, 1);
|
status = drvdata->config->get_configuration(drvdata, reg_data, 1);
|
||||||
if (status)
|
if (status)
|
||||||
return status;
|
return status;
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
int hwicap_initialize_hwicap(struct hwicap_drvdata *drvdata)
|
static int hwicap_initialize_hwicap(struct hwicap_drvdata *drvdata)
|
||||||
{
|
{
|
||||||
int status;
|
int status;
|
||||||
u32 idcode;
|
u32 idcode;
|
||||||
|
@ -344,7 +312,7 @@ int hwicap_initialize_hwicap(struct hwicap_drvdata *drvdata)
|
||||||
}
|
}
|
||||||
|
|
||||||
static ssize_t
|
static ssize_t
|
||||||
hwicap_read(struct file *file, char *buf, size_t count, loff_t *ppos)
|
hwicap_read(struct file *file, char __user *buf, size_t count, loff_t *ppos)
|
||||||
{
|
{
|
||||||
struct hwicap_drvdata *drvdata = file->private_data;
|
struct hwicap_drvdata *drvdata = file->private_data;
|
||||||
ssize_t bytes_to_read = 0;
|
ssize_t bytes_to_read = 0;
|
||||||
|
@ -353,8 +321,9 @@ hwicap_read(struct file *file, char *buf, size_t count, loff_t *ppos)
|
||||||
u32 bytes_remaining;
|
u32 bytes_remaining;
|
||||||
int status;
|
int status;
|
||||||
|
|
||||||
if (down_interruptible(&drvdata->sem))
|
status = mutex_lock_interruptible(&drvdata->sem);
|
||||||
return -ERESTARTSYS;
|
if (status)
|
||||||
|
return status;
|
||||||
|
|
||||||
if (drvdata->read_buffer_in_use) {
|
if (drvdata->read_buffer_in_use) {
|
||||||
/* If there are leftover bytes in the buffer, just */
|
/* If there are leftover bytes in the buffer, just */
|
||||||
|
@ -370,8 +339,9 @@ hwicap_read(struct file *file, char *buf, size_t count, loff_t *ppos)
|
||||||
goto error;
|
goto error;
|
||||||
}
|
}
|
||||||
drvdata->read_buffer_in_use -= bytes_to_read;
|
drvdata->read_buffer_in_use -= bytes_to_read;
|
||||||
memcpy(drvdata->read_buffer + bytes_to_read,
|
memmove(drvdata->read_buffer,
|
||||||
drvdata->read_buffer, 4 - bytes_to_read);
|
drvdata->read_buffer + bytes_to_read,
|
||||||
|
4 - bytes_to_read);
|
||||||
} else {
|
} else {
|
||||||
/* Get new data from the ICAP, and return was was requested. */
|
/* Get new data from the ICAP, and return was was requested. */
|
||||||
kbuf = (u32 *) get_zeroed_page(GFP_KERNEL);
|
kbuf = (u32 *) get_zeroed_page(GFP_KERNEL);
|
||||||
|
@ -414,18 +384,20 @@ hwicap_read(struct file *file, char *buf, size_t count, loff_t *ppos)
|
||||||
status = -EFAULT;
|
status = -EFAULT;
|
||||||
goto error;
|
goto error;
|
||||||
}
|
}
|
||||||
memcpy(kbuf, drvdata->read_buffer, bytes_remaining);
|
memcpy(drvdata->read_buffer,
|
||||||
|
kbuf,
|
||||||
|
bytes_remaining);
|
||||||
drvdata->read_buffer_in_use = bytes_remaining;
|
drvdata->read_buffer_in_use = bytes_remaining;
|
||||||
free_page((unsigned long)kbuf);
|
free_page((unsigned long)kbuf);
|
||||||
}
|
}
|
||||||
status = bytes_to_read;
|
status = bytes_to_read;
|
||||||
error:
|
error:
|
||||||
up(&drvdata->sem);
|
mutex_unlock(&drvdata->sem);
|
||||||
return status;
|
return status;
|
||||||
}
|
}
|
||||||
|
|
||||||
static ssize_t
|
static ssize_t
|
||||||
hwicap_write(struct file *file, const char *buf,
|
hwicap_write(struct file *file, const char __user *buf,
|
||||||
size_t count, loff_t *ppos)
|
size_t count, loff_t *ppos)
|
||||||
{
|
{
|
||||||
struct hwicap_drvdata *drvdata = file->private_data;
|
struct hwicap_drvdata *drvdata = file->private_data;
|
||||||
|
@ -435,8 +407,9 @@ hwicap_write(struct file *file, const char *buf,
|
||||||
ssize_t len;
|
ssize_t len;
|
||||||
ssize_t status;
|
ssize_t status;
|
||||||
|
|
||||||
if (down_interruptible(&drvdata->sem))
|
status = mutex_lock_interruptible(&drvdata->sem);
|
||||||
return -ERESTARTSYS;
|
if (status)
|
||||||
|
return status;
|
||||||
|
|
||||||
left += drvdata->write_buffer_in_use;
|
left += drvdata->write_buffer_in_use;
|
||||||
|
|
||||||
|
@ -465,7 +438,7 @@ hwicap_write(struct file *file, const char *buf,
|
||||||
memcpy(kbuf, drvdata->write_buffer,
|
memcpy(kbuf, drvdata->write_buffer,
|
||||||
drvdata->write_buffer_in_use);
|
drvdata->write_buffer_in_use);
|
||||||
if (copy_from_user(
|
if (copy_from_user(
|
||||||
(((char *)kbuf) + (drvdata->write_buffer_in_use)),
|
(((char *)kbuf) + drvdata->write_buffer_in_use),
|
||||||
buf + written,
|
buf + written,
|
||||||
len - (drvdata->write_buffer_in_use))) {
|
len - (drvdata->write_buffer_in_use))) {
|
||||||
free_page((unsigned long)kbuf);
|
free_page((unsigned long)kbuf);
|
||||||
|
@ -508,7 +481,7 @@ hwicap_write(struct file *file, const char *buf,
|
||||||
free_page((unsigned long)kbuf);
|
free_page((unsigned long)kbuf);
|
||||||
status = written;
|
status = written;
|
||||||
error:
|
error:
|
||||||
up(&drvdata->sem);
|
mutex_unlock(&drvdata->sem);
|
||||||
return status;
|
return status;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -519,8 +492,9 @@ static int hwicap_open(struct inode *inode, struct file *file)
|
||||||
|
|
||||||
drvdata = container_of(inode->i_cdev, struct hwicap_drvdata, cdev);
|
drvdata = container_of(inode->i_cdev, struct hwicap_drvdata, cdev);
|
||||||
|
|
||||||
if (down_interruptible(&drvdata->sem))
|
status = mutex_lock_interruptible(&drvdata->sem);
|
||||||
return -ERESTARTSYS;
|
if (status)
|
||||||
|
return status;
|
||||||
|
|
||||||
if (drvdata->is_open) {
|
if (drvdata->is_open) {
|
||||||
status = -EBUSY;
|
status = -EBUSY;
|
||||||
|
@ -539,7 +513,7 @@ static int hwicap_open(struct inode *inode, struct file *file)
|
||||||
drvdata->is_open = 1;
|
drvdata->is_open = 1;
|
||||||
|
|
||||||
error:
|
error:
|
||||||
up(&drvdata->sem);
|
mutex_unlock(&drvdata->sem);
|
||||||
return status;
|
return status;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -549,8 +523,7 @@ static int hwicap_release(struct inode *inode, struct file *file)
|
||||||
int i;
|
int i;
|
||||||
int status = 0;
|
int status = 0;
|
||||||
|
|
||||||
if (down_interruptible(&drvdata->sem))
|
mutex_lock(&drvdata->sem);
|
||||||
return -ERESTARTSYS;
|
|
||||||
|
|
||||||
if (drvdata->write_buffer_in_use) {
|
if (drvdata->write_buffer_in_use) {
|
||||||
/* Flush write buffer. */
|
/* Flush write buffer. */
|
||||||
|
@ -569,7 +542,7 @@ static int hwicap_release(struct inode *inode, struct file *file)
|
||||||
|
|
||||||
error:
|
error:
|
||||||
drvdata->is_open = 0;
|
drvdata->is_open = 0;
|
||||||
up(&drvdata->sem);
|
mutex_unlock(&drvdata->sem);
|
||||||
return status;
|
return status;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -592,31 +565,36 @@ static int __devinit hwicap_setup(struct device *dev, int id,
|
||||||
|
|
||||||
dev_info(dev, "Xilinx icap port driver\n");
|
dev_info(dev, "Xilinx icap port driver\n");
|
||||||
|
|
||||||
|
mutex_lock(&icap_sem);
|
||||||
|
|
||||||
if (id < 0) {
|
if (id < 0) {
|
||||||
for (id = 0; id < HWICAP_DEVICES; id++)
|
for (id = 0; id < HWICAP_DEVICES; id++)
|
||||||
if (!probed_devices[id])
|
if (!probed_devices[id])
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
if (id < 0 || id >= HWICAP_DEVICES) {
|
if (id < 0 || id >= HWICAP_DEVICES) {
|
||||||
|
mutex_unlock(&icap_sem);
|
||||||
dev_err(dev, "%s%i too large\n", DRIVER_NAME, id);
|
dev_err(dev, "%s%i too large\n", DRIVER_NAME, id);
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
}
|
}
|
||||||
if (probed_devices[id]) {
|
if (probed_devices[id]) {
|
||||||
|
mutex_unlock(&icap_sem);
|
||||||
dev_err(dev, "cannot assign to %s%i; it is already in use\n",
|
dev_err(dev, "cannot assign to %s%i; it is already in use\n",
|
||||||
DRIVER_NAME, id);
|
DRIVER_NAME, id);
|
||||||
return -EBUSY;
|
return -EBUSY;
|
||||||
}
|
}
|
||||||
|
|
||||||
probed_devices[id] = 1;
|
probed_devices[id] = 1;
|
||||||
|
mutex_unlock(&icap_sem);
|
||||||
|
|
||||||
devt = MKDEV(xhwicap_major, xhwicap_minor + id);
|
devt = MKDEV(xhwicap_major, xhwicap_minor + id);
|
||||||
|
|
||||||
drvdata = kmalloc(sizeof(struct hwicap_drvdata), GFP_KERNEL);
|
drvdata = kzalloc(sizeof(struct hwicap_drvdata), GFP_KERNEL);
|
||||||
if (!drvdata) {
|
if (!drvdata) {
|
||||||
dev_err(dev, "Couldn't allocate device private record\n");
|
dev_err(dev, "Couldn't allocate device private record\n");
|
||||||
return -ENOMEM;
|
retval = -ENOMEM;
|
||||||
|
goto failed0;
|
||||||
}
|
}
|
||||||
memset((void *)drvdata, 0, sizeof(struct hwicap_drvdata));
|
|
||||||
dev_set_drvdata(dev, (void *)drvdata);
|
dev_set_drvdata(dev, (void *)drvdata);
|
||||||
|
|
||||||
if (!regs_res) {
|
if (!regs_res) {
|
||||||
|
@ -648,7 +626,7 @@ static int __devinit hwicap_setup(struct device *dev, int id,
|
||||||
drvdata->config = config;
|
drvdata->config = config;
|
||||||
drvdata->config_regs = config_regs;
|
drvdata->config_regs = config_regs;
|
||||||
|
|
||||||
init_MUTEX(&drvdata->sem);
|
mutex_init(&drvdata->sem);
|
||||||
drvdata->is_open = 0;
|
drvdata->is_open = 0;
|
||||||
|
|
||||||
dev_info(dev, "ioremap %lx to %p with size %x\n",
|
dev_info(dev, "ioremap %lx to %p with size %x\n",
|
||||||
|
@ -663,7 +641,7 @@ static int __devinit hwicap_setup(struct device *dev, int id,
|
||||||
goto failed3;
|
goto failed3;
|
||||||
}
|
}
|
||||||
/* devfs_mk_cdev(devt, S_IFCHR|S_IRUGO|S_IWUGO, DRIVER_NAME); */
|
/* devfs_mk_cdev(devt, S_IFCHR|S_IRUGO|S_IWUGO, DRIVER_NAME); */
|
||||||
class_device_create(icap_class, NULL, devt, NULL, DRIVER_NAME);
|
device_create(icap_class, dev, devt, "%s%d", DRIVER_NAME, id);
|
||||||
return 0; /* success */
|
return 0; /* success */
|
||||||
|
|
||||||
failed3:
|
failed3:
|
||||||
|
@ -675,6 +653,11 @@ static int __devinit hwicap_setup(struct device *dev, int id,
|
||||||
failed1:
|
failed1:
|
||||||
kfree(drvdata);
|
kfree(drvdata);
|
||||||
|
|
||||||
|
failed0:
|
||||||
|
mutex_lock(&icap_sem);
|
||||||
|
probed_devices[id] = 0;
|
||||||
|
mutex_unlock(&icap_sem);
|
||||||
|
|
||||||
return retval;
|
return retval;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -699,14 +682,16 @@ static int __devexit hwicap_remove(struct device *dev)
|
||||||
if (!drvdata)
|
if (!drvdata)
|
||||||
return 0;
|
return 0;
|
||||||
|
|
||||||
class_device_destroy(icap_class, drvdata->devt);
|
device_destroy(icap_class, drvdata->devt);
|
||||||
cdev_del(&drvdata->cdev);
|
cdev_del(&drvdata->cdev);
|
||||||
iounmap(drvdata->base_address);
|
iounmap(drvdata->base_address);
|
||||||
release_mem_region(drvdata->mem_start, drvdata->mem_size);
|
release_mem_region(drvdata->mem_start, drvdata->mem_size);
|
||||||
kfree(drvdata);
|
kfree(drvdata);
|
||||||
dev_set_drvdata(dev, NULL);
|
dev_set_drvdata(dev, NULL);
|
||||||
probed_devices[MINOR(dev->devt)-xhwicap_minor] = 0;
|
|
||||||
|
|
||||||
|
mutex_lock(&icap_sem);
|
||||||
|
probed_devices[MINOR(dev->devt)-xhwicap_minor] = 0;
|
||||||
|
mutex_unlock(&icap_sem);
|
||||||
return 0; /* success */
|
return 0; /* success */
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -821,28 +806,29 @@ static struct of_platform_driver hwicap_of_driver = {
|
||||||
};
|
};
|
||||||
|
|
||||||
/* Registration helpers to keep the number of #ifdefs to a minimum */
|
/* Registration helpers to keep the number of #ifdefs to a minimum */
|
||||||
static inline int __devinit hwicap_of_register(void)
|
static inline int __init hwicap_of_register(void)
|
||||||
{
|
{
|
||||||
pr_debug("hwicap: calling of_register_platform_driver()\n");
|
pr_debug("hwicap: calling of_register_platform_driver()\n");
|
||||||
return of_register_platform_driver(&hwicap_of_driver);
|
return of_register_platform_driver(&hwicap_of_driver);
|
||||||
}
|
}
|
||||||
|
|
||||||
static inline void __devexit hwicap_of_unregister(void)
|
static inline void __exit hwicap_of_unregister(void)
|
||||||
{
|
{
|
||||||
of_unregister_platform_driver(&hwicap_of_driver);
|
of_unregister_platform_driver(&hwicap_of_driver);
|
||||||
}
|
}
|
||||||
#else /* CONFIG_OF */
|
#else /* CONFIG_OF */
|
||||||
/* CONFIG_OF not enabled; do nothing helpers */
|
/* CONFIG_OF not enabled; do nothing helpers */
|
||||||
static inline int __devinit hwicap_of_register(void) { return 0; }
|
static inline int __init hwicap_of_register(void) { return 0; }
|
||||||
static inline void __devexit hwicap_of_unregister(void) { }
|
static inline void __exit hwicap_of_unregister(void) { }
|
||||||
#endif /* CONFIG_OF */
|
#endif /* CONFIG_OF */
|
||||||
|
|
||||||
static int __devinit hwicap_module_init(void)
|
static int __init hwicap_module_init(void)
|
||||||
{
|
{
|
||||||
dev_t devt;
|
dev_t devt;
|
||||||
int retval;
|
int retval;
|
||||||
|
|
||||||
icap_class = class_create(THIS_MODULE, "xilinx_config");
|
icap_class = class_create(THIS_MODULE, "xilinx_config");
|
||||||
|
mutex_init(&icap_sem);
|
||||||
|
|
||||||
if (xhwicap_major) {
|
if (xhwicap_major) {
|
||||||
devt = MKDEV(xhwicap_major, xhwicap_minor);
|
devt = MKDEV(xhwicap_major, xhwicap_minor);
|
||||||
|
@ -883,7 +869,7 @@ static int __devinit hwicap_module_init(void)
|
||||||
return retval;
|
return retval;
|
||||||
}
|
}
|
||||||
|
|
||||||
static void __devexit hwicap_module_cleanup(void)
|
static void __exit hwicap_module_cleanup(void)
|
||||||
{
|
{
|
||||||
dev_t devt = MKDEV(xhwicap_major, xhwicap_minor);
|
dev_t devt = MKDEV(xhwicap_major, xhwicap_minor);
|
||||||
|
|
||||||
|
|
|
@ -48,9 +48,9 @@ struct hwicap_drvdata {
|
||||||
u8 write_buffer[4];
|
u8 write_buffer[4];
|
||||||
u32 read_buffer_in_use; /* Always in [0,3] */
|
u32 read_buffer_in_use; /* Always in [0,3] */
|
||||||
u8 read_buffer[4];
|
u8 read_buffer[4];
|
||||||
u32 mem_start; /* phys. address of the control registers */
|
resource_size_t mem_start;/* phys. address of the control registers */
|
||||||
u32 mem_end; /* phys. address of the control registers */
|
resource_size_t mem_end; /* phys. address of the control registers */
|
||||||
u32 mem_size;
|
resource_size_t mem_size;
|
||||||
void __iomem *base_address;/* virt. address of the control registers */
|
void __iomem *base_address;/* virt. address of the control registers */
|
||||||
|
|
||||||
struct device *dev;
|
struct device *dev;
|
||||||
|
@ -61,7 +61,7 @@ struct hwicap_drvdata {
|
||||||
const struct config_registers *config_regs;
|
const struct config_registers *config_regs;
|
||||||
void *private_data;
|
void *private_data;
|
||||||
bool is_open;
|
bool is_open;
|
||||||
struct semaphore sem;
|
struct mutex sem;
|
||||||
};
|
};
|
||||||
|
|
||||||
struct hwicap_driver_config {
|
struct hwicap_driver_config {
|
||||||
|
@ -164,29 +164,29 @@ struct config_registers {
|
||||||
#define XHI_DISABLED_AUTO_CRC 0x0000DEFCUL
|
#define XHI_DISABLED_AUTO_CRC 0x0000DEFCUL
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* hwicap_type_1_read: Generates a Type 1 read packet header.
|
* hwicap_type_1_read - Generates a Type 1 read packet header.
|
||||||
* @parameter: Register is the address of the register to be read back.
|
* @reg: is the address of the register to be read back.
|
||||||
*
|
*
|
||||||
* Generates a Type 1 read packet header, which is used to indirectly
|
* Generates a Type 1 read packet header, which is used to indirectly
|
||||||
* read registers in the configuration logic. This packet must then
|
* read registers in the configuration logic. This packet must then
|
||||||
* be sent through the icap device, and a return packet received with
|
* be sent through the icap device, and a return packet received with
|
||||||
* the information.
|
* the information.
|
||||||
**/
|
**/
|
||||||
static inline u32 hwicap_type_1_read(u32 Register)
|
static inline u32 hwicap_type_1_read(u32 reg)
|
||||||
{
|
{
|
||||||
return (XHI_TYPE_1 << XHI_TYPE_SHIFT) |
|
return (XHI_TYPE_1 << XHI_TYPE_SHIFT) |
|
||||||
(Register << XHI_REGISTER_SHIFT) |
|
(reg << XHI_REGISTER_SHIFT) |
|
||||||
(XHI_OP_READ << XHI_OP_SHIFT);
|
(XHI_OP_READ << XHI_OP_SHIFT);
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* hwicap_type_1_write: Generates a Type 1 write packet header
|
* hwicap_type_1_write - Generates a Type 1 write packet header
|
||||||
* @parameter: Register is the address of the register to be read back.
|
* @reg: is the address of the register to be read back.
|
||||||
**/
|
**/
|
||||||
static inline u32 hwicap_type_1_write(u32 Register)
|
static inline u32 hwicap_type_1_write(u32 reg)
|
||||||
{
|
{
|
||||||
return (XHI_TYPE_1 << XHI_TYPE_SHIFT) |
|
return (XHI_TYPE_1 << XHI_TYPE_SHIFT) |
|
||||||
(Register << XHI_REGISTER_SHIFT) |
|
(reg << XHI_REGISTER_SHIFT) |
|
||||||
(XHI_OP_WRITE << XHI_OP_SHIFT);
|
(XHI_OP_WRITE << XHI_OP_SHIFT);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -47,7 +47,7 @@ static LIST_HEAD(notify_list);
|
||||||
|
|
||||||
static struct cn_dev cdev;
|
static struct cn_dev cdev;
|
||||||
|
|
||||||
int cn_already_initialized = 0;
|
static int cn_already_initialized;
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* msg->seq and msg->ack are used to determine message genealogy.
|
* msg->seq and msg->ack are used to determine message genealogy.
|
||||||
|
|
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue