pci-v4.19-fixes-2
-----BEGIN PGP SIGNATURE----- iQJIBAABCgAyFiEEgMe7l+5h9hnxdsnuWYigwDrT+vwFAlutKuEUHGJoZWxnYWFz QGdvb2dsZS5jb20ACgkQWYigwDrT+vyNAA/9ETcZVnS/ONxX272qtgn2GT8Nyx+K YbAsNFHvd9hzLpG1X398OBPucWz/3bhySsJaTtiyqH0BWl2qsLRcRHvldR7wNXFt Wrh+8omGWkw7RwjQI3qavCYJeM3Eu0feX8X4/PknvJn2vybS1W6yPL0q7H7bJr+1 YQTzSDaA4XtLTcph6+yyt6FH23jxHX4Umjo24AsVrAwyjwWRMZ6Dq/6Lky310W/M 6GcYDrqQtmP5EnC1DaDomhtI3s8K+/l+NWIvDBHXlhVZhwHkZfZ1xJGQMslwJAVH HWe4uznsNweq1GClWgjS4SwT/lWApK+FspgDr29Z4mbNyUyyD/886+z4xXxo996n HgYDKctkLuZMdAcYBsjBlXGumBBHujO0qyc0rqoDDh1brI8cWLJsQNBaOLPLUcYU 934byeGKzIXWd2muXjRDNhCAndGCrKgLLGPleoRbL4uEgg+LTG8oKYQgVMCWts0+ 9FxFblXg0Cxy8+pAj+7JM/hv9FZ4waTbwqirq2PhiM7K4EQApd5wVRpoNF92l1Wi 287GW9jks1D1S2cjZcv6nTPs8NUc4bk+kcLNk2qbXqB9wUaQjsVdRsxMPUC8rGHJ ffhmPrNwOuAPvECMIOiYK5U5XWGvh870YjhEDMRPuapMdg9SQNeepJTceWzhFLgL y+OVSSln1PKsDH4= =oWFa -----END PGP SIGNATURE----- Merge tag 'pci-v4.19-fixes-2' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/helgaas/pci Bjorn writes: "PCI fixes: - Fix ACPI hotplug issue that causes black screen crash at boot (Mika Westerberg) - Fix DesignWare "scheduling while atomic" issues (Jisheng Zhang) - Add PPC contacts to MAINTAINERS for PCI core error handling (Bjorn Helgaas) - Sort Mobiveil MAINTAINERS entry (Lorenzo Pieralisi)" * tag 'pci-v4.19-fixes-2' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: ACPI / hotplug / PCI: Don't scan for non-hotplug bridges if slot is not bridge PCI: dwc: Fix scheduling while atomic issues MAINTAINERS: Move mobiveil PCI driver entry where it belongs MAINTAINERS: Update PPC contacts for PCI core error handling
This commit is contained in:
commit
278e59a007
20
MAINTAINERS
20
MAINTAINERS
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@ -9716,13 +9716,6 @@ Q: http://patchwork.linuxtv.org/project/linux-media/list/
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S: Maintained
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F: drivers/media/dvb-frontends/mn88473*
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PCI DRIVER FOR MOBIVEIL PCIE IP
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M: Subrahmanya Lingappa <l.subrahmanya@mobiveil.co.in>
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L: linux-pci@vger.kernel.org
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S: Supported
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F: Documentation/devicetree/bindings/pci/mobiveil-pcie.txt
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F: drivers/pci/controller/pcie-mobiveil.c
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MODULE SUPPORT
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M: Jessica Yu <jeyu@kernel.org>
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T: git git://git.kernel.org/pub/scm/linux/kernel/git/jeyu/linux.git modules-next
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@ -11137,6 +11130,13 @@ F: include/uapi/linux/switchtec_ioctl.h
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F: include/linux/switchtec.h
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F: drivers/ntb/hw/mscc/
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PCI DRIVER FOR MOBIVEIL PCIE IP
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M: Subrahmanya Lingappa <l.subrahmanya@mobiveil.co.in>
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L: linux-pci@vger.kernel.org
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S: Supported
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F: Documentation/devicetree/bindings/pci/mobiveil-pcie.txt
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F: drivers/pci/controller/pcie-mobiveil.c
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PCI DRIVER FOR MVEBU (Marvell Armada 370 and Armada XP SOC support)
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M: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
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M: Jason Cooper <jason@lakedaemon.net>
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@ -11203,8 +11203,14 @@ F: tools/pci/
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PCI ENHANCED ERROR HANDLING (EEH) FOR POWERPC
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M: Russell Currey <ruscur@russell.cc>
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M: Sam Bobroff <sbobroff@linux.ibm.com>
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M: Oliver O'Halloran <oohall@gmail.com>
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L: linuxppc-dev@lists.ozlabs.org
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S: Supported
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F: Documentation/PCI/pci-error-recovery.txt
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F: drivers/pci/pcie/aer.c
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F: drivers/pci/pcie/dpc.c
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F: drivers/pci/pcie/err.c
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F: Documentation/powerpc/eeh-pci-error-recovery.txt
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F: arch/powerpc/kernel/eeh*.c
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F: arch/powerpc/platforms/*/eeh*.c
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@ -135,7 +135,7 @@ static void dw_pcie_prog_outbound_atu_unroll(struct dw_pcie *pci, int index,
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if (val & PCIE_ATU_ENABLE)
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return;
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usleep_range(LINK_WAIT_IATU_MIN, LINK_WAIT_IATU_MAX);
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mdelay(LINK_WAIT_IATU);
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}
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dev_err(pci->dev, "Outbound iATU is not being enabled\n");
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}
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@ -178,7 +178,7 @@ void dw_pcie_prog_outbound_atu(struct dw_pcie *pci, int index, int type,
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if (val & PCIE_ATU_ENABLE)
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return;
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usleep_range(LINK_WAIT_IATU_MIN, LINK_WAIT_IATU_MAX);
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mdelay(LINK_WAIT_IATU);
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}
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dev_err(pci->dev, "Outbound iATU is not being enabled\n");
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}
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@ -236,7 +236,7 @@ static int dw_pcie_prog_inbound_atu_unroll(struct dw_pcie *pci, int index,
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if (val & PCIE_ATU_ENABLE)
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return 0;
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usleep_range(LINK_WAIT_IATU_MIN, LINK_WAIT_IATU_MAX);
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mdelay(LINK_WAIT_IATU);
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}
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dev_err(pci->dev, "Inbound iATU is not being enabled\n");
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@ -282,7 +282,7 @@ int dw_pcie_prog_inbound_atu(struct dw_pcie *pci, int index, int bar,
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if (val & PCIE_ATU_ENABLE)
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return 0;
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usleep_range(LINK_WAIT_IATU_MIN, LINK_WAIT_IATU_MAX);
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mdelay(LINK_WAIT_IATU);
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}
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dev_err(pci->dev, "Inbound iATU is not being enabled\n");
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@ -26,8 +26,7 @@
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/* Parameters for the waiting for iATU enabled routine */
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#define LINK_WAIT_MAX_IATU_RETRIES 5
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#define LINK_WAIT_IATU_MIN 9000
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#define LINK_WAIT_IATU_MAX 10000
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#define LINK_WAIT_IATU 9
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/* Synopsys-specific PCIe configuration registers */
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#define PCIE_PORT_LINK_CONTROL 0x710
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@ -457,17 +457,18 @@ static void acpiphp_native_scan_bridge(struct pci_dev *bridge)
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/**
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* enable_slot - enable, configure a slot
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* @slot: slot to be enabled
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* @bridge: true if enable is for the whole bridge (not a single slot)
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*
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* This function should be called per *physical slot*,
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* not per each slot object in ACPI namespace.
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*/
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static void enable_slot(struct acpiphp_slot *slot)
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static void enable_slot(struct acpiphp_slot *slot, bool bridge)
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{
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struct pci_dev *dev;
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struct pci_bus *bus = slot->bus;
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struct acpiphp_func *func;
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if (bus->self && hotplug_is_native(bus->self)) {
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if (bridge && bus->self && hotplug_is_native(bus->self)) {
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/*
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* If native hotplug is used, it will take care of hotplug
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* slot management and resource allocation for hotplug
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@ -701,7 +702,7 @@ static void acpiphp_check_bridge(struct acpiphp_bridge *bridge)
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trim_stale_devices(dev);
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/* configure all functions */
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enable_slot(slot);
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enable_slot(slot, true);
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} else {
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disable_slot(slot);
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}
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@ -785,7 +786,7 @@ static void hotplug_event(u32 type, struct acpiphp_context *context)
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if (bridge)
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acpiphp_check_bridge(bridge);
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else if (!(slot->flags & SLOT_IS_GOING_AWAY))
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enable_slot(slot);
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enable_slot(slot, false);
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break;
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@ -973,7 +974,7 @@ int acpiphp_enable_slot(struct acpiphp_slot *slot)
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/* configure all functions */
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if (!(slot->flags & SLOT_ENABLED))
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enable_slot(slot);
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enable_slot(slot, false);
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pci_unlock_rescan_remove();
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return 0;
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