[netdrvr] fealnx: clean up nasty mess of arch ifdefs

Clean up config/burst value arch-specific setup.

* bcrvalue only varied by its big-endian bit
* crvalue only varied for certain types of x86-32 chips

This should make fealnx quite a bit more portable, without any behavior
change.

Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
This commit is contained in:
Jeff Garzik 2008-06-27 02:18:50 -04:00 committed by Jeff Garzik
parent 445854f4c4
commit 28cd4289ab
1 changed files with 12 additions and 31 deletions

View File

@ -90,6 +90,7 @@ static int full_duplex[MAX_UNITS] = { -1, -1, -1, -1, -1, -1, -1, -1 };
#include <asm/processor.h> /* Processor type for cache alignment. */
#include <asm/io.h>
#include <asm/uaccess.h>
#include <asm/byteorder.h>
/* These identify the driver base version and may not be removed. */
static char version[] =
@ -861,40 +862,20 @@ static int netdev_open(struct net_device *dev)
Wait the specified 50 PCI cycles after a reset by initializing
Tx and Rx queues and the address filter list.
FIXME (Ueimor): optimistic for alpha + posted writes ? */
#if defined(__powerpc__) || defined(__sparc__)
// 89/9/1 modify,
// np->bcrvalue=0x04 | 0x0x38; /* big-endian, 256 burst length */
np->bcrvalue = 0x04 | 0x10; /* big-endian, tx 8 burst length */
np->crvalue = 0xe00; /* rx 128 burst length */
#elif defined(__alpha__) || defined(__x86_64__)
// 89/9/1 modify,
// np->bcrvalue=0x38; /* little-endian, 256 burst length */
np->bcrvalue = 0x10; /* little-endian, 8 burst length */
np->crvalue = 0xe00; /* rx 128 burst length */
#elif defined(__i386__)
#if defined(MODULE)
// 89/9/1 modify,
// np->bcrvalue=0x38; /* little-endian, 256 burst length */
np->bcrvalue = 0x10; /* little-endian, 8 burst length */
np->crvalue = 0xe00; /* rx 128 burst length */
#else
/* When not a module we can work around broken '486 PCI boards. */
#define x86 boot_cpu_data.x86
// 89/9/1 modify,
// np->bcrvalue=(x86 <= 4 ? 0x10 : 0x38);
np->bcrvalue = 0x10;
np->crvalue = (x86 <= 4 ? 0xa00 : 0xe00);
if (x86 <= 4)
printk(KERN_INFO "%s: This is a 386/486 PCI system, setting burst "
"length to %x.\n", dev->name, (x86 <= 4 ? 0x10 : 0x38));
#ifdef __BIG_ENDIAN
np->bcrvalue |= 0x04; /* big-endian */
#endif
#else
// 89/9/1 modify,
// np->bcrvalue=0x38;
np->bcrvalue = 0x10;
np->crvalue = 0xe00; /* rx 128 burst length */
#warning Processor architecture undefined!
#if defined(__i386__) && !defined(MODULE)
if (boot_cpu_data.x86 <= 4)
np->crvalue = 0xa00;
else
#endif
np->crvalue = 0xe00; /* rx 128 burst length */
// 89/12/29 add,
// 90/1/16 modify,
// np->imrvalue=FBE|TUNF|CNTOVF|RBU|TI|RI;