b43: LCN-PHY: load TX gain table on init
Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
Rafał Miłecki
John W. Linville
parent
108f4f3c4a
commit
28e3181a77
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@ -27,6 +27,18 @@
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#include "phy_common.h"
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#include "phy_lcn.h"
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struct b43_lcntab_tx_gain_tbl_entry {
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u8 gm;
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u8 pga;
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u8 pad;
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u8 dac;
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u8 bb_mult;
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};
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/**************************************************
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* Static tables.
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**************************************************/
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static const u16 b43_lcntab_0x02[] = {
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0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 0x014d,
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0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 0x014d,
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@ -297,6 +309,146 @@ static const u32 b43_lcntab_0x18[] = {
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0x00080000, 0x00080000, 0x00080000, 0x00080000,
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};
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/**************************************************
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* TX gain.
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**************************************************/
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const struct b43_lcntab_tx_gain_tbl_entry
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b43_lcntab_tx_gain_tbl_2ghz_ext_pa_rev0[B43_LCNTAB_TX_GAIN_SIZE] = {
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{ 0x03, 0x00, 0x1f, 0x0, 0x48 },
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{ 0x03, 0x00, 0x1f, 0x0, 0x46 },
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{ 0x03, 0x00, 0x1f, 0x0, 0x44 },
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{ 0x03, 0x00, 0x1e, 0x0, 0x43 },
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{ 0x03, 0x00, 0x1d, 0x0, 0x44 },
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{ 0x03, 0x00, 0x1c, 0x0, 0x44 },
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{ 0x03, 0x00, 0x1b, 0x0, 0x45 },
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{ 0x03, 0x00, 0x1a, 0x0, 0x46 },
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{ 0x03, 0x00, 0x19, 0x0, 0x46 },
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{ 0x03, 0x00, 0x18, 0x0, 0x47 },
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{ 0x03, 0x00, 0x17, 0x0, 0x48 },
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{ 0x03, 0x00, 0x17, 0x0, 0x46 },
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{ 0x03, 0x00, 0x16, 0x0, 0x47 },
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{ 0x03, 0x00, 0x15, 0x0, 0x48 },
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{ 0x03, 0x00, 0x15, 0x0, 0x46 },
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{ 0x03, 0x00, 0x15, 0x0, 0x44 },
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{ 0x03, 0x00, 0x15, 0x0, 0x42 },
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{ 0x03, 0x00, 0x15, 0x0, 0x40 },
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{ 0x03, 0x00, 0x15, 0x0, 0x3f },
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{ 0x03, 0x00, 0x14, 0x0, 0x40 },
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{ 0x03, 0x00, 0x13, 0x0, 0x41 },
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{ 0x03, 0x00, 0x13, 0x0, 0x40 },
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{ 0x03, 0x00, 0x12, 0x0, 0x41 },
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{ 0x03, 0x00, 0x12, 0x0, 0x40 },
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{ 0x03, 0x00, 0x11, 0x0, 0x41 },
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{ 0x03, 0x00, 0x11, 0x0, 0x40 },
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{ 0x03, 0x00, 0x10, 0x0, 0x41 },
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{ 0x03, 0x00, 0x10, 0x0, 0x40 },
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{ 0x03, 0x00, 0x10, 0x0, 0x3e },
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{ 0x03, 0x00, 0x10, 0x0, 0x3c },
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{ 0x03, 0x00, 0x10, 0x0, 0x3a },
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{ 0x03, 0x00, 0x0f, 0x0, 0x3d },
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{ 0x03, 0x00, 0x0f, 0x0, 0x3b },
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{ 0x03, 0x00, 0x0e, 0x0, 0x3d },
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{ 0x03, 0x00, 0x0e, 0x0, 0x3c },
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{ 0x03, 0x00, 0x0e, 0x0, 0x3a },
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{ 0x03, 0x00, 0x0d, 0x0, 0x3c },
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{ 0x03, 0x00, 0x0d, 0x0, 0x3b },
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{ 0x03, 0x00, 0x0c, 0x0, 0x3e },
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{ 0x03, 0x00, 0x0c, 0x0, 0x3c },
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{ 0x03, 0x00, 0x0c, 0x0, 0x3a },
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{ 0x03, 0x00, 0x0b, 0x0, 0x3e },
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{ 0x03, 0x00, 0x0b, 0x0, 0x3c },
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{ 0x03, 0x00, 0x0b, 0x0, 0x3b },
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{ 0x03, 0x00, 0x0b, 0x0, 0x39 },
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{ 0x03, 0x00, 0x0a, 0x0, 0x3d },
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{ 0x03, 0x00, 0x0a, 0x0, 0x3b },
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{ 0x03, 0x00, 0x0a, 0x0, 0x39 },
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{ 0x03, 0x00, 0x09, 0x0, 0x3e },
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{ 0x03, 0x00, 0x09, 0x0, 0x3c },
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{ 0x03, 0x00, 0x09, 0x0, 0x3a },
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{ 0x03, 0x00, 0x09, 0x0, 0x39 },
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{ 0x03, 0x00, 0x08, 0x0, 0x3e },
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{ 0x03, 0x00, 0x08, 0x0, 0x3c },
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{ 0x03, 0x00, 0x08, 0x0, 0x3a },
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{ 0x03, 0x00, 0x08, 0x0, 0x39 },
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{ 0x03, 0x00, 0x08, 0x0, 0x37 },
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{ 0x03, 0x00, 0x07, 0x0, 0x3d },
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{ 0x03, 0x00, 0x07, 0x0, 0x3c },
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{ 0x03, 0x00, 0x07, 0x0, 0x3a },
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{ 0x03, 0x00, 0x07, 0x0, 0x38 },
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{ 0x03, 0x00, 0x07, 0x0, 0x37 },
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{ 0x03, 0x00, 0x06, 0x0, 0x3e },
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{ 0x03, 0x00, 0x06, 0x0, 0x3c },
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{ 0x03, 0x00, 0x06, 0x0, 0x3a },
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{ 0x03, 0x00, 0x06, 0x0, 0x39 },
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{ 0x03, 0x00, 0x06, 0x0, 0x37 },
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{ 0x03, 0x00, 0x06, 0x0, 0x36 },
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{ 0x03, 0x00, 0x06, 0x0, 0x34 },
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{ 0x03, 0x00, 0x05, 0x0, 0x3d },
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{ 0x03, 0x00, 0x05, 0x0, 0x3b },
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{ 0x03, 0x00, 0x05, 0x0, 0x39 },
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{ 0x03, 0x00, 0x05, 0x0, 0x38 },
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{ 0x03, 0x00, 0x05, 0x0, 0x36 },
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{ 0x03, 0x00, 0x05, 0x0, 0x35 },
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{ 0x03, 0x00, 0x05, 0x0, 0x33 },
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{ 0x03, 0x00, 0x04, 0x0, 0x3e },
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{ 0x03, 0x00, 0x04, 0x0, 0x3c },
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{ 0x03, 0x00, 0x04, 0x0, 0x3a },
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{ 0x03, 0x00, 0x04, 0x0, 0x39 },
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{ 0x03, 0x00, 0x04, 0x0, 0x37 },
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{ 0x03, 0x00, 0x04, 0x0, 0x36 },
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{ 0x03, 0x00, 0x04, 0x0, 0x34 },
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{ 0x03, 0x00, 0x04, 0x0, 0x33 },
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{ 0x03, 0x00, 0x04, 0x0, 0x31 },
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{ 0x03, 0x00, 0x04, 0x0, 0x30 },
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{ 0x03, 0x00, 0x04, 0x0, 0x2e },
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{ 0x03, 0x00, 0x03, 0x0, 0x3c },
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{ 0x03, 0x00, 0x03, 0x0, 0x3a },
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{ 0x03, 0x00, 0x03, 0x0, 0x39 },
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{ 0x03, 0x00, 0x03, 0x0, 0x37 },
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{ 0x03, 0x00, 0x03, 0x0, 0x36 },
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{ 0x03, 0x00, 0x03, 0x0, 0x34 },
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{ 0x03, 0x00, 0x03, 0x0, 0x33 },
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{ 0x03, 0x00, 0x03, 0x0, 0x31 },
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{ 0x03, 0x00, 0x03, 0x0, 0x30 },
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{ 0x03, 0x00, 0x03, 0x0, 0x2e },
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{ 0x03, 0x00, 0x03, 0x0, 0x2d },
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{ 0x03, 0x00, 0x03, 0x0, 0x2c },
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{ 0x03, 0x00, 0x03, 0x0, 0x2b },
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{ 0x03, 0x00, 0x03, 0x0, 0x29 },
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{ 0x03, 0x00, 0x02, 0x0, 0x3d },
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{ 0x03, 0x00, 0x02, 0x0, 0x3b },
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{ 0x03, 0x00, 0x02, 0x0, 0x39 },
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{ 0x03, 0x00, 0x02, 0x0, 0x38 },
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{ 0x03, 0x00, 0x02, 0x0, 0x36 },
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{ 0x03, 0x00, 0x02, 0x0, 0x35 },
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{ 0x03, 0x00, 0x02, 0x0, 0x33 },
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{ 0x03, 0x00, 0x02, 0x0, 0x32 },
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{ 0x03, 0x00, 0x02, 0x0, 0x30 },
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{ 0x03, 0x00, 0x02, 0x0, 0x2f },
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{ 0x03, 0x00, 0x02, 0x0, 0x2e },
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{ 0x03, 0x00, 0x02, 0x0, 0x2c },
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{ 0x03, 0x00, 0x02, 0x0, 0x2b },
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{ 0x03, 0x00, 0x02, 0x0, 0x2a },
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{ 0x03, 0x00, 0x02, 0x0, 0x29 },
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{ 0x03, 0x00, 0x02, 0x0, 0x27 },
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{ 0x03, 0x00, 0x02, 0x0, 0x26 },
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{ 0x03, 0x00, 0x02, 0x0, 0x25 },
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{ 0x03, 0x00, 0x02, 0x0, 0x24 },
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{ 0x03, 0x00, 0x02, 0x0, 0x23 },
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{ 0x03, 0x00, 0x02, 0x0, 0x22 },
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{ 0x03, 0x00, 0x02, 0x0, 0x21 },
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{ 0x03, 0x00, 0x02, 0x0, 0x20 },
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{ 0x03, 0x00, 0x01, 0x0, 0x3f },
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{ 0x03, 0x00, 0x01, 0x0, 0x3d },
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{ 0x03, 0x00, 0x01, 0x0, 0x3b },
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{ 0x03, 0x00, 0x01, 0x0, 0x39 },
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};
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/**************************************************
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* SW control.
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**************************************************/
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const u16 b43_lcntab_sw_ctl_4313_epa_rev0[] = {
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0x0002, 0x0008, 0x0004, 0x0001, 0x0002, 0x0008,
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0x0004, 0x0001, 0x0002, 0x0008, 0x0004, 0x0001,
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@ -479,6 +631,32 @@ static void b43_phy_lcn_upload_static_tables(struct b43_wldev *dev)
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lcntab_upload(dev, B43_LCNTAB32(0x18, 0), b43_lcntab_0x18);
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}
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void b43_phy_lcn_load_tx_gain_tab(struct b43_wldev *dev,
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const struct b43_lcntab_tx_gain_tbl_entry *gain_table)
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{
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u32 i;
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u32 val;
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u16 pa_gain = 0x70;
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if (dev->dev->bus_sprom->boardflags_lo & B43_BFL_FEM)
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pa_gain = 0x10;
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for (i = 0; i < B43_LCNTAB_TX_GAIN_SIZE; i++) {
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val = ((pa_gain << 24) |
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(gain_table[i].pad << 16) |
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(gain_table[i].pga << 8) |
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gain_table[i].gm);
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b43_lcntab_write(dev, B43_LCNTAB32(0x7, 0xc0 + i), val);
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/* brcmsmac doesn't maskset, we follow newer wl here */
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val = b43_lcntab_read(dev, B43_LCNTAB32(0x7, 0x140 + i));
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val &= 0x000fffff;
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val |= ((gain_table[i].dac << 28) |
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(gain_table[i].bb_mult << 20));
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b43_lcntab_write(dev, B43_LCNTAB32(0x7, 0x140 + i), val);
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}
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}
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/* Not implemented in brcmsmac, noticed in wl in MMIO dump */
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static void b43_phy_lcn_rewrite_tables(struct b43_wldev *dev)
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{
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@ -499,13 +677,24 @@ static void b43_phy_lcn_clean_papd_comp_table(struct b43_wldev *dev)
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b43_lcntab_write(dev, B43_LCNTAB32(0x18, i), 0x80000);
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}
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/* wlc_lcnphy_tbl_init */
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void b43_phy_lcn_tables_init(struct b43_wldev *dev)
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{
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b43_phy_lcn_upload_static_tables(dev);
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/* TODO: various tables ops here */
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struct ssb_sprom *sprom = dev->dev->bus_sprom;
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if (dev->dev->bus_sprom->boardflags_lo & B43_BFL_FEM &&
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!(dev->dev->bus_sprom->boardflags_hi & B43_BFH_FEM_BT))
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b43_phy_lcn_upload_static_tables(dev);
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if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) {
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if (sprom->boardflags_lo & B43_BFL_EXTLNA)
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b43_phy_lcn_load_tx_gain_tab(dev,
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b43_lcntab_tx_gain_tbl_2ghz_ext_pa_rev0);
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else
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b43err(dev->wl,
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"TX gain table unknown for this card\n");
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}
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if (sprom->boardflags_lo & B43_BFL_FEM &&
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!(sprom->boardflags_hi & B43_BFH_FEM_BT))
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b43_lcntab_write_bulk(dev, B43_LCNTAB16(0xf, 0),
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ARRAY_SIZE(b43_lcntab_sw_ctl_4313_epa_rev0),
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b43_lcntab_sw_ctl_4313_epa_rev0);
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@ -10,6 +10,8 @@
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#define B43_LCNTAB16(table, offset) (((table) << 10) | (offset) | B43_LCNTAB_16BIT)
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#define B43_LCNTAB32(table, offset) (((table) << 10) | (offset) | B43_LCNTAB_32BIT)
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#define B43_LCNTAB_TX_GAIN_SIZE 128
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u32 b43_lcntab_read(struct b43_wldev *dev, u32 offset);
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void b43_lcntab_read_bulk(struct b43_wldev *dev, u32 offset,
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unsigned int nr_elements, void *_data);
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