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Merge branch 'omap-fixes' of master.kernel.org:/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6 into m 

* 'omap-fixes' of master.kernel.org:/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6:
  ARM: OMAP1: Fix typo in OMAP1 MPU clock source initialization
  ARM: OMAP: Fix DMA CLINK mask, clear spurious interrupt
  ARM: OMAP: Fix chain_a_transfer return value
  ARM: OMAP: Fix missing makefile options
  ARM: OMAP: Fix GPIO IRQ unmask
  ARM: OMAP: Fix clockevent support for hrtimers
This commit is contained in:
Russell King 2008-03-20 15:59:51 +00:00 committed by Russell King
parent a0d1d04ea8 c6b349ed8a
commit 2a1bf8b7da
6 changed files with 22 additions and 9 deletions
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1
arch/arm/Kconfig
View File

@ -469,6 +469,7 @@ config ARCH_OMAP
bool "TI OMAP"
select GENERIC_GPIO
select GENERIC_TIME
select GENERIC_CLOCKEVENTS
help
Support for TI's OMAP platform (OMAP1 and OMAP2).

12
arch/arm/mach-omap1/time.c
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@ -132,13 +132,20 @@ static inline void omap_mpu_timer_start(int nr, unsigned long load_val,
timer->cntl = timerflags;
}
static inline void omap_mpu_timer_stop(int nr)
{
volatile omap_mpu_timer_regs_t* timer = omap_mpu_timer_base(nr);
timer->cntl &= ~MPU_TIMER_ST;
}
/*
* ---------------------------------------------------------------------------
* MPU timer 1 ... count down to zero, interrupt, reload
* ---------------------------------------------------------------------------
*/
static int omap_mpu_set_next_event(unsigned long cycles,
struct clock_event_device *evt)
struct clock_event_device *evt)
{
omap_mpu_timer_start(0, cycles, 0);
return 0;
@ -152,6 +159,7 @@ static void omap_mpu_set_mode(enum clock_event_mode mode,
omap_mpu_set_autoreset(0);
break;
case CLOCK_EVT_MODE_ONESHOT:
omap_mpu_timer_stop(0);
omap_mpu_remove_autoreset(0);
break;
case CLOCK_EVT_MODE_UNUSED:
@ -163,7 +171,7 @@ static void omap_mpu_set_mode(enum clock_event_mode mode,
static struct clock_event_device clockevent_mpu_timer1 = {
.name = "mpu_timer1",
.features = CLOCK_EVT_FEAT_PERIODIC, CLOCK_EVT_FEAT_ONESHOT,
.features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
.shift = 32,
.set_next_event = omap_mpu_set_next_event,
.set_mode = omap_mpu_set_mode,

1
arch/arm/plat-omap/Kconfig
View File

@ -11,7 +11,6 @@ choice
config ARCH_OMAP1
bool "TI OMAP1"
select GENERIC_CLOCKEVENTS
config ARCH_OMAP2
bool "TI OMAP2"

5
arch/arm/plat-omap/Makefile
View File

@ -14,9 +14,14 @@ obj-$(CONFIG_OMAP_32K_TIMER) += timer32k.o
# OCPI interconnect support for 1710, 1610 and 5912
obj-$(CONFIG_ARCH_OMAP16XX) += ocpi.o
obj-$(CONFIG_OMAP_MCBSP) += mcbsp.o
obj-$(CONFIG_CPU_FREQ) += cpu-omap.o
obj-$(CONFIG_OMAP_DM_TIMER) += dmtimer.o
obj-$(CONFIG_OMAP_DEBUG_DEVICES) += debug-devices.o
obj-$(CONFIG_OMAP_DEBUG_LEDS) += debug-leds.o
obj-$(CONFIG_I2C_OMAP) += i2c.o
# OMAP mailbox framework
obj-$(CONFIG_OMAP_MBOX_FWK) += mailbox.o

9
arch/arm/plat-omap/dma.c
View File

@ -1020,12 +1020,12 @@ static void create_dma_lch_chain(int lch_head, int lch_queue)
}
w = OMAP_DMA_CLNK_CTRL_REG(lch_head);
w &= ~(0x0f);
w &= ~(0x1f);
w |= lch_queue;
OMAP_DMA_CLNK_CTRL_REG(lch_head) = w;
w = OMAP_DMA_CLNK_CTRL_REG(lch_queue);
w &= ~(0x0f);
w &= ~(0x1f);
w |= (dma_chan[lch_queue].next_linked_ch);
OMAP_DMA_CLNK_CTRL_REG(lch_queue) = w;
}
@ -1248,7 +1248,7 @@ EXPORT_SYMBOL(omap_dma_chain_status);
* @param frame_count
* @param callbk_data - channel callback parameter data.
*
* @return - Success : start_dma status
* @return - Success : 0
* Failure: -EINVAL/-EBUSY
*/
int omap_dma_chain_a_transfer(int chain_id, int src_start, int dest_start,
@ -1367,7 +1367,7 @@ int omap_dma_chain_a_transfer(int chain_id, int src_start, int dest_start,
dma_chan[lch].flags |= OMAP_DMA_ACTIVE;
}
}
return start_dma;
return 0;
}
EXPORT_SYMBOL(omap_dma_chain_a_transfer);
@ -1663,6 +1663,7 @@ static int omap2_dma_handle_ch(int ch)
if (!status) {
if (printk_ratelimit())
printk(KERN_WARNING "Spurious DMA IRQ for lch %d\n", ch);
omap_writel(1 << ch, OMAP_DMA4_IRQSTATUS_L0);
return 0;
}
if (unlikely(dma_chan[ch].dev_id == -1)) {

3
arch/arm/plat-omap/gpio.c
View File

@ -1134,10 +1134,9 @@ static void gpio_mask_irq(unsigned int irq)
static void gpio_unmask_irq(unsigned int irq)
{
unsigned int gpio = irq - IH_GPIO_BASE;
unsigned int gpio_idx = get_gpio_index(gpio);
struct gpio_bank *bank = get_irq_chip_data(irq);
_set_gpio_irqenable(bank, gpio_idx, 1);
_set_gpio_irqenable(bank, gpio, 1);
}
static struct irq_chip gpio_irq_chip = {