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agp: Switch mask_memory() method to take address argument again, not page 

In commit 07613ba2 ("agp: switch AGP to use page array instead of
unsigned long array") we switched the mask_memory() method to take a
'struct page *' instead of an address. This is painful, because in some
cases it has to be an IOMMU-mapped virtual bus address (in fact,
shouldn't it _always_ be a dma_addr_t returned from pci_map_xxx(), and
we just happen to get lucky most of the time?)

Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
This commit is contained in:
David Woodhouse 2009-07-27 10:27:29 +01:00
parent ed680c4ad4
commit 2a4ceb6d3e
13 changed files with 36 additions and 46 deletions
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4
drivers/char/agp/agp.h
View File

@ -107,7 +107,7 @@ struct agp_bridge_driver {
void (*agp_enable)(struct agp_bridge_data *, u32); void (*agp_enable)(struct agp_bridge_data *, u32);
void (*cleanup)(void); void (*cleanup)(void);
void (*tlb_flush)(struct agp_memory *); void (*tlb_flush)(struct agp_memory *);
unsigned long (*mask_memory)(struct agp_bridge_data *, struct page *, int); unsigned long (*mask_memory)(struct agp_bridge_data *, dma_addr_t, int);
void (*cache_flush)(void); void (*cache_flush)(void);
int (*create_gatt_table)(struct agp_bridge_data *); int (*create_gatt_table)(struct agp_bridge_data *);
int (*free_gatt_table)(struct agp_bridge_data *); int (*free_gatt_table)(struct agp_bridge_data *);
@ -291,7 +291,7 @@ int agp_3_5_enable(struct agp_bridge_data *bridge);
void global_cache_flush(void); void global_cache_flush(void);
void get_agp_version(struct agp_bridge_data *bridge); void get_agp_version(struct agp_bridge_data *bridge);
unsigned long agp_generic_mask_memory(struct agp_bridge_data *bridge, unsigned long agp_generic_mask_memory(struct agp_bridge_data *bridge,
struct page *page, int type); dma_addr_t phys, int type);
int agp_generic_type_to_mask_type(struct agp_bridge_data *bridge, int agp_generic_type_to_mask_type(struct agp_bridge_data *bridge,
int type); int type);
struct agp_bridge_data *agp_generic_find_bridge(struct pci_dev *pdev); struct agp_bridge_data *agp_generic_find_bridge(struct pci_dev *pdev);

4
drivers/char/agp/amd-k7-agp.c
View File

@ -325,7 +325,9 @@ static int amd_insert_memory(struct agp_memory *mem, off_t pg_start, int type)
addr = (j * PAGE_SIZE) + agp_bridge->gart_bus_addr; addr = (j * PAGE_SIZE) + agp_bridge->gart_bus_addr;
cur_gatt = GET_GATT(addr); cur_gatt = GET_GATT(addr);
writel(agp_generic_mask_memory(agp_bridge, writel(agp_generic_mask_memory(agp_bridge,
mem->pages[i], mem->type), cur_gatt+GET_GATT_OFF(addr)); phys_to_gart(page_to_phys(mem->pages[i])),
mem->type),
cur_gatt+GET_GATT_OFF(addr));
readl(cur_gatt+GET_GATT_OFF(addr)); /* PCI Posting. */ readl(cur_gatt+GET_GATT_OFF(addr)); /* PCI Posting. */
} }
amd_irongate_tlbflush(mem); amd_irongate_tlbflush(mem);

3
drivers/char/agp/amd64-agp.c
View File

@ -79,7 +79,8 @@ static int amd64_insert_memory(struct agp_memory *mem, off_t pg_start, int type)
for (i = 0, j = pg_start; i < mem->page_count; i++, j++) { for (i = 0, j = pg_start; i < mem->page_count; i++, j++) {
tmp = agp_bridge->driver->mask_memory(agp_bridge, tmp = agp_bridge->driver->mask_memory(agp_bridge,
mem->pages[i], mask_type); phys_to_gart(page_to_phys(mem->pages[i])),
mask_type);
BUG_ON(tmp & 0xffffff0000000ffcULL); BUG_ON(tmp & 0xffffff0000000ffcULL);
pte = (tmp & 0x000000ff00000000ULL) >> 28; pte = (tmp & 0x000000ff00000000ULL) >> 28;

3
drivers/char/agp/ati-agp.c
View File

@ -302,7 +302,8 @@ static int ati_insert_memory(struct agp_memory * mem,
addr = (j * PAGE_SIZE) + agp_bridge->gart_bus_addr; addr = (j * PAGE_SIZE) + agp_bridge->gart_bus_addr;
cur_gatt = GET_GATT(addr); cur_gatt = GET_GATT(addr);
writel(agp_bridge->driver->mask_memory(agp_bridge, writel(agp_bridge->driver->mask_memory(agp_bridge,
mem->pages[i], mem->type), phys_to_gart(page_to_phys(mem->pages[i])),
mem->type),
cur_gatt+GET_GATT_OFF(addr)); cur_gatt+GET_GATT_OFF(addr));
} }
readl(GET_GATT(agp_bridge->gart_bus_addr)); /* PCI posting */ readl(GET_GATT(agp_bridge->gart_bus_addr)); /* PCI posting */

4
drivers/char/agp/backend.c
View File

@ -150,8 +150,8 @@ static int agp_backend_initialize(struct agp_bridge_data *bridge)
} }
bridge->scratch_page_real = phys_to_gart(page_to_phys(page)); bridge->scratch_page_real = phys_to_gart(page_to_phys(page));
bridge->scratch_page = bridge->scratch_page = bridge->driver->mask_memory(bridge,
bridge->driver->mask_memory(bridge, page, 0); phys_to_gart(page_to_phys(page)), 0);
} }
size_value = bridge->driver->fetch_size(); size_value = bridge->driver->fetch_size();

7
drivers/char/agp/generic.c
View File

@ -1132,7 +1132,9 @@ int agp_generic_insert_memory(struct agp_memory * mem, off_t pg_start, int type)
} }
for (i = 0, j = pg_start; i < mem->page_count; i++, j++) { for (i = 0, j = pg_start; i < mem->page_count; i++, j++) {
writel(bridge->driver->mask_memory(bridge, mem->pages[i], mask_type), writel(bridge->driver->mask_memory(bridge,
phys_to_gart(page_to_phys(mem->pages[i])),
mask_type),
bridge->gatt_table+j); bridge->gatt_table+j);
} }
readl(bridge->gatt_table+j-1); /* PCI Posting. */ readl(bridge->gatt_table+j-1); /* PCI Posting. */
@ -1347,9 +1349,8 @@ void global_cache_flush(void)
EXPORT_SYMBOL(global_cache_flush); EXPORT_SYMBOL(global_cache_flush);
unsigned long agp_generic_mask_memory(struct agp_bridge_data *bridge, unsigned long agp_generic_mask_memory(struct agp_bridge_data *bridge,
struct page *page, int type) dma_addr_t addr, int type)
{ {
unsigned long addr = phys_to_gart(page_to_phys(page));
/* memory type is ignored in the generic routine */ /* memory type is ignored in the generic routine */
if (bridge->driver->masks) if (bridge->driver->masks)
return addr | bridge->driver->masks[0].mask; return addr | bridge->driver->masks[0].mask;

4
drivers/char/agp/hp-agp.c
View File

@ -394,10 +394,8 @@ hp_zx1_remove_memory (struct agp_memory *mem, off_t pg_start, int type)
} }
static unsigned long static unsigned long
hp_zx1_mask_memory (struct agp_bridge_data *bridge, hp_zx1_mask_memory (struct agp_bridge_data *bridge, dma_addr_t addr, int type)
struct page *page, int type)
{ {
unsigned long addr = phys_to_gart(page_to_phys(page));
return HP_ZX1_PDIR_VALID_BIT | addr; return HP_ZX1_PDIR_VALID_BIT | addr;
} }

13
drivers/char/agp/i460-agp.c
View File

@ -61,7 +61,7 @@
#define WR_FLUSH_GATT(index) RD_GATT(index) #define WR_FLUSH_GATT(index) RD_GATT(index)
static unsigned long i460_mask_memory (struct agp_bridge_data *bridge, static unsigned long i460_mask_memory (struct agp_bridge_data *bridge,
unsigned long addr, int type); dma_addr_t addr, int type);
static struct { static struct {
void *gatt; /* ioremap'd GATT area */ void *gatt; /* ioremap'd GATT area */
@ -546,20 +546,13 @@ static void i460_destroy_page (struct page *page, int flags)
#endif /* I460_LARGE_IO_PAGES */ #endif /* I460_LARGE_IO_PAGES */
static unsigned long i460_mask_memory (struct agp_bridge_data *bridge, static unsigned long i460_mask_memory (struct agp_bridge_data *bridge,
unsigned long addr, int type) dma_addr_t addr, int type)
{ {
/* Make sure the returned address is a valid GATT entry */ /* Make sure the returned address is a valid GATT entry */
return bridge->driver->masks[0].mask return bridge->driver->masks[0].mask
| (((addr & ~((1 << I460_IO_PAGE_SHIFT) - 1)) & 0xfffff000) >> 12); | (((addr & ~((1 << I460_IO_PAGE_SHIFT) - 1)) & 0xfffff000) >> 12);
} }
static unsigned long i460_page_mask_memory(struct agp_bridge_data *bridge,
struct page *page, int type)
{
unsigned long addr = phys_to_gart(page_to_phys(page));
return i460_mask_memory(bridge, addr, type);
}
const struct agp_bridge_driver intel_i460_driver = { const struct agp_bridge_driver intel_i460_driver = {
.owner = THIS_MODULE, .owner = THIS_MODULE,
.aperture_sizes = i460_sizes, .aperture_sizes = i460_sizes,
@ -569,7 +562,7 @@ const struct agp_bridge_driver intel_i460_driver = {
.fetch_size = i460_fetch_size, .fetch_size = i460_fetch_size,
.cleanup = i460_cleanup, .cleanup = i460_cleanup,
.tlb_flush = i460_tlb_flush, .tlb_flush = i460_tlb_flush,
.mask_memory = i460_page_mask_memory, .mask_memory = i460_mask_memory,
.masks = i460_masks, .masks = i460_masks,
.agp_enable = agp_generic_enable, .agp_enable = agp_generic_enable,
.cache_flush = global_cache_flush, .cache_flush = global_cache_flush,

14
drivers/char/agp/intel-agp.c
View File

@ -343,7 +343,7 @@ static int intel_i810_insert_entries(struct agp_memory *mem, off_t pg_start,
global_cache_flush(); global_cache_flush();
for (i = 0, j = pg_start; i < mem->page_count; i++, j++) { for (i = 0, j = pg_start; i < mem->page_count; i++, j++) {
writel(agp_bridge->driver->mask_memory(agp_bridge, writel(agp_bridge->driver->mask_memory(agp_bridge,
mem->pages[i], phys_to_gart(page_to_phys(mem->pages[i])),
mask_type), mask_type),
intel_private.registers+I810_PTE_BASE+(j*4)); intel_private.registers+I810_PTE_BASE+(j*4));
} }
@ -461,9 +461,8 @@ static void intel_i810_free_by_type(struct agp_memory *curr)
} }
static unsigned long intel_i810_mask_memory(struct agp_bridge_data *bridge, static unsigned long intel_i810_mask_memory(struct agp_bridge_data *bridge,
struct page *page, int type) dma_addr_t addr, int type)
{ {
unsigned long addr = phys_to_gart(page_to_phys(page));
/* Type checking must be done elsewhere */ /* Type checking must be done elsewhere */
return addr | bridge->driver->masks[type].mask; return addr | bridge->driver->masks[type].mask;
} }
@ -851,7 +850,7 @@ static int intel_i830_insert_entries(struct agp_memory *mem, off_t pg_start,
for (i = 0, j = pg_start; i < mem->page_count; i++, j++) { for (i = 0, j = pg_start; i < mem->page_count; i++, j++) {
writel(agp_bridge->driver->mask_memory(agp_bridge, writel(agp_bridge->driver->mask_memory(agp_bridge,
mem->pages[i], mask_type), phys_to_gart(page_to_phys(mem->pages[i])), mask_type),
intel_private.registers+I810_PTE_BASE+(j*4)); intel_private.registers+I810_PTE_BASE+(j*4));
} }
readl(intel_private.registers+I810_PTE_BASE+((j-1)*4)); readl(intel_private.registers+I810_PTE_BASE+((j-1)*4));
@ -1081,7 +1080,9 @@ static int intel_i915_insert_entries(struct agp_memory *mem, off_t pg_start,
for (i = 0, j = pg_start; i < mem->page_count; i++, j++) { for (i = 0, j = pg_start; i < mem->page_count; i++, j++) {
writel(agp_bridge->driver->mask_memory(agp_bridge, writel(agp_bridge->driver->mask_memory(agp_bridge,
mem->pages[i], mask_type), intel_private.gtt+j); phys_to_gart(page_to_phys(mem->pages[i])),
mask_type),
intel_private.gtt+j);
} }
readl(intel_private.gtt+j-1); readl(intel_private.gtt+j-1);
@ -1196,9 +1197,8 @@ static int intel_i915_create_gatt_table(struct agp_bridge_data *bridge)
* this conditional. * this conditional.
*/ */
static unsigned long intel_i965_mask_memory(struct agp_bridge_data *bridge, static unsigned long intel_i965_mask_memory(struct agp_bridge_data *bridge,
struct page *page, int type) dma_addr_t addr, int type)
{ {
dma_addr_t addr = phys_to_gart(page_to_phys(page));
/* Shift high bits down */ /* Shift high bits down */
addr |= (addr >> 28) & 0xf0; addr |= (addr >> 28) & 0xf0;

2
drivers/char/agp/nvidia-agp.c
View File

@ -225,7 +225,7 @@ static int nvidia_insert_memory(struct agp_memory *mem, off_t pg_start, int type
} }
for (i = 0, j = pg_start; i < mem->page_count; i++, j++) { for (i = 0, j = pg_start; i < mem->page_count; i++, j++) {
writel(agp_bridge->driver->mask_memory(agp_bridge, writel(agp_bridge->driver->mask_memory(agp_bridge,
mem->pages[i], mask_type), phys_to_gart(page_to_phys(mem->pages[i])), mask_type),
agp_bridge->gatt_table+nvidia_private.pg_offset+j); agp_bridge->gatt_table+nvidia_private.pg_offset+j);
} }

12
drivers/char/agp/parisc-agp.c
View File

@ -32,7 +32,7 @@
#define AGP8X_MODE (1 << AGP8X_MODE_BIT) #define AGP8X_MODE (1 << AGP8X_MODE_BIT)
static unsigned long static unsigned long
parisc_agp_mask_memory(struct agp_bridge_data *bridge, unsigned long addr, parisc_agp_mask_memory(struct agp_bridge_data *bridge, dma_addr_t addr,
int type); int type);
static struct _parisc_agp_info { static struct _parisc_agp_info {
@ -189,20 +189,12 @@ parisc_agp_remove_memory(struct agp_memory *mem, off_t pg_start, int type)
} }
static unsigned long static unsigned long
parisc_agp_mask_memory(struct agp_bridge_data *bridge, unsigned long addr, parisc_agp_mask_memory(struct agp_bridge_data *bridge, dma_addr_t addr,
int type) int type)
{ {
return SBA_PDIR_VALID_BIT | addr; return SBA_PDIR_VALID_BIT | addr;
} }
static unsigned long
parisc_agp_page_mask_memory(struct agp_bridge_data *bridge, struct page *page,
int type)
{
unsigned long addr = phys_to_gart(page_to_phys(page));
return SBA_PDIR_VALID_BIT | addr;
}
static void static void
parisc_agp_enable(struct agp_bridge_data *bridge, u32 mode) parisc_agp_enable(struct agp_bridge_data *bridge, u32 mode)
{ {

8
drivers/char/agp/sgi-agp.c
View File

@ -70,10 +70,9 @@ static void sgi_tioca_tlbflush(struct agp_memory *mem)
* entry. * entry.
*/ */
static unsigned long static unsigned long
sgi_tioca_mask_memory(struct agp_bridge_data *bridge, sgi_tioca_mask_memory(struct agp_bridge_data *bridge, dma_addr_t addr,
struct page *page, int type) int type)
{ {
unsigned long addr = phys_to_gart(page_to_phys(page));
return tioca_physpage_to_gart(addr); return tioca_physpage_to_gart(addr);
} }
@ -190,7 +189,8 @@ static int sgi_tioca_insert_memory(struct agp_memory *mem, off_t pg_start,
for (i = 0, j = pg_start; i < mem->page_count; i++, j++) { for (i = 0, j = pg_start; i < mem->page_count; i++, j++) {
table[j] = table[j] =
bridge->driver->mask_memory(bridge, mem->pages[i], bridge->driver->mask_memory(bridge,
phys_to_gart(page_to_phys(mem->pages[i])),
mem->type); mem->type);
} }

4
drivers/char/agp/sworks-agp.c
View File

@ -349,7 +349,9 @@ static int serverworks_insert_memory(struct agp_memory *mem,
for (i = 0, j = pg_start; i < mem->page_count; i++, j++) { for (i = 0, j = pg_start; i < mem->page_count; i++, j++) {
addr = (j * PAGE_SIZE) + agp_bridge->gart_bus_addr; addr = (j * PAGE_SIZE) + agp_bridge->gart_bus_addr;
cur_gatt = SVRWRKS_GET_GATT(addr); cur_gatt = SVRWRKS_GET_GATT(addr);
writel(agp_bridge->driver->mask_memory(agp_bridge, mem->pages[i], mem->type), cur_gatt+GET_GATT_OFF(addr)); writel(agp_bridge->driver->mask_memory(agp_bridge,
phys_to_gart(page_to_phys(mem->pages[i])), mem->type),
cur_gatt+GET_GATT_OFF(addr));
} }
serverworks_tlbflush(mem); serverworks_tlbflush(mem);
return 0; return 0;