Merge branches 'arm/exynos', 'arm/omap', 'arm/rockchip', 'arm/mediatek', 'arm/smmu', 'arm/core', 'x86/vt-d', 'x86/amd' and 'core' into next
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.mailmap
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.mailmap
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@ -99,6 +99,8 @@ Linas Vepstas <linas@austin.ibm.com>
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Linus Lüssing <linus.luessing@c0d3.blue> <linus.luessing@web.de>
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Linus Lüssing <linus.luessing@c0d3.blue> <linus.luessing@ascom.ch>
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Mark Brown <broonie@sirena.org.uk>
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Martin Kepplinger <martink@posteo.de> <martin.kepplinger@theobroma-systems.com>
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Martin Kepplinger <martink@posteo.de> <martin.kepplinger@ginzinger.com>
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Matthieu CASTET <castet.matthieu@free.fr>
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Mauro Carvalho Chehab <mchehab@kernel.org> <mchehab@brturbo.com.br>
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Mauro Carvalho Chehab <mchehab@kernel.org> <maurochehab@gmail.com>
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@ -171,6 +173,7 @@ Vlad Dogaru <ddvlad@gmail.com> <vlad.dogaru@intel.com>
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Vladimir Davydov <vdavydov.dev@gmail.com> <vdavydov@virtuozzo.com>
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Vladimir Davydov <vdavydov.dev@gmail.com> <vdavydov@parallels.com>
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Takashi YOSHII <takashi.yoshii.zj@renesas.com>
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Yakir Yang <kuankuan.y@gmail.com> <ykk@rock-chips.com>
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Yusuke Goda <goda.yusuke@renesas.com>
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Gustavo Padovan <gustavo@las.ic.unicamp.br>
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Gustavo Padovan <padovan@profusion.mobi>
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@ -1578,6 +1578,15 @@
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extended tables themselves, and also PASID support. With
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this option set, extended tables will not be used even
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on hardware which claims to support them.
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tboot_noforce [Default Off]
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Do not force the Intel IOMMU enabled under tboot.
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By default, tboot will force Intel IOMMU on, which
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could harm performance of some high-throughput
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devices like 40GBit network cards, even if identity
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mapping is enabled.
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Note that using this option lowers the security
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provided by tboot because it makes the system
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vulnerable to DMA attacks.
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intel_idle.max_cstate= [KNL,HW,ACPI,X86]
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0 disables intel_idle and fall back on acpi_idle.
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@ -1644,6 +1653,12 @@
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nobypass [PPC/POWERNV]
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Disable IOMMU bypass, using IOMMU for PCI devices.
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iommu.passthrough=
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[ARM64] Configure DMA to bypass the IOMMU by default.
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Format: { "0" | "1" }
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0 - Use IOMMU translation for DMA.
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1 - Bypass the IOMMU for DMA.
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unset - Use IOMMU translation for DMA.
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io7= [HW] IO7 for Marvel based alpha systems
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See comment before marvel_specify_io7 in
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@ -1725,6 +1740,12 @@
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kernel and module base offset ASLR (Address Space
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Layout Randomization).
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kasan_multi_shot
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[KNL] Enforce KASAN (Kernel Address Sanitizer) to print
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report on every invalid memory access. Without this
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parameter KASAN will print report only for the first
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invalid access.
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keepinitrd [HW,ARM]
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kernelcore= [KNL,X86,IA-64,PPC]
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@ -45,7 +45,7 @@ The following clocks are available:
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- 1 15 SATA
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- 1 16 SATA USB
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- 1 17 Main
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- 1 18 SD/MMC
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- 1 18 SD/MMC/GOP
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- 1 21 Slow IO (SPI, NOR, BootROM, I2C, UART)
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- 1 22 USB3H0
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- 1 23 USB3H1
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@ -65,7 +65,7 @@ Required properties:
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"cpm-audio", "cpm-communit", "cpm-nand", "cpm-ppv2", "cpm-sdio",
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"cpm-mg-domain", "cpm-mg-core", "cpm-xor1", "cpm-xor0", "cpm-gop-dp", "none",
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"cpm-pcie_x10", "cpm-pcie_x11", "cpm-pcie_x4", "cpm-pcie-xor", "cpm-sata",
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"cpm-sata-usb", "cpm-main", "cpm-sd-mmc", "none", "none", "cpm-slow-io",
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"cpm-sata-usb", "cpm-main", "cpm-sd-mmc-gop", "none", "none", "cpm-slow-io",
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"cpm-usb3h0", "cpm-usb3h1", "cpm-usb3dev", "cpm-eip150", "cpm-eip197";
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Example:
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@ -78,6 +78,6 @@ Example:
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gate-clock-output-names = "cpm-audio", "cpm-communit", "cpm-nand", "cpm-ppv2", "cpm-sdio",
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"cpm-mg-domain", "cpm-mg-core", "cpm-xor1", "cpm-xor0", "cpm-gop-dp", "none",
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"cpm-pcie_x10", "cpm-pcie_x11", "cpm-pcie_x4", "cpm-pcie-xor", "cpm-sata",
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"cpm-sata-usb", "cpm-main", "cpm-sd-mmc", "none", "none", "cpm-slow-io",
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"cpm-sata-usb", "cpm-main", "cpm-sd-mmc-gop", "none", "none", "cpm-slow-io",
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"cpm-usb3h0", "cpm-usb3h1", "cpm-usb3dev", "cpm-eip150", "cpm-eip197";
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};
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@ -4,7 +4,6 @@ Required properties:
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- compatible: value should be one of the following
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"samsung,exynos3250-mipi-dsi" /* for Exynos3250/3472 SoCs */
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"samsung,exynos4210-mipi-dsi" /* for Exynos4 SoCs */
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"samsung,exynos4415-mipi-dsi" /* for Exynos4415 SoC */
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"samsung,exynos5410-mipi-dsi" /* for Exynos5410/5420/5440 SoCs */
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"samsung,exynos5422-mipi-dsi" /* for Exynos5422/5800 SoCs */
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"samsung,exynos5433-mipi-dsi" /* for Exynos5433 SoCs */
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@ -11,7 +11,6 @@ Required properties:
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"samsung,s5pv210-fimd"; /* for S5PV210 SoC */
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"samsung,exynos3250-fimd"; /* for Exynos3250/3472 SoCs */
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"samsung,exynos4210-fimd"; /* for Exynos4 SoCs */
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"samsung,exynos4415-fimd"; /* for Exynos4415 SoC */
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"samsung,exynos5250-fimd"; /* for Exynos5250 SoCs */
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"samsung,exynos5420-fimd"; /* for Exynos5420/5422/5800 SoCs */
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@ -60,6 +60,17 @@ conditions.
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aliases of secure registers have to be used during
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SMMU configuration.
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- stream-match-mask : For SMMUs supporting stream matching and using
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#iommu-cells = <1>, specifies a mask of bits to ignore
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when matching stream IDs (e.g. this may be programmed
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into the SMRn.MASK field of every stream match register
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used). For cases where it is desirable to ignore some
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portion of every Stream ID (e.g. for certain MMU-500
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configurations given globally unique input IDs). This
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property is not valid for SMMUs using stream indexing,
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or using stream matching with #iommu-cells = <2>, and
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may be ignored if present in such cases.
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** Deprecated properties:
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- mmu-masters (deprecated in favour of the generic "iommus" binding) :
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@ -109,3 +120,20 @@ conditions.
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master3 {
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iommus = <&smmu2 1 0x30>;
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};
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/* ARM MMU-500 with 10-bit stream ID input configuration */
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smmu3: iommu {
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compatible = "arm,mmu-500", "arm,smmu-v2";
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...
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#iommu-cells = <1>;
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/* always ignore appended 5-bit TBU number */
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stream-match-mask = 0x7c00;
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};
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bus {
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/* bus whose child devices emit one unique 10-bit stream
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ID each, but may master through multiple SMMU TBUs */
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iommu-map = <0 &smmu3 0 0x400>;
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...
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};
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@ -13,7 +13,7 @@ Required Properties:
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- "rockchip,rk2928-dw-mshc": for Rockchip RK2928 and following,
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before RK3288
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- "rockchip,rk3288-dw-mshc": for Rockchip RK3288
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- "rockchip,rk1108-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip RK1108
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- "rockchip,rv1108-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip RV1108
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- "rockchip,rk3036-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip RK3036
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- "rockchip,rk3368-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip RK3368
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- "rockchip,rk3399-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip RK3399
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@ -44,13 +44,19 @@ Hip05 Example (note that Hip06 is the same except compatible):
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};
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HiSilicon Hip06/Hip07 PCIe host bridge DT (almost-ECAM) description.
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Some BIOSes place the host controller in a mode where it is ECAM
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compliant for all devices other than the root complex. In such cases,
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the host controller should be described as below.
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The properties and their meanings are identical to those described in
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host-generic-pci.txt except as listed below.
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Properties of the host controller node that differ from
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host-generic-pci.txt:
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- compatible : Must be "hisilicon,pcie-almost-ecam"
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- compatible : Must be "hisilicon,hip06-pcie-ecam", or
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"hisilicon,hip07-pcie-ecam"
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- reg : Two entries: First the ECAM configuration space for any
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other bus underneath the root bus. Second, the base
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@ -59,7 +65,7 @@ host-generic-pci.txt:
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Example:
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pcie0: pcie@a0090000 {
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compatible = "hisilicon,pcie-almost-ecam";
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compatible = "hisilicon,hip06-pcie-ecam";
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reg = <0 0xb0000000 0 0x2000000>, /* ECAM configuration space */
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<0 0xa0090000 0 0x10000>; /* host bridge registers */
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bus-range = <0 31>;
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@ -1,39 +0,0 @@
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Broadcom USB3 phy binding for northstar plus SoC
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The USB3 phy is internal to the SoC and is accessed using mdio interface.
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Required mdio bus properties:
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- reg: Should be 0x0 for SoC internal USB3 phy
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- #address-cells: must be 1
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- #size-cells: must be 0
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Required USB3 PHY properties:
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- compatible: should be "brcm,nsp-usb3-phy"
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- reg: USB3 Phy address on SoC internal MDIO bus and it should be 0x10.
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- usb3-ctrl-syscon: handler of syscon node defining physical address
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of usb3 control register.
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- #phy-cells: must be 0
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Required usb3 control properties:
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- compatible: should be "brcm,nsp-usb3-ctrl"
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- reg: offset and length of the control registers
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Example:
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mdio@0 {
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reg = <0x0>;
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#address-cells = <1>;
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#size-cells = <0>;
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usb3_phy: usb-phy@10 {
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compatible = "brcm,nsp-usb3-phy";
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reg = <0x10>;
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usb3-ctrl-syscon = <&usb3_ctrl>;
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#phy-cells = <0>;
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status = "disabled";
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};
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};
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usb3_ctrl: syscon@104408 {
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compatible = "brcm,nsp-usb3-ctrl", "syscon";
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reg = <0x104408 0x3fc>;
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};
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@ -12,7 +12,8 @@ Required properties:
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- reg : Offset and length of the register set for the module
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- interrupts : the interrupt number for the RNG module.
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Used for "ti,omap4-rng" and "inside-secure,safexcel-eip76"
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- clocks: the trng clock source
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- clocks: the trng clock source. Only mandatory for the
|
||||
"inside-secure,safexcel-eip76" compatible.
|
||||
|
||||
Example:
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/* AM335x */
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|
|
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@ -20,3 +20,8 @@ Index 1: The output gpio for enabling Vbus output from the device to the otg
|
|||
Index 2: The output gpio for muxing of the data pins between the USB host and
|
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the USB peripheral controller, write 1 to mux to the peripheral
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controller
|
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There is a mapping between indices and GPIO connection IDs as follows
|
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id index 0
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vbus index 1
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mux index 2
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|
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@ -58,8 +58,7 @@ prototypes:
|
|||
int (*permission) (struct inode *, int, unsigned int);
|
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int (*get_acl)(struct inode *, int);
|
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int (*setattr) (struct dentry *, struct iattr *);
|
||||
int (*getattr) (const struct path *, struct dentry *, struct kstat *,
|
||||
u32, unsigned int);
|
||||
int (*getattr) (const struct path *, struct kstat *, u32, unsigned int);
|
||||
ssize_t (*listxattr) (struct dentry *, char *, size_t);
|
||||
int (*fiemap)(struct inode *, struct fiemap_extent_info *, u64 start, u64 len);
|
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void (*update_time)(struct inode *, struct timespec *, int);
|
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|
|
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@ -600,3 +600,9 @@ in your dentry operations instead.
|
|||
[recommended]
|
||||
->readlink is optional for symlinks. Don't set, unless filesystem needs
|
||||
to fake something for readlink(2).
|
||||
--
|
||||
[mandatory]
|
||||
->getattr() is now passed a struct path rather than a vfsmount and
|
||||
dentry separately, and it now has request_mask and query_flags arguments
|
||||
to specify the fields and sync type requested by statx. Filesystems not
|
||||
supporting any statx-specific features may ignore the new arguments.
|
||||
|
|
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@ -382,8 +382,7 @@ struct inode_operations {
|
|||
int (*permission) (struct inode *, int);
|
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int (*get_acl)(struct inode *, int);
|
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int (*setattr) (struct dentry *, struct iattr *);
|
||||
int (*getattr) (const struct path *, struct dentry *, struct kstat *,
|
||||
u32, unsigned int);
|
||||
int (*getattr) (const struct path *, struct kstat *, u32, unsigned int);
|
||||
ssize_t (*listxattr) (struct dentry *, char *, size_t);
|
||||
void (*update_time)(struct inode *, struct timespec *, int);
|
||||
int (*atomic_open)(struct inode *, struct dentry *, struct file *,
|
||||
|
|
|
@ -18,8 +18,8 @@ because gcc versions 4.5 and 4.6 are compiled by a C compiler,
|
|||
gcc-4.7 can be compiled by a C or a C++ compiler,
|
||||
and versions 4.8+ can only be compiled by a C++ compiler.
|
||||
|
||||
Currently the GCC plugin infrastructure supports only the x86, arm and arm64
|
||||
architectures.
|
||||
Currently the GCC plugin infrastructure supports only the x86, arm, arm64 and
|
||||
powerpc architectures.
|
||||
|
||||
This infrastructure was ported from grsecurity [6] and PaX [7].
|
||||
|
||||
|
|
|
@ -77,9 +77,15 @@ static struct pinctrl_desc foo_desc = {
|
|||
|
||||
int __init foo_probe(void)
|
||||
{
|
||||
int error;
|
||||
|
||||
struct pinctrl_dev *pctl;
|
||||
|
||||
return pinctrl_register_and_init(&foo_desc, <PARENT>, NULL, &pctl);
|
||||
error = pinctrl_register_and_init(&foo_desc, <PARENT>, NULL, &pctl);
|
||||
if (error)
|
||||
return error;
|
||||
|
||||
return pinctrl_enable(pctl);
|
||||
}
|
||||
|
||||
To enable the pinctrl subsystem and the subgroups for PINMUX and PINCONF and
|
||||
|
|
|
@ -124,7 +124,7 @@ specified in the following format in the sign-off area:
|
|||
|
||||
.. code-block:: none
|
||||
|
||||
Cc: <stable@vger.kernel.org> # 3.3.x-
|
||||
Cc: <stable@vger.kernel.org> # 3.3.x
|
||||
|
||||
The tag has the meaning of:
|
||||
|
||||
|
|
|
@ -3377,6 +3377,69 @@ struct kvm_ppc_resize_hpt {
|
|||
__u32 pad;
|
||||
};
|
||||
|
||||
4.104 KVM_X86_GET_MCE_CAP_SUPPORTED
|
||||
|
||||
Capability: KVM_CAP_MCE
|
||||
Architectures: x86
|
||||
Type: system ioctl
|
||||
Parameters: u64 mce_cap (out)
|
||||
Returns: 0 on success, -1 on error
|
||||
|
||||
Returns supported MCE capabilities. The u64 mce_cap parameter
|
||||
has the same format as the MSR_IA32_MCG_CAP register. Supported
|
||||
capabilities will have the corresponding bits set.
|
||||
|
||||
4.105 KVM_X86_SETUP_MCE
|
||||
|
||||
Capability: KVM_CAP_MCE
|
||||
Architectures: x86
|
||||
Type: vcpu ioctl
|
||||
Parameters: u64 mcg_cap (in)
|
||||
Returns: 0 on success,
|
||||
-EFAULT if u64 mcg_cap cannot be read,
|
||||
-EINVAL if the requested number of banks is invalid,
|
||||
-EINVAL if requested MCE capability is not supported.
|
||||
|
||||
Initializes MCE support for use. The u64 mcg_cap parameter
|
||||
has the same format as the MSR_IA32_MCG_CAP register and
|
||||
specifies which capabilities should be enabled. The maximum
|
||||
supported number of error-reporting banks can be retrieved when
|
||||
checking for KVM_CAP_MCE. The supported capabilities can be
|
||||
retrieved with KVM_X86_GET_MCE_CAP_SUPPORTED.
|
||||
|
||||
4.106 KVM_X86_SET_MCE
|
||||
|
||||
Capability: KVM_CAP_MCE
|
||||
Architectures: x86
|
||||
Type: vcpu ioctl
|
||||
Parameters: struct kvm_x86_mce (in)
|
||||
Returns: 0 on success,
|
||||
-EFAULT if struct kvm_x86_mce cannot be read,
|
||||
-EINVAL if the bank number is invalid,
|
||||
-EINVAL if VAL bit is not set in status field.
|
||||
|
||||
Inject a machine check error (MCE) into the guest. The input
|
||||
parameter is:
|
||||
|
||||
struct kvm_x86_mce {
|
||||
__u64 status;
|
||||
__u64 addr;
|
||||
__u64 misc;
|
||||
__u64 mcg_status;
|
||||
__u8 bank;
|
||||
__u8 pad1[7];
|
||||
__u64 pad2[3];
|
||||
};
|
||||
|
||||
If the MCE being reported is an uncorrected error, KVM will
|
||||
inject it as an MCE exception into the guest. If the guest
|
||||
MCG_STATUS register reports that an MCE is in progress, KVM
|
||||
causes an KVM_EXIT_SHUTDOWN vmexit.
|
||||
|
||||
Otherwise, if the MCE is a corrected error, KVM will just
|
||||
store it in the corresponding bank (provided this bank is
|
||||
not holding a previously reported uncorrected error).
|
||||
|
||||
5. The kvm_run structure
|
||||
------------------------
|
||||
|
||||
|
|
|
@ -83,6 +83,12 @@ Groups:
|
|||
|
||||
Bits for undefined preemption levels are RAZ/WI.
|
||||
|
||||
For historical reasons and to provide ABI compatibility with userspace we
|
||||
export the GICC_PMR register in the format of the GICH_VMCR.VMPriMask
|
||||
field in the lower 5 bits of a word, meaning that userspace must always
|
||||
use the lower 5 bits to communicate with the KVM device and must shift the
|
||||
value left by 3 places to obtain the actual priority mask level.
|
||||
|
||||
Limitations:
|
||||
- Priorities are not implemented, and registers are RAZ/WI
|
||||
- Currently only implemented for KVM_DEV_TYPE_ARM_VGIC_V2.
|
||||
|
|
64
MAINTAINERS
64
MAINTAINERS
|
@ -2585,12 +2585,26 @@ F: include/uapi/linux/if_bonding.h
|
|||
|
||||
BPF (Safe dynamic programs and tools)
|
||||
M: Alexei Starovoitov <ast@kernel.org>
|
||||
M: Daniel Borkmann <daniel@iogearbox.net>
|
||||
L: netdev@vger.kernel.org
|
||||
L: linux-kernel@vger.kernel.org
|
||||
S: Supported
|
||||
F: arch/x86/net/bpf_jit*
|
||||
F: Documentation/networking/filter.txt
|
||||
F: include/linux/bpf*
|
||||
F: include/linux/filter.h
|
||||
F: include/uapi/linux/bpf*
|
||||
F: include/uapi/linux/filter.h
|
||||
F: kernel/bpf/
|
||||
F: tools/testing/selftests/bpf/
|
||||
F: kernel/trace/bpf_trace.c
|
||||
F: lib/test_bpf.c
|
||||
F: net/bpf/
|
||||
F: net/core/filter.c
|
||||
F: net/sched/act_bpf.c
|
||||
F: net/sched/cls_bpf.c
|
||||
F: samples/bpf/
|
||||
F: tools/net/bpf*
|
||||
F: tools/testing/selftests/bpf/
|
||||
|
||||
BROADCOM B44 10/100 ETHERNET DRIVER
|
||||
M: Michael Chan <michael.chan@broadcom.com>
|
||||
|
@ -3216,7 +3230,6 @@ F: drivers/platform/chrome/
|
|||
|
||||
CISCO VIC ETHERNET NIC DRIVER
|
||||
M: Christian Benvenuti <benve@cisco.com>
|
||||
M: Sujith Sankar <ssujith@cisco.com>
|
||||
M: Govindarajulu Varadarajan <_govind@gmx.com>
|
||||
M: Neel Patel <neepatel@cisco.com>
|
||||
S: Supported
|
||||
|
@ -4118,14 +4131,13 @@ F: drivers/block/drbd/
|
|||
F: lib/lru_cache.c
|
||||
F: Documentation/blockdev/drbd/
|
||||
|
||||
DRIVER CORE, KOBJECTS, DEBUGFS, KERNFS AND SYSFS
|
||||
DRIVER CORE, KOBJECTS, DEBUGFS AND SYSFS
|
||||
M: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core.git
|
||||
S: Supported
|
||||
F: Documentation/kobject.txt
|
||||
F: drivers/base/
|
||||
F: fs/debugfs/
|
||||
F: fs/kernfs/
|
||||
F: fs/sysfs/
|
||||
F: include/linux/debugfs.h
|
||||
F: include/linux/kobj*
|
||||
|
@ -4776,6 +4788,12 @@ L: linux-edac@vger.kernel.org
|
|||
S: Maintained
|
||||
F: drivers/edac/mpc85xx_edac.[ch]
|
||||
|
||||
EDAC-PND2
|
||||
M: Tony Luck <tony.luck@intel.com>
|
||||
L: linux-edac@vger.kernel.org
|
||||
S: Maintained
|
||||
F: drivers/edac/pnd2_edac.[ch]
|
||||
|
||||
EDAC-PASEMI
|
||||
M: Egor Martovetsky <egor@pasemi.com>
|
||||
L: linux-edac@vger.kernel.org
|
||||
|
@ -4923,6 +4941,7 @@ F: include/linux/netfilter_bridge/
|
|||
F: net/bridge/
|
||||
|
||||
ETHERNET PHY LIBRARY
|
||||
M: Andrew Lunn <andrew@lunn.ch>
|
||||
M: Florian Fainelli <f.fainelli@gmail.com>
|
||||
L: netdev@vger.kernel.org
|
||||
S: Maintained
|
||||
|
@ -6764,6 +6783,8 @@ T: git git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu.git
|
|||
S: Maintained
|
||||
F: Documentation/devicetree/bindings/iommu/
|
||||
F: drivers/iommu/
|
||||
F: include/linux/iommu.h
|
||||
F: include/linux/iova.h
|
||||
|
||||
IP MASQUERADING
|
||||
M: Juanjo Ciarlante <jjciarla@raiz.uncu.edu.ar>
|
||||
|
@ -7084,9 +7105,9 @@ S: Maintained
|
|||
F: fs/autofs4/
|
||||
|
||||
KERNEL BUILD + files below scripts/ (unless maintained elsewhere)
|
||||
M: Masahiro Yamada <yamada.masahiro@socionext.com>
|
||||
M: Michal Marek <mmarek@suse.com>
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/mmarek/kbuild.git for-next
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/mmarek/kbuild.git rc-fixes
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-kbuild.git
|
||||
L: linux-kbuild@vger.kernel.org
|
||||
S: Maintained
|
||||
F: Documentation/kbuild/
|
||||
|
@ -7203,6 +7224,14 @@ F: arch/mips/include/uapi/asm/kvm*
|
|||
F: arch/mips/include/asm/kvm*
|
||||
F: arch/mips/kvm/
|
||||
|
||||
KERNFS
|
||||
M: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
|
||||
M: Tejun Heo <tj@kernel.org>
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core.git
|
||||
S: Supported
|
||||
F: include/linux/kernfs.h
|
||||
F: fs/kernfs/
|
||||
|
||||
KEXEC
|
||||
M: Eric Biederman <ebiederm@xmission.com>
|
||||
W: http://kernel.org/pub/linux/utils/kernel/kexec/
|
||||
|
@ -7774,13 +7803,6 @@ F: include/net/mac80211.h
|
|||
F: net/mac80211/
|
||||
F: drivers/net/wireless/mac80211_hwsim.[ch]
|
||||
|
||||
MACVLAN DRIVER
|
||||
M: Patrick McHardy <kaber@trash.net>
|
||||
L: netdev@vger.kernel.org
|
||||
S: Maintained
|
||||
F: drivers/net/macvlan.c
|
||||
F: include/linux/if_macvlan.h
|
||||
|
||||
MAILBOX API
|
||||
M: Jassi Brar <jassisinghbrar@gmail.com>
|
||||
L: linux-kernel@vger.kernel.org
|
||||
|
@ -7853,6 +7875,8 @@ F: drivers/net/ethernet/marvell/mvneta.*
|
|||
MARVELL MWIFIEX WIRELESS DRIVER
|
||||
M: Amitkumar Karwar <akarwar@marvell.com>
|
||||
M: Nishant Sarmukadam <nishants@marvell.com>
|
||||
M: Ganapathi Bhat <gbhat@marvell.com>
|
||||
M: Xinming Hu <huxm@marvell.com>
|
||||
L: linux-wireless@vger.kernel.org
|
||||
S: Maintained
|
||||
F: drivers/net/wireless/marvell/mwifiex/
|
||||
|
@ -8753,6 +8777,7 @@ W: http://www.linuxfoundation.org/en/Net
|
|||
Q: http://patchwork.ozlabs.org/project/netdev/list/
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/davem/net.git
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next.git
|
||||
B: mailto:netdev@vger.kernel.org
|
||||
S: Maintained
|
||||
F: net/
|
||||
F: include/net/
|
||||
|
@ -10814,6 +10839,7 @@ F: drivers/s390/block/dasd*
|
|||
F: block/partitions/ibm.c
|
||||
|
||||
S390 NETWORK DRIVERS
|
||||
M: Julian Wiedmann <jwi@linux.vnet.ibm.com>
|
||||
M: Ursula Braun <ubraun@linux.vnet.ibm.com>
|
||||
L: linux-s390@vger.kernel.org
|
||||
W: http://www.ibm.com/developerworks/linux/linux390/
|
||||
|
@ -10844,6 +10870,7 @@ S: Supported
|
|||
F: drivers/s390/scsi/zfcp_*
|
||||
|
||||
S390 IUCV NETWORK LAYER
|
||||
M: Julian Wiedmann <jwi@linux.vnet.ibm.com>
|
||||
M: Ursula Braun <ubraun@linux.vnet.ibm.com>
|
||||
L: linux-s390@vger.kernel.org
|
||||
W: http://www.ibm.com/developerworks/linux/linux390/
|
||||
|
@ -12454,7 +12481,6 @@ F: drivers/clk/ti/
|
|||
F: include/linux/clk/ti.h
|
||||
|
||||
TI ETHERNET SWITCH DRIVER (CPSW)
|
||||
M: Mugunthan V N <mugunthanvnm@ti.com>
|
||||
R: Grygorii Strashko <grygorii.strashko@ti.com>
|
||||
L: linux-omap@vger.kernel.org
|
||||
L: netdev@vger.kernel.org
|
||||
|
@ -13295,7 +13321,7 @@ F: drivers/virtio/
|
|||
F: tools/virtio/
|
||||
F: drivers/net/virtio_net.c
|
||||
F: drivers/block/virtio_blk.c
|
||||
F: include/linux/virtio_*.h
|
||||
F: include/linux/virtio*.h
|
||||
F: include/uapi/linux/virtio_*.h
|
||||
F: drivers/crypto/virtio/
|
||||
|
||||
|
@ -13383,14 +13409,6 @@ W: https://linuxtv.org
|
|||
S: Maintained
|
||||
F: drivers/media/platform/vivid/*
|
||||
|
||||
VLAN (802.1Q)
|
||||
M: Patrick McHardy <kaber@trash.net>
|
||||
L: netdev@vger.kernel.org
|
||||
S: Maintained
|
||||
F: drivers/net/macvlan.c
|
||||
F: include/linux/if_*vlan.h
|
||||
F: net/8021q/
|
||||
|
||||
VLYNQ BUS
|
||||
M: Florian Fainelli <f.fainelli@gmail.com>
|
||||
L: openwrt-devel@lists.openwrt.org (subscribers-only)
|
||||
|
|
16
Makefile
16
Makefile
|
@ -1,7 +1,7 @@
|
|||
VERSION = 4
|
||||
PATCHLEVEL = 11
|
||||
SUBLEVEL = 0
|
||||
EXTRAVERSION = -rc3
|
||||
EXTRAVERSION = -rc8
|
||||
NAME = Fearless Coyote
|
||||
|
||||
# *DOCUMENTATION*
|
||||
|
@ -372,7 +372,7 @@ LDFLAGS_MODULE =
|
|||
CFLAGS_KERNEL =
|
||||
AFLAGS_KERNEL =
|
||||
LDFLAGS_vmlinux =
|
||||
CFLAGS_GCOV = -fprofile-arcs -ftest-coverage -fno-tree-loop-im -Wno-maybe-uninitialized
|
||||
CFLAGS_GCOV := -fprofile-arcs -ftest-coverage -fno-tree-loop-im $(call cc-disable-warning,maybe-uninitialized,)
|
||||
CFLAGS_KCOV := $(call cc-option,-fsanitize-coverage=trace-pc,)
|
||||
|
||||
|
||||
|
@ -653,6 +653,12 @@ KBUILD_CFLAGS += $(call cc-ifversion, -lt, 0409, \
|
|||
# Tell gcc to never replace conditional load with a non-conditional one
|
||||
KBUILD_CFLAGS += $(call cc-option,--param=allow-store-data-races=0)
|
||||
|
||||
# check for 'asm goto'
|
||||
ifeq ($(shell $(CONFIG_SHELL) $(srctree)/scripts/gcc-goto.sh $(CC) $(KBUILD_CFLAGS)), y)
|
||||
KBUILD_CFLAGS += -DCC_HAVE_ASM_GOTO
|
||||
KBUILD_AFLAGS += -DCC_HAVE_ASM_GOTO
|
||||
endif
|
||||
|
||||
include scripts/Makefile.gcc-plugins
|
||||
|
||||
ifdef CONFIG_READABLE_ASM
|
||||
|
@ -798,12 +804,6 @@ KBUILD_CFLAGS += $(call cc-option,-Werror=incompatible-pointer-types)
|
|||
# use the deterministic mode of AR if available
|
||||
KBUILD_ARFLAGS := $(call ar-option,D)
|
||||
|
||||
# check for 'asm goto'
|
||||
ifeq ($(shell $(CONFIG_SHELL) $(srctree)/scripts/gcc-goto.sh $(CC) $(KBUILD_CFLAGS)), y)
|
||||
KBUILD_CFLAGS += -DCC_HAVE_ASM_GOTO
|
||||
KBUILD_AFLAGS += -DCC_HAVE_ASM_GOTO
|
||||
endif
|
||||
|
||||
include scripts/Makefile.kasan
|
||||
include scripts/Makefile.extrawarn
|
||||
include scripts/Makefile.ubsan
|
||||
|
|
|
@ -1290,7 +1290,7 @@ SYSCALL_DEFINE1(old_adjtimex, struct timex32 __user *, txc_p)
|
|||
/* copy relevant bits of struct timex. */
|
||||
if (copy_from_user(&txc, txc_p, offsetof(struct timex32, time)) ||
|
||||
copy_from_user(&txc.tick, &txc_p->tick, sizeof(struct timex32) -
|
||||
offsetof(struct timex32, time)))
|
||||
offsetof(struct timex32, tick)))
|
||||
return -EFAULT;
|
||||
|
||||
ret = do_adjtimex(&txc);
|
||||
|
|
|
@ -26,6 +26,7 @@
|
|||
device_type = "cpu";
|
||||
compatible = "snps,arc770d";
|
||||
reg = <0>;
|
||||
clocks = <&core_clk>;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
|
@ -21,6 +21,7 @@
|
|||
device_type = "cpu";
|
||||
compatible = "snps,archs38";
|
||||
reg = <0>;
|
||||
clocks = <&core_clk>;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
|
@ -19,8 +19,27 @@
|
|||
|
||||
cpu@0 {
|
||||
device_type = "cpu";
|
||||
compatible = "snps,archs38xN";
|
||||
compatible = "snps,archs38";
|
||||
reg = <0>;
|
||||
clocks = <&core_clk>;
|
||||
};
|
||||
cpu@1 {
|
||||
device_type = "cpu";
|
||||
compatible = "snps,archs38";
|
||||
reg = <1>;
|
||||
clocks = <&core_clk>;
|
||||
};
|
||||
cpu@2 {
|
||||
device_type = "cpu";
|
||||
compatible = "snps,archs38";
|
||||
reg = <2>;
|
||||
clocks = <&core_clk>;
|
||||
};
|
||||
cpu@3 {
|
||||
device_type = "cpu";
|
||||
compatible = "snps,archs38";
|
||||
reg = <3>;
|
||||
clocks = <&core_clk>;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
|
@ -112,13 +112,19 @@
|
|||
interrupts = <7>;
|
||||
bus-width = <4>;
|
||||
};
|
||||
};
|
||||
|
||||
/* Embedded Vision subsystem UIO mappings; only relevant for EV VDK */
|
||||
/*
|
||||
* Embedded Vision subsystem UIO mappings; only relevant for EV VDK
|
||||
*
|
||||
* This node is intentionally put outside of MB above becase
|
||||
* it maps areas outside of MB's 0xEz-0xFz.
|
||||
*/
|
||||
uio_ev: uio@0xD0000000 {
|
||||
compatible = "generic-uio";
|
||||
reg = <0xD0000000 0x2000 0xD1000000 0x2000 0x90000000 0x10000000 0xC0000000 0x10000000>;
|
||||
reg-names = "ev_gsa", "ev_ctrl", "ev_shared_mem", "ev_code_mem";
|
||||
interrupt-parent = <&mb_intc>;
|
||||
interrupts = <23>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
@ -54,9 +54,7 @@ int kprobe_fault_handler(struct pt_regs *regs, unsigned long cause);
|
|||
void kretprobe_trampoline(void);
|
||||
void trap_is_kprobe(unsigned long address, struct pt_regs *regs);
|
||||
#else
|
||||
static void trap_is_kprobe(unsigned long address, struct pt_regs *regs)
|
||||
{
|
||||
}
|
||||
#define trap_is_kprobe(address, regs)
|
||||
#endif /* CONFIG_KPROBES */
|
||||
|
||||
#endif /* _ARC_KPROBES_H */
|
||||
|
|
|
@ -100,15 +100,21 @@ END(handle_interrupt)
|
|||
;################### Non TLB Exception Handling #############################
|
||||
|
||||
ENTRY(EV_SWI)
|
||||
flag 1
|
||||
; TODO: implement this
|
||||
EXCEPTION_PROLOGUE
|
||||
b ret_from_exception
|
||||
END(EV_SWI)
|
||||
|
||||
ENTRY(EV_DivZero)
|
||||
flag 1
|
||||
; TODO: implement this
|
||||
EXCEPTION_PROLOGUE
|
||||
b ret_from_exception
|
||||
END(EV_DivZero)
|
||||
|
||||
ENTRY(EV_DCError)
|
||||
flag 1
|
||||
; TODO: implement this
|
||||
EXCEPTION_PROLOGUE
|
||||
b ret_from_exception
|
||||
END(EV_DCError)
|
||||
|
||||
; ---------------------------------------------
|
||||
|
|
|
@ -10,6 +10,7 @@
|
|||
#include <linux/fs.h>
|
||||
#include <linux/delay.h>
|
||||
#include <linux/root_dev.h>
|
||||
#include <linux/clk.h>
|
||||
#include <linux/clk-provider.h>
|
||||
#include <linux/clocksource.h>
|
||||
#include <linux/console.h>
|
||||
|
@ -488,8 +489,9 @@ static int show_cpuinfo(struct seq_file *m, void *v)
|
|||
{
|
||||
char *str;
|
||||
int cpu_id = ptr_to_cpu(v);
|
||||
struct device_node *core_clk = of_find_node_by_name(NULL, "core_clk");
|
||||
u32 freq = 0;
|
||||
struct device *cpu_dev = get_cpu_device(cpu_id);
|
||||
struct clk *cpu_clk;
|
||||
unsigned long freq = 0;
|
||||
|
||||
if (!cpu_online(cpu_id)) {
|
||||
seq_printf(m, "processor [%d]\t: Offline\n", cpu_id);
|
||||
|
@ -502,9 +504,15 @@ static int show_cpuinfo(struct seq_file *m, void *v)
|
|||
|
||||
seq_printf(m, arc_cpu_mumbojumbo(cpu_id, str, PAGE_SIZE));
|
||||
|
||||
of_property_read_u32(core_clk, "clock-frequency", &freq);
|
||||
cpu_clk = clk_get(cpu_dev, NULL);
|
||||
if (IS_ERR(cpu_clk)) {
|
||||
seq_printf(m, "CPU speed \t: Cannot get clock for processor [%d]\n",
|
||||
cpu_id);
|
||||
} else {
|
||||
freq = clk_get_rate(cpu_clk);
|
||||
}
|
||||
if (freq)
|
||||
seq_printf(m, "CPU speed\t: %u.%02u Mhz\n",
|
||||
seq_printf(m, "CPU speed\t: %lu.%02lu Mhz\n",
|
||||
freq / 1000000, (freq / 10000) % 100);
|
||||
|
||||
seq_printf(m, "Bogo MIPS\t: %lu.%02lu\n",
|
||||
|
|
|
@ -633,6 +633,9 @@ noinline static void slc_entire_op(const int op)
|
|||
|
||||
write_aux_reg(ARC_REG_SLC_INVALIDATE, 1);
|
||||
|
||||
/* Make sure "busy" bit reports correct stataus, see STAR 9001165532 */
|
||||
read_aux_reg(r);
|
||||
|
||||
/* Important to wait for flush to complete */
|
||||
while (read_aux_reg(r) & SLC_CTRL_BUSY);
|
||||
}
|
||||
|
|
|
@ -371,6 +371,8 @@
|
|||
|
||||
phy1: ethernet-phy@1 {
|
||||
reg = <7>;
|
||||
eee-broken-100tx;
|
||||
eee-broken-1000t;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
|
@ -672,6 +672,7 @@
|
|||
ti,non-removable;
|
||||
bus-width = <4>;
|
||||
cap-power-off-card;
|
||||
keep-power-in-suspend;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mmc2_pins>;
|
||||
|
||||
|
|
|
@ -63,14 +63,14 @@
|
|||
label = "home";
|
||||
linux,code = <KEY_HOME>;
|
||||
gpios = <&gpio3 7 GPIO_ACTIVE_HIGH>;
|
||||
gpio-key,wakeup;
|
||||
wakeup-source;
|
||||
};
|
||||
|
||||
button@1 {
|
||||
label = "menu";
|
||||
linux,code = <KEY_MENU>;
|
||||
gpios = <&gpio3 8 GPIO_ACTIVE_HIGH>;
|
||||
gpio-key,wakeup;
|
||||
wakeup-source;
|
||||
};
|
||||
|
||||
};
|
||||
|
|
|
@ -315,6 +315,13 @@
|
|||
/* ID & VBUS GPIOs provided in board dts */
|
||||
};
|
||||
};
|
||||
|
||||
tpic2810: tpic2810@60 {
|
||||
compatible = "ti,tpic2810";
|
||||
reg = <0x60>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
};
|
||||
};
|
||||
|
||||
&mcspi3 {
|
||||
|
@ -330,13 +337,6 @@
|
|||
spi-max-frequency = <1000000>;
|
||||
spi-cpol;
|
||||
};
|
||||
|
||||
tpic2810: tpic2810@60 {
|
||||
compatible = "ti,tpic2810";
|
||||
reg = <0x60>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
};
|
||||
};
|
||||
|
||||
&uart3 {
|
||||
|
|
|
@ -66,14 +66,14 @@
|
|||
timer@20200 {
|
||||
compatible = "arm,cortex-a9-global-timer";
|
||||
reg = <0x20200 0x100>;
|
||||
interrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <GIC_PPI 11 IRQ_TYPE_EDGE_RISING>;
|
||||
clocks = <&periph_clk>;
|
||||
};
|
||||
|
||||
local-timer@20600 {
|
||||
compatible = "arm,cortex-a9-twd-timer";
|
||||
reg = <0x20600 0x100>;
|
||||
interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <GIC_PPI 13 IRQ_TYPE_EDGE_RISING>;
|
||||
clocks = <&periph_clk>;
|
||||
};
|
||||
|
||||
|
|
|
@ -48,15 +48,14 @@
|
|||
};
|
||||
|
||||
memory {
|
||||
reg = <0x00000000 0x10000000>;
|
||||
reg = <0x80000000 0x10000000>;
|
||||
};
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
clock-frequency = <62499840>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart1 {
|
||||
clock-frequency = <62499840>;
|
||||
status = "okay";
|
||||
};
|
||||
|
|
|
@ -55,6 +55,7 @@
|
|||
gpio-restart {
|
||||
compatible = "gpio-restart";
|
||||
gpios = <&gpioa 15 GPIO_ACTIVE_LOW>;
|
||||
open-source;
|
||||
priority = <200>;
|
||||
};
|
||||
};
|
||||
|
|
|
@ -55,6 +55,7 @@
|
|||
gpio-restart {
|
||||
compatible = "gpio-restart";
|
||||
gpios = <&gpioa 15 GPIO_ACTIVE_LOW>;
|
||||
open-source;
|
||||
priority = <200>;
|
||||
};
|
||||
};
|
||||
|
|
|
@ -55,6 +55,7 @@
|
|||
gpio-restart {
|
||||
compatible = "gpio-restart";
|
||||
gpios = <&gpioa 31 GPIO_ACTIVE_LOW>;
|
||||
open-source;
|
||||
priority = <200>;
|
||||
};
|
||||
};
|
||||
|
|
|
@ -55,6 +55,7 @@
|
|||
gpio-restart {
|
||||
compatible = "gpio-restart";
|
||||
gpios = <&gpioa 15 GPIO_ACTIVE_LOW>;
|
||||
open-source;
|
||||
priority = <200>;
|
||||
};
|
||||
};
|
||||
|
|
|
@ -55,6 +55,7 @@
|
|||
gpio-restart {
|
||||
compatible = "gpio-restart";
|
||||
gpios = <&gpioa 15 GPIO_ACTIVE_LOW>;
|
||||
open-source;
|
||||
priority = <200>;
|
||||
};
|
||||
};
|
||||
|
|
|
@ -55,6 +55,7 @@
|
|||
gpio-restart {
|
||||
compatible = "gpio-restart";
|
||||
gpios = <&gpioa 15 GPIO_ACTIVE_LOW>;
|
||||
open-source;
|
||||
priority = <200>;
|
||||
};
|
||||
};
|
||||
|
|
|
@ -55,6 +55,7 @@
|
|||
gpio-restart {
|
||||
compatible = "gpio-restart";
|
||||
gpios = <&gpioa 15 GPIO_ACTIVE_LOW>;
|
||||
open-source;
|
||||
priority = <200>;
|
||||
};
|
||||
};
|
||||
|
|
|
@ -283,6 +283,7 @@
|
|||
device_type = "pci";
|
||||
ranges = <0x81000000 0 0 0x03000 0 0x00010000
|
||||
0x82000000 0 0x20013000 0x13000 0 0xffed000>;
|
||||
bus-range = <0x00 0xff>;
|
||||
#interrupt-cells = <1>;
|
||||
num-lanes = <1>;
|
||||
linux,pci-domain = <0>;
|
||||
|
@ -319,6 +320,7 @@
|
|||
device_type = "pci";
|
||||
ranges = <0x81000000 0 0 0x03000 0 0x00010000
|
||||
0x82000000 0 0x30013000 0x13000 0 0xffed000>;
|
||||
bus-range = <0x00 0xff>;
|
||||
#interrupt-cells = <1>;
|
||||
num-lanes = <1>;
|
||||
linux,pci-domain = <1>;
|
||||
|
|
|
@ -121,11 +121,6 @@
|
|||
};
|
||||
};
|
||||
|
||||
&cpu0 {
|
||||
arm-supply = <&sw1a_reg>;
|
||||
soc-supply = <&sw1c_reg>;
|
||||
};
|
||||
|
||||
&fec1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_enet1>;
|
||||
|
|
|
@ -121,7 +121,7 @@
|
|||
&i2c3 {
|
||||
clock-frequency = <400000>;
|
||||
at24@50 {
|
||||
compatible = "at24,24c02";
|
||||
compatible = "atmel,24c64";
|
||||
readonly;
|
||||
reg = <0x50>;
|
||||
};
|
||||
|
|
|
@ -266,7 +266,7 @@
|
|||
};
|
||||
|
||||
usb1: ohci@00400000 {
|
||||
compatible = "atmel,sama5d2-ohci", "usb-ohci";
|
||||
compatible = "atmel,at91rm9200-ohci", "usb-ohci";
|
||||
reg = <0x00400000 0x100000>;
|
||||
interrupts = <41 IRQ_TYPE_LEVEL_HIGH 2>;
|
||||
clocks = <&uhphs_clk>, <&uhphs_clk>, <&uhpck>;
|
||||
|
|
|
@ -14,6 +14,7 @@
|
|||
#include <dt-bindings/mfd/dbx500-prcmu.h>
|
||||
#include <dt-bindings/arm/ux500_pm_domains.h>
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/clock/ste-ab8500.h>
|
||||
#include "skeleton.dtsi"
|
||||
|
||||
/ {
|
||||
|
@ -603,6 +604,11 @@
|
|||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
|
||||
ab8500_clock: clock-controller {
|
||||
compatible = "stericsson,ab8500-clk";
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
ab8500_gpio: ab8500-gpio {
|
||||
compatible = "stericsson,ab8500-gpio";
|
||||
gpio-controller;
|
||||
|
@ -686,6 +692,8 @@
|
|||
|
||||
ab8500-pwm {
|
||||
compatible = "stericsson,ab8500-pwm";
|
||||
clocks = <&ab8500_clock AB8500_SYSCLK_INT>;
|
||||
clock-names = "intclk";
|
||||
};
|
||||
|
||||
ab8500-debugfs {
|
||||
|
@ -700,6 +708,9 @@
|
|||
V-AMIC2-supply = <&ab8500_ldo_anamic2_reg>;
|
||||
V-DMIC-supply = <&ab8500_ldo_dmic_reg>;
|
||||
|
||||
clocks = <&ab8500_clock AB8500_SYSCLK_AUDIO>;
|
||||
clock-names = "audioclk";
|
||||
|
||||
stericsson,earpeice-cmv = <950>; /* Units in mV. */
|
||||
};
|
||||
|
||||
|
@ -1095,6 +1106,14 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
sound {
|
||||
compatible = "stericsson,snd-soc-mop500";
|
||||
stericsson,cpu-dai = <&msp1 &msp3>;
|
||||
stericsson,audio-codec = <&codec>;
|
||||
clocks = <&prcmu_clk PRCMU_SYSCLK>, <&ab8500_clock AB8500_SYSCLK_ULP>, <&ab8500_clock AB8500_SYSCLK_INT>;
|
||||
clock-names = "sysclk", "ulpclk", "intclk";
|
||||
};
|
||||
|
||||
msp0: msp@80123000 {
|
||||
compatible = "stericsson,ux500-msp-i2s";
|
||||
reg = <0x80123000 0x1000>;
|
||||
|
|
|
@ -186,15 +186,6 @@
|
|||
status = "okay";
|
||||
};
|
||||
|
||||
sound {
|
||||
compatible = "stericsson,snd-soc-mop500";
|
||||
|
||||
stericsson,cpu-dai = <&msp1 &msp3>;
|
||||
stericsson,audio-codec = <&codec>;
|
||||
clocks = <&prcmu_clk PRCMU_SYSCLK>;
|
||||
clock-names = "sysclk";
|
||||
};
|
||||
|
||||
msp0: msp@80123000 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&msp0_default_mode>;
|
||||
|
|
|
@ -159,15 +159,6 @@
|
|||
"", "", "", "", "", "", "", "";
|
||||
};
|
||||
|
||||
sound {
|
||||
compatible = "stericsson,snd-soc-mop500";
|
||||
|
||||
stericsson,cpu-dai = <&msp1 &msp3>;
|
||||
stericsson,audio-codec = <&codec>;
|
||||
clocks = <&prcmu_clk PRCMU_SYSCLK>;
|
||||
clock-names = "sysclk";
|
||||
};
|
||||
|
||||
msp0: msp@80123000 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&msp0_default_mode>;
|
||||
|
|
|
@ -167,7 +167,7 @@
|
|||
reg = <8>;
|
||||
label = "cpu";
|
||||
ethernet = <&gmac>;
|
||||
phy-mode = "rgmii";
|
||||
phy-mode = "rgmii-txid";
|
||||
fixed-link {
|
||||
speed = <1000>;
|
||||
full-duplex;
|
||||
|
|
|
@ -495,7 +495,7 @@
|
|||
resets = <&ccu RST_BUS_GPU>;
|
||||
|
||||
assigned-clocks = <&ccu CLK_GPU>;
|
||||
assigned-clock-rates = <408000000>;
|
||||
assigned-clock-rates = <384000000>;
|
||||
};
|
||||
|
||||
gic: interrupt-controller@01c81000 {
|
||||
|
|
|
@ -66,12 +66,6 @@
|
|||
opp-microvolt = <1200000>;
|
||||
clock-latency-ns = <244144>; /* 8 32k periods */
|
||||
};
|
||||
|
||||
opp@1200000000 {
|
||||
opp-hz = /bits/ 64 <1200000000>;
|
||||
opp-microvolt = <1320000>;
|
||||
clock-latency-ns = <244144>; /* 8 32k periods */
|
||||
};
|
||||
};
|
||||
|
||||
cpus {
|
||||
|
@ -81,16 +75,22 @@
|
|||
operating-points-v2 = <&cpu0_opp_table>;
|
||||
};
|
||||
|
||||
cpu@1 {
|
||||
operating-points-v2 = <&cpu0_opp_table>;
|
||||
};
|
||||
|
||||
cpu@2 {
|
||||
compatible = "arm,cortex-a7";
|
||||
device_type = "cpu";
|
||||
reg = <2>;
|
||||
operating-points-v2 = <&cpu0_opp_table>;
|
||||
};
|
||||
|
||||
cpu@3 {
|
||||
compatible = "arm,cortex-a7";
|
||||
device_type = "cpu";
|
||||
reg = <3>;
|
||||
operating-points-v2 = <&cpu0_opp_table>;
|
||||
};
|
||||
};
|
||||
|
||||
|
@ -113,8 +113,8 @@
|
|||
simple-audio-card,mclk-fs = <512>;
|
||||
simple-audio-card,aux-devs = <&codec_analog>;
|
||||
simple-audio-card,routing =
|
||||
"Left DAC", "Digital Left DAC",
|
||||
"Right DAC", "Digital Right DAC";
|
||||
"Left DAC", "AIF1 Slot 0 Left",
|
||||
"Right DAC", "AIF1 Slot 0 Right";
|
||||
status = "disabled";
|
||||
|
||||
simple-audio-card,cpu {
|
||||
|
|
|
@ -50,8 +50,6 @@
|
|||
|
||||
backlight: backlight {
|
||||
compatible = "pwm-backlight";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&bl_en_pin>;
|
||||
pwms = <&pwm 0 50000 PWM_POLARITY_INVERTED>;
|
||||
brightness-levels = <0 10 20 30 40 50 60 70 80 90 100>;
|
||||
default-brightness-level = <8>;
|
||||
|
@ -93,11 +91,6 @@
|
|||
};
|
||||
|
||||
&pio {
|
||||
bl_en_pin: bl_en_pin@0 {
|
||||
pins = "PH6";
|
||||
function = "gpio_in";
|
||||
};
|
||||
|
||||
mmc0_cd_pin: mmc0_cd_pin@0 {
|
||||
pins = "PB4";
|
||||
function = "gpio_in";
|
||||
|
|
|
@ -188,6 +188,7 @@ CONFIG_WL12XX=m
|
|||
CONFIG_WL18XX=m
|
||||
CONFIG_WLCORE_SPI=m
|
||||
CONFIG_WLCORE_SDIO=m
|
||||
CONFIG_INPUT_MOUSEDEV=m
|
||||
CONFIG_INPUT_JOYDEV=m
|
||||
CONFIG_INPUT_EVDEV=m
|
||||
CONFIG_KEYBOARD_ATKBD=m
|
||||
|
|
|
@ -1124,6 +1124,9 @@ static void cpu_hyp_reinit(void)
|
|||
if (__hyp_get_vectors() == hyp_default_vectors)
|
||||
cpu_init_hyp_mode(NULL);
|
||||
}
|
||||
|
||||
if (vgic_present)
|
||||
kvm_vgic_init_cpu_hardware();
|
||||
}
|
||||
|
||||
static void cpu_hyp_reset(void)
|
||||
|
|
|
@ -292,11 +292,18 @@ static void unmap_stage2_range(struct kvm *kvm, phys_addr_t start, u64 size)
|
|||
phys_addr_t addr = start, end = start + size;
|
||||
phys_addr_t next;
|
||||
|
||||
assert_spin_locked(&kvm->mmu_lock);
|
||||
pgd = kvm->arch.pgd + stage2_pgd_index(addr);
|
||||
do {
|
||||
next = stage2_pgd_addr_end(addr, end);
|
||||
if (!stage2_pgd_none(*pgd))
|
||||
unmap_stage2_puds(kvm, pgd, addr, next);
|
||||
/*
|
||||
* If the range is too large, release the kvm->mmu_lock
|
||||
* to prevent starvation and lockup detector warnings.
|
||||
*/
|
||||
if (next != end)
|
||||
cond_resched_lock(&kvm->mmu_lock);
|
||||
} while (pgd++, addr = next, addr != end);
|
||||
}
|
||||
|
||||
|
@ -803,6 +810,7 @@ void stage2_unmap_vm(struct kvm *kvm)
|
|||
int idx;
|
||||
|
||||
idx = srcu_read_lock(&kvm->srcu);
|
||||
down_read(¤t->mm->mmap_sem);
|
||||
spin_lock(&kvm->mmu_lock);
|
||||
|
||||
slots = kvm_memslots(kvm);
|
||||
|
@ -810,6 +818,7 @@ void stage2_unmap_vm(struct kvm *kvm)
|
|||
stage2_unmap_memslot(kvm, memslot);
|
||||
|
||||
spin_unlock(&kvm->mmu_lock);
|
||||
up_read(¤t->mm->mmap_sem);
|
||||
srcu_read_unlock(&kvm->srcu, idx);
|
||||
}
|
||||
|
||||
|
@ -829,7 +838,10 @@ void kvm_free_stage2_pgd(struct kvm *kvm)
|
|||
if (kvm->arch.pgd == NULL)
|
||||
return;
|
||||
|
||||
spin_lock(&kvm->mmu_lock);
|
||||
unmap_stage2_range(kvm, 0, KVM_PHYS_SIZE);
|
||||
spin_unlock(&kvm->mmu_lock);
|
||||
|
||||
/* Free the HW pgd, one page at a time */
|
||||
free_pages_exact(kvm->arch.pgd, S2_PGD_SIZE);
|
||||
kvm->arch.pgd = NULL;
|
||||
|
@ -1801,6 +1813,7 @@ int kvm_arch_prepare_memory_region(struct kvm *kvm,
|
|||
(KVM_PHYS_SIZE >> PAGE_SHIFT))
|
||||
return -EFAULT;
|
||||
|
||||
down_read(¤t->mm->mmap_sem);
|
||||
/*
|
||||
* A memory region could potentially cover multiple VMAs, and any holes
|
||||
* between them, so iterate over all of them to find out if we can map
|
||||
|
@ -1844,8 +1857,10 @@ int kvm_arch_prepare_memory_region(struct kvm *kvm,
|
|||
pa += vm_start - vma->vm_start;
|
||||
|
||||
/* IO region dirty page logging not allowed */
|
||||
if (memslot->flags & KVM_MEM_LOG_DIRTY_PAGES)
|
||||
return -EINVAL;
|
||||
if (memslot->flags & KVM_MEM_LOG_DIRTY_PAGES) {
|
||||
ret = -EINVAL;
|
||||
goto out;
|
||||
}
|
||||
|
||||
ret = kvm_phys_addr_ioremap(kvm, gpa, pa,
|
||||
vm_end - vm_start,
|
||||
|
@ -1857,7 +1872,7 @@ int kvm_arch_prepare_memory_region(struct kvm *kvm,
|
|||
} while (hva < reg_end);
|
||||
|
||||
if (change == KVM_MR_FLAGS_ONLY)
|
||||
return ret;
|
||||
goto out;
|
||||
|
||||
spin_lock(&kvm->mmu_lock);
|
||||
if (ret)
|
||||
|
@ -1865,6 +1880,8 @@ int kvm_arch_prepare_memory_region(struct kvm *kvm,
|
|||
else
|
||||
stage2_flush_memslot(kvm, memslot);
|
||||
spin_unlock(&kvm->mmu_lock);
|
||||
out:
|
||||
up_read(¤t->mm->mmap_sem);
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
|
|
@ -289,6 +289,22 @@ static void at91_ddr_standby(void)
|
|||
at91_ramc_write(1, AT91_DDRSDRC_LPR, saved_lpr1);
|
||||
}
|
||||
|
||||
static void sama5d3_ddr_standby(void)
|
||||
{
|
||||
u32 lpr0;
|
||||
u32 saved_lpr0;
|
||||
|
||||
saved_lpr0 = at91_ramc_read(0, AT91_DDRSDRC_LPR);
|
||||
lpr0 = saved_lpr0 & ~AT91_DDRSDRC_LPCB;
|
||||
lpr0 |= AT91_DDRSDRC_LPCB_POWER_DOWN;
|
||||
|
||||
at91_ramc_write(0, AT91_DDRSDRC_LPR, lpr0);
|
||||
|
||||
cpu_do_idle();
|
||||
|
||||
at91_ramc_write(0, AT91_DDRSDRC_LPR, saved_lpr0);
|
||||
}
|
||||
|
||||
/* We manage both DDRAM/SDRAM controllers, we need more than one value to
|
||||
* remember.
|
||||
*/
|
||||
|
@ -323,7 +339,7 @@ static const struct of_device_id const ramc_ids[] __initconst = {
|
|||
{ .compatible = "atmel,at91rm9200-sdramc", .data = at91rm9200_standby },
|
||||
{ .compatible = "atmel,at91sam9260-sdramc", .data = at91sam9_sdram_standby },
|
||||
{ .compatible = "atmel,at91sam9g45-ddramc", .data = at91_ddr_standby },
|
||||
{ .compatible = "atmel,sama5d3-ddramc", .data = at91_ddr_standby },
|
||||
{ .compatible = "atmel,sama5d3-ddramc", .data = sama5d3_ddr_standby },
|
||||
{ /*sentinel*/ }
|
||||
};
|
||||
|
||||
|
|
|
@ -241,6 +241,3 @@ obj-$(CONFIG_MACH_OMAP2_TUSB6010) += usb-tusb6010.o
|
|||
|
||||
onenand-$(CONFIG_MTD_ONENAND_OMAP2) := gpmc-onenand.o
|
||||
obj-y += $(onenand-m) $(onenand-y)
|
||||
|
||||
nand-$(CONFIG_MTD_NAND_OMAP2) := gpmc-nand.o
|
||||
obj-y += $(nand-m) $(nand-y)
|
||||
|
|
|
@ -270,6 +270,7 @@ extern const struct smp_operations omap4_smp_ops;
|
|||
extern int omap4_mpuss_init(void);
|
||||
extern int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state);
|
||||
extern int omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state);
|
||||
extern u32 omap4_get_cpu1_ns_pa_addr(void);
|
||||
#else
|
||||
static inline int omap4_enter_lowpower(unsigned int cpu,
|
||||
unsigned int power_state)
|
||||
|
|
|
@ -1,154 +0,0 @@
|
|||
/*
|
||||
* gpmc-nand.c
|
||||
*
|
||||
* Copyright (C) 2009 Texas Instruments
|
||||
* Vimal Singh <vimalsingh@ti.com>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/omap-gpmc.h>
|
||||
#include <linux/mtd/nand.h>
|
||||
#include <linux/platform_data/mtd-nand-omap2.h>
|
||||
|
||||
#include <asm/mach/flash.h>
|
||||
|
||||
#include "soc.h"
|
||||
|
||||
/* minimum size for IO mapping */
|
||||
#define NAND_IO_SIZE 4
|
||||
|
||||
static bool gpmc_hwecc_bch_capable(enum omap_ecc ecc_opt)
|
||||
{
|
||||
/* platforms which support all ECC schemes */
|
||||
if (soc_is_am33xx() || soc_is_am43xx() || cpu_is_omap44xx() ||
|
||||
soc_is_omap54xx() || soc_is_dra7xx())
|
||||
return 1;
|
||||
|
||||
if (ecc_opt == OMAP_ECC_BCH4_CODE_HW_DETECTION_SW ||
|
||||
ecc_opt == OMAP_ECC_BCH8_CODE_HW_DETECTION_SW) {
|
||||
if (cpu_is_omap24xx())
|
||||
return 0;
|
||||
else if (cpu_is_omap3630() && (GET_OMAP_REVISION() == 0))
|
||||
return 0;
|
||||
else
|
||||
return 1;
|
||||
}
|
||||
|
||||
/* OMAP3xxx do not have ELM engine, so cannot support ECC schemes
|
||||
* which require H/W based ECC error detection */
|
||||
if ((cpu_is_omap34xx() || cpu_is_omap3630()) &&
|
||||
((ecc_opt == OMAP_ECC_BCH4_CODE_HW) ||
|
||||
(ecc_opt == OMAP_ECC_BCH8_CODE_HW)))
|
||||
return 0;
|
||||
|
||||
/* legacy platforms support only HAM1 (1-bit Hamming) ECC scheme */
|
||||
if (ecc_opt == OMAP_ECC_HAM1_CODE_HW ||
|
||||
ecc_opt == OMAP_ECC_HAM1_CODE_SW)
|
||||
return 1;
|
||||
else
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* This function will go away once the device-tree convertion is complete */
|
||||
static void gpmc_set_legacy(struct omap_nand_platform_data *gpmc_nand_data,
|
||||
struct gpmc_settings *s)
|
||||
{
|
||||
/* Enable RD PIN Monitoring Reg */
|
||||
if (gpmc_nand_data->dev_ready) {
|
||||
s->wait_on_read = true;
|
||||
s->wait_on_write = true;
|
||||
}
|
||||
|
||||
if (gpmc_nand_data->devsize == NAND_BUSWIDTH_16)
|
||||
s->device_width = GPMC_DEVWIDTH_16BIT;
|
||||
else
|
||||
s->device_width = GPMC_DEVWIDTH_8BIT;
|
||||
}
|
||||
|
||||
int gpmc_nand_init(struct omap_nand_platform_data *gpmc_nand_data,
|
||||
struct gpmc_timings *gpmc_t)
|
||||
{
|
||||
int err = 0;
|
||||
struct gpmc_settings s;
|
||||
struct platform_device *pdev;
|
||||
struct resource gpmc_nand_res[] = {
|
||||
{ .flags = IORESOURCE_MEM, },
|
||||
{ .flags = IORESOURCE_IRQ, },
|
||||
{ .flags = IORESOURCE_IRQ, },
|
||||
};
|
||||
|
||||
BUG_ON(gpmc_nand_data->cs >= GPMC_CS_NUM);
|
||||
|
||||
err = gpmc_cs_request(gpmc_nand_data->cs, NAND_IO_SIZE,
|
||||
(unsigned long *)&gpmc_nand_res[0].start);
|
||||
if (err < 0) {
|
||||
pr_err("omap2-gpmc: Cannot request GPMC CS %d, error %d\n",
|
||||
gpmc_nand_data->cs, err);
|
||||
return err;
|
||||
}
|
||||
gpmc_nand_res[0].end = gpmc_nand_res[0].start + NAND_IO_SIZE - 1;
|
||||
gpmc_nand_res[1].start = gpmc_get_client_irq(GPMC_IRQ_FIFOEVENTENABLE);
|
||||
gpmc_nand_res[2].start = gpmc_get_client_irq(GPMC_IRQ_COUNT_EVENT);
|
||||
|
||||
memset(&s, 0, sizeof(struct gpmc_settings));
|
||||
gpmc_set_legacy(gpmc_nand_data, &s);
|
||||
|
||||
s.device_nand = true;
|
||||
|
||||
if (gpmc_t) {
|
||||
err = gpmc_cs_set_timings(gpmc_nand_data->cs, gpmc_t, &s);
|
||||
if (err < 0) {
|
||||
pr_err("omap2-gpmc: Unable to set gpmc timings: %d\n",
|
||||
err);
|
||||
return err;
|
||||
}
|
||||
}
|
||||
|
||||
err = gpmc_cs_program_settings(gpmc_nand_data->cs, &s);
|
||||
if (err < 0)
|
||||
goto out_free_cs;
|
||||
|
||||
err = gpmc_configure(GPMC_CONFIG_WP, 0);
|
||||
if (err < 0)
|
||||
goto out_free_cs;
|
||||
|
||||
if (!gpmc_hwecc_bch_capable(gpmc_nand_data->ecc_opt)) {
|
||||
pr_err("omap2-nand: Unsupported NAND ECC scheme selected\n");
|
||||
err = -EINVAL;
|
||||
goto out_free_cs;
|
||||
}
|
||||
|
||||
|
||||
pdev = platform_device_alloc("omap2-nand", gpmc_nand_data->cs);
|
||||
if (pdev) {
|
||||
err = platform_device_add_resources(pdev, gpmc_nand_res,
|
||||
ARRAY_SIZE(gpmc_nand_res));
|
||||
if (!err)
|
||||
pdev->dev.platform_data = gpmc_nand_data;
|
||||
} else {
|
||||
err = -ENOMEM;
|
||||
}
|
||||
if (err)
|
||||
goto out_free_pdev;
|
||||
|
||||
err = platform_device_add(pdev);
|
||||
if (err) {
|
||||
dev_err(&pdev->dev, "Unable to register NAND device\n");
|
||||
goto out_free_pdev;
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
||||
out_free_pdev:
|
||||
platform_device_put(pdev);
|
||||
out_free_cs:
|
||||
gpmc_cs_free(gpmc_nand_data->cs);
|
||||
|
||||
return err;
|
||||
}
|
|
@ -367,7 +367,7 @@ static int gpmc_onenand_setup(void __iomem *onenand_base, int *freq_ptr)
|
|||
return ret;
|
||||
}
|
||||
|
||||
void gpmc_onenand_init(struct omap_onenand_platform_data *_onenand_data)
|
||||
int gpmc_onenand_init(struct omap_onenand_platform_data *_onenand_data)
|
||||
{
|
||||
int err;
|
||||
struct device *dev = &gpmc_onenand_device.dev;
|
||||
|
@ -393,15 +393,17 @@ void gpmc_onenand_init(struct omap_onenand_platform_data *_onenand_data)
|
|||
if (err < 0) {
|
||||
dev_err(dev, "Cannot request GPMC CS %d, error %d\n",
|
||||
gpmc_onenand_data->cs, err);
|
||||
return;
|
||||
return err;
|
||||
}
|
||||
|
||||
gpmc_onenand_resource.end = gpmc_onenand_resource.start +
|
||||
ONENAND_IO_SIZE - 1;
|
||||
|
||||
if (platform_device_register(&gpmc_onenand_device) < 0) {
|
||||
err = platform_device_register(&gpmc_onenand_device);
|
||||
if (err) {
|
||||
dev_err(dev, "Unable to register OneNAND device\n");
|
||||
gpmc_cs_free(gpmc_onenand_data->cs);
|
||||
return;
|
||||
}
|
||||
|
||||
return err;
|
||||
}
|
||||
|
|
|
@ -17,6 +17,7 @@
|
|||
|
||||
#include <linux/linkage.h>
|
||||
#include <linux/init.h>
|
||||
#include <asm/assembler.h>
|
||||
|
||||
#include "omap44xx.h"
|
||||
|
||||
|
@ -66,7 +67,7 @@ wait_2: ldr r2, =AUX_CORE_BOOT0_PA @ read from AuxCoreBoot0
|
|||
cmp r0, r4
|
||||
bne wait_2
|
||||
ldr r12, =API_HYP_ENTRY
|
||||
adr r0, hyp_boot
|
||||
badr r0, hyp_boot
|
||||
smc #0
|
||||
hyp_boot:
|
||||
b omap_secondary_startup
|
||||
|
|
|
@ -50,7 +50,7 @@ void omap4_cpu_die(unsigned int cpu)
|
|||
omap4_hotplug_cpu(cpu, PWRDM_POWER_OFF);
|
||||
|
||||
if (omap_secure_apis_support())
|
||||
boot_cpu = omap_read_auxcoreboot0();
|
||||
boot_cpu = omap_read_auxcoreboot0() >> 9;
|
||||
else
|
||||
boot_cpu =
|
||||
readl_relaxed(base + OMAP_AUX_CORE_BOOT_0) >> 5;
|
||||
|
|
|
@ -64,6 +64,7 @@
|
|||
#include "prm-regbits-44xx.h"
|
||||
|
||||
static void __iomem *sar_base;
|
||||
static u32 old_cpu1_ns_pa_addr;
|
||||
|
||||
#if defined(CONFIG_PM) && defined(CONFIG_SMP)
|
||||
|
||||
|
@ -212,6 +213,11 @@ static void __init save_l2x0_context(void)
|
|||
{}
|
||||
#endif
|
||||
|
||||
u32 omap4_get_cpu1_ns_pa_addr(void)
|
||||
{
|
||||
return old_cpu1_ns_pa_addr;
|
||||
}
|
||||
|
||||
/**
|
||||
* omap4_enter_lowpower: OMAP4 MPUSS Low Power Entry Function
|
||||
* The purpose of this function is to manage low power programming
|
||||
|
@ -460,22 +466,30 @@ int __init omap4_mpuss_init(void)
|
|||
void __init omap4_mpuss_early_init(void)
|
||||
{
|
||||
unsigned long startup_pa;
|
||||
void __iomem *ns_pa_addr;
|
||||
|
||||
if (!(cpu_is_omap44xx() || soc_is_omap54xx()))
|
||||
if (!(soc_is_omap44xx() || soc_is_omap54xx()))
|
||||
return;
|
||||
|
||||
sar_base = omap4_get_sar_ram_base();
|
||||
|
||||
if (cpu_is_omap443x())
|
||||
/* Save old NS_PA_ADDR for validity checks later on */
|
||||
if (soc_is_omap44xx())
|
||||
ns_pa_addr = sar_base + CPU1_WAKEUP_NS_PA_ADDR_OFFSET;
|
||||
else
|
||||
ns_pa_addr = sar_base + OMAP5_CPU1_WAKEUP_NS_PA_ADDR_OFFSET;
|
||||
old_cpu1_ns_pa_addr = readl_relaxed(ns_pa_addr);
|
||||
|
||||
if (soc_is_omap443x())
|
||||
startup_pa = __pa_symbol(omap4_secondary_startup);
|
||||
else if (cpu_is_omap446x())
|
||||
else if (soc_is_omap446x())
|
||||
startup_pa = __pa_symbol(omap4460_secondary_startup);
|
||||
else if ((__boot_cpu_mode & MODE_MASK) == HYP_MODE)
|
||||
startup_pa = __pa_symbol(omap5_secondary_hyp_startup);
|
||||
else
|
||||
startup_pa = __pa_symbol(omap5_secondary_startup);
|
||||
|
||||
if (cpu_is_omap44xx())
|
||||
if (soc_is_omap44xx())
|
||||
writel_relaxed(startup_pa, sar_base +
|
||||
CPU1_WAKEUP_NS_PA_ADDR_OFFSET);
|
||||
else
|
||||
|
|
|
@ -94,6 +94,5 @@ ENTRY(omap_read_auxcoreboot0)
|
|||
ldr r12, =0x103
|
||||
dsb
|
||||
smc #0
|
||||
mov r0, r0, lsr #9
|
||||
ldmfd sp!, {r2-r12, pc}
|
||||
ENDPROC(omap_read_auxcoreboot0)
|
||||
|
|
|
@ -21,6 +21,7 @@
|
|||
#include <linux/io.h>
|
||||
#include <linux/irqchip/arm-gic.h>
|
||||
|
||||
#include <asm/sections.h>
|
||||
#include <asm/smp_scu.h>
|
||||
#include <asm/virt.h>
|
||||
|
||||
|
@ -40,10 +41,14 @@
|
|||
|
||||
#define OMAP5_CORE_COUNT 0x2
|
||||
|
||||
#define AUX_CORE_BOOT0_GP_RELEASE 0x020
|
||||
#define AUX_CORE_BOOT0_HS_RELEASE 0x200
|
||||
|
||||
struct omap_smp_config {
|
||||
unsigned long cpu1_rstctrl_pa;
|
||||
void __iomem *cpu1_rstctrl_va;
|
||||
void __iomem *scu_base;
|
||||
void __iomem *wakeupgen_base;
|
||||
void *startup_addr;
|
||||
};
|
||||
|
||||
|
@ -140,7 +145,6 @@ static int omap4_boot_secondary(unsigned int cpu, struct task_struct *idle)
|
|||
static struct clockdomain *cpu1_clkdm;
|
||||
static bool booted;
|
||||
static struct powerdomain *cpu1_pwrdm;
|
||||
void __iomem *base = omap_get_wakeupgen_base();
|
||||
|
||||
/*
|
||||
* Set synchronisation state between this boot processor
|
||||
|
@ -155,9 +159,11 @@ static int omap4_boot_secondary(unsigned int cpu, struct task_struct *idle)
|
|||
* A barrier is added to ensure that write buffer is drained
|
||||
*/
|
||||
if (omap_secure_apis_support())
|
||||
omap_modify_auxcoreboot0(0x200, 0xfffffdff);
|
||||
omap_modify_auxcoreboot0(AUX_CORE_BOOT0_HS_RELEASE,
|
||||
0xfffffdff);
|
||||
else
|
||||
writel_relaxed(0x20, base + OMAP_AUX_CORE_BOOT_0);
|
||||
writel_relaxed(AUX_CORE_BOOT0_GP_RELEASE,
|
||||
cfg.wakeupgen_base + OMAP_AUX_CORE_BOOT_0);
|
||||
|
||||
if (!cpu1_clkdm && !cpu1_pwrdm) {
|
||||
cpu1_clkdm = clkdm_lookup("mpu1_clkdm");
|
||||
|
@ -261,9 +267,72 @@ static void __init omap4_smp_init_cpus(void)
|
|||
set_cpu_possible(i, true);
|
||||
}
|
||||
|
||||
/*
|
||||
* For now, just make sure the start-up address is not within the booting
|
||||
* kernel space as that means we just overwrote whatever secondary_startup()
|
||||
* code there was.
|
||||
*/
|
||||
static bool __init omap4_smp_cpu1_startup_valid(unsigned long addr)
|
||||
{
|
||||
if ((addr >= __pa(PAGE_OFFSET)) && (addr <= __pa(__bss_start)))
|
||||
return false;
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
/*
|
||||
* We may need to reset CPU1 before configuring, otherwise kexec boot can end
|
||||
* up trying to use old kernel startup address or suspend-resume will
|
||||
* occasionally fail to bring up CPU1 on 4430 if CPU1 fails to enter deeper
|
||||
* idle states.
|
||||
*/
|
||||
static void __init omap4_smp_maybe_reset_cpu1(struct omap_smp_config *c)
|
||||
{
|
||||
unsigned long cpu1_startup_pa, cpu1_ns_pa_addr;
|
||||
bool needs_reset = false;
|
||||
u32 released;
|
||||
|
||||
if (omap_secure_apis_support())
|
||||
released = omap_read_auxcoreboot0() & AUX_CORE_BOOT0_HS_RELEASE;
|
||||
else
|
||||
released = readl_relaxed(cfg.wakeupgen_base +
|
||||
OMAP_AUX_CORE_BOOT_0) &
|
||||
AUX_CORE_BOOT0_GP_RELEASE;
|
||||
if (released) {
|
||||
pr_warn("smp: CPU1 not parked?\n");
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
cpu1_startup_pa = readl_relaxed(cfg.wakeupgen_base +
|
||||
OMAP_AUX_CORE_BOOT_1);
|
||||
cpu1_ns_pa_addr = omap4_get_cpu1_ns_pa_addr();
|
||||
|
||||
/* Did the configured secondary_startup() get overwritten? */
|
||||
if (!omap4_smp_cpu1_startup_valid(cpu1_startup_pa))
|
||||
needs_reset = true;
|
||||
|
||||
/*
|
||||
* If omap4 or 5 has NS_PA_ADDR configured, CPU1 may be in a
|
||||
* deeper idle state in WFI and will wake to an invalid address.
|
||||
*/
|
||||
if ((soc_is_omap44xx() || soc_is_omap54xx()) &&
|
||||
!omap4_smp_cpu1_startup_valid(cpu1_ns_pa_addr))
|
||||
needs_reset = true;
|
||||
|
||||
if (!needs_reset || !c->cpu1_rstctrl_va)
|
||||
return;
|
||||
|
||||
pr_info("smp: CPU1 parked within kernel, needs reset (0x%lx 0x%lx)\n",
|
||||
cpu1_startup_pa, cpu1_ns_pa_addr);
|
||||
|
||||
writel_relaxed(1, c->cpu1_rstctrl_va);
|
||||
readl_relaxed(c->cpu1_rstctrl_va);
|
||||
writel_relaxed(0, c->cpu1_rstctrl_va);
|
||||
}
|
||||
|
||||
static void __init omap4_smp_prepare_cpus(unsigned int max_cpus)
|
||||
{
|
||||
void __iomem *base = omap_get_wakeupgen_base();
|
||||
const struct omap_smp_config *c = NULL;
|
||||
|
||||
if (soc_is_omap443x())
|
||||
|
@ -281,6 +350,7 @@ static void __init omap4_smp_prepare_cpus(unsigned int max_cpus)
|
|||
/* Must preserve cfg.scu_base set earlier */
|
||||
cfg.cpu1_rstctrl_pa = c->cpu1_rstctrl_pa;
|
||||
cfg.startup_addr = c->startup_addr;
|
||||
cfg.wakeupgen_base = omap_get_wakeupgen_base();
|
||||
|
||||
if (soc_is_dra74x() || soc_is_omap54xx()) {
|
||||
if ((__boot_cpu_mode & MODE_MASK) == HYP_MODE)
|
||||
|
@ -299,15 +369,7 @@ static void __init omap4_smp_prepare_cpus(unsigned int max_cpus)
|
|||
if (cfg.scu_base)
|
||||
scu_enable(cfg.scu_base);
|
||||
|
||||
/*
|
||||
* Reset CPU1 before configuring, otherwise kexec will
|
||||
* end up trying to use old kernel startup address.
|
||||
*/
|
||||
if (cfg.cpu1_rstctrl_va) {
|
||||
writel_relaxed(1, cfg.cpu1_rstctrl_va);
|
||||
readl_relaxed(cfg.cpu1_rstctrl_va);
|
||||
writel_relaxed(0, cfg.cpu1_rstctrl_va);
|
||||
}
|
||||
omap4_smp_maybe_reset_cpu1(&cfg);
|
||||
|
||||
/*
|
||||
* Write the address of secondary startup routine into the
|
||||
|
@ -319,7 +381,7 @@ static void __init omap4_smp_prepare_cpus(unsigned int max_cpus)
|
|||
omap_auxcoreboot_addr(__pa_symbol(cfg.startup_addr));
|
||||
else
|
||||
writel_relaxed(__pa_symbol(cfg.startup_addr),
|
||||
base + OMAP_AUX_CORE_BOOT_1);
|
||||
cfg.wakeupgen_base + OMAP_AUX_CORE_BOOT_1);
|
||||
}
|
||||
|
||||
const struct smp_operations omap4_smp_ops __initconst = {
|
||||
|
|
|
@ -222,6 +222,14 @@ static int _omap_device_notifier_call(struct notifier_block *nb,
|
|||
dev_err(dev, "failed to idle\n");
|
||||
}
|
||||
break;
|
||||
case BUS_NOTIFY_BIND_DRIVER:
|
||||
od = to_omap_device(pdev);
|
||||
if (od && (od->_state == OMAP_DEVICE_STATE_ENABLED) &&
|
||||
pm_runtime_status_suspended(dev)) {
|
||||
od->_driver_status = BUS_NOTIFY_BIND_DRIVER;
|
||||
pm_runtime_set_active(dev);
|
||||
}
|
||||
break;
|
||||
case BUS_NOTIFY_ADD_DEVICE:
|
||||
if (pdev->dev.of_node)
|
||||
omap_device_build_from_dt(pdev);
|
||||
|
|
|
@ -2112,11 +2112,20 @@ static struct omap_hwmod_ocp_if omap3_l4_core__i2c3 = {
|
|||
};
|
||||
|
||||
/* L4 CORE -> SR1 interface */
|
||||
static struct omap_hwmod_addr_space omap3_sr1_addr_space[] = {
|
||||
{
|
||||
.pa_start = OMAP34XX_SR1_BASE,
|
||||
.pa_end = OMAP34XX_SR1_BASE + SZ_1K - 1,
|
||||
.flags = ADDR_TYPE_RT,
|
||||
},
|
||||
{ },
|
||||
};
|
||||
|
||||
static struct omap_hwmod_ocp_if omap34xx_l4_core__sr1 = {
|
||||
.master = &omap3xxx_l4_core_hwmod,
|
||||
.slave = &omap34xx_sr1_hwmod,
|
||||
.clk = "sr_l4_ick",
|
||||
.addr = omap3_sr1_addr_space,
|
||||
.user = OCP_USER_MPU,
|
||||
};
|
||||
|
||||
|
@ -2124,15 +2133,25 @@ static struct omap_hwmod_ocp_if omap36xx_l4_core__sr1 = {
|
|||
.master = &omap3xxx_l4_core_hwmod,
|
||||
.slave = &omap36xx_sr1_hwmod,
|
||||
.clk = "sr_l4_ick",
|
||||
.addr = omap3_sr1_addr_space,
|
||||
.user = OCP_USER_MPU,
|
||||
};
|
||||
|
||||
/* L4 CORE -> SR1 interface */
|
||||
static struct omap_hwmod_addr_space omap3_sr2_addr_space[] = {
|
||||
{
|
||||
.pa_start = OMAP34XX_SR2_BASE,
|
||||
.pa_end = OMAP34XX_SR2_BASE + SZ_1K - 1,
|
||||
.flags = ADDR_TYPE_RT,
|
||||
},
|
||||
{ },
|
||||
};
|
||||
|
||||
static struct omap_hwmod_ocp_if omap34xx_l4_core__sr2 = {
|
||||
.master = &omap3xxx_l4_core_hwmod,
|
||||
.slave = &omap34xx_sr2_hwmod,
|
||||
.clk = "sr_l4_ick",
|
||||
.addr = omap3_sr2_addr_space,
|
||||
.user = OCP_USER_MPU,
|
||||
};
|
||||
|
||||
|
@ -2140,6 +2159,7 @@ static struct omap_hwmod_ocp_if omap36xx_l4_core__sr2 = {
|
|||
.master = &omap3xxx_l4_core_hwmod,
|
||||
.slave = &omap36xx_sr2_hwmod,
|
||||
.clk = "sr_l4_ick",
|
||||
.addr = omap3_sr2_addr_space,
|
||||
.user = OCP_USER_MPU,
|
||||
};
|
||||
|
||||
|
@ -3111,16 +3131,20 @@ static struct omap_hwmod_ocp_if *omap3xxx_dss_hwmod_ocp_ifs[] __initdata = {
|
|||
* Return: 0 if device named @dev_name is not likely to be accessible,
|
||||
* or 1 if it is likely to be accessible.
|
||||
*/
|
||||
static int __init omap3xxx_hwmod_is_hs_ip_block_usable(struct device_node *bus,
|
||||
static bool __init omap3xxx_hwmod_is_hs_ip_block_usable(struct device_node *bus,
|
||||
const char *dev_name)
|
||||
{
|
||||
struct device_node *node;
|
||||
bool available;
|
||||
|
||||
if (!bus)
|
||||
return (omap_type() == OMAP2_DEVICE_TYPE_GP) ? 1 : 0;
|
||||
return omap_type() == OMAP2_DEVICE_TYPE_GP;
|
||||
|
||||
if (of_device_is_available(of_find_node_by_name(bus, dev_name)))
|
||||
return 1;
|
||||
node = of_get_child_by_name(bus, dev_name);
|
||||
available = of_device_is_available(node);
|
||||
of_node_put(node);
|
||||
|
||||
return 0;
|
||||
return available;
|
||||
}
|
||||
|
||||
int __init omap3xxx_hwmod_init(void)
|
||||
|
@ -3189,15 +3213,20 @@ int __init omap3xxx_hwmod_init(void)
|
|||
|
||||
if (h_sham && omap3xxx_hwmod_is_hs_ip_block_usable(bus, "sham")) {
|
||||
r = omap_hwmod_register_links(h_sham);
|
||||
if (r < 0)
|
||||
if (r < 0) {
|
||||
of_node_put(bus);
|
||||
return r;
|
||||
}
|
||||
}
|
||||
|
||||
if (h_aes && omap3xxx_hwmod_is_hs_ip_block_usable(bus, "aes")) {
|
||||
r = omap_hwmod_register_links(h_aes);
|
||||
if (r < 0)
|
||||
if (r < 0) {
|
||||
of_node_put(bus);
|
||||
return r;
|
||||
}
|
||||
}
|
||||
of_node_put(bus);
|
||||
|
||||
/*
|
||||
* Register hwmod links specific to certain ES levels of a
|
||||
|
|
|
@ -6,6 +6,7 @@ menuconfig ARCH_ORION5X
|
|||
select GPIOLIB
|
||||
select MVEBU_MBUS
|
||||
select PCI
|
||||
select PHYLIB if NETDEVICES
|
||||
select PLAT_ORION_LEGACY
|
||||
help
|
||||
Support for the following Marvell Orion 5x series SoCs:
|
||||
|
|
|
@ -935,13 +935,31 @@ static void arm_coherent_dma_free(struct device *dev, size_t size, void *cpu_add
|
|||
__arm_dma_free(dev, size, cpu_addr, handle, attrs, true);
|
||||
}
|
||||
|
||||
/*
|
||||
* The whole dma_get_sgtable() idea is fundamentally unsafe - it seems
|
||||
* that the intention is to allow exporting memory allocated via the
|
||||
* coherent DMA APIs through the dma_buf API, which only accepts a
|
||||
* scattertable. This presents a couple of problems:
|
||||
* 1. Not all memory allocated via the coherent DMA APIs is backed by
|
||||
* a struct page
|
||||
* 2. Passing coherent DMA memory into the streaming APIs is not allowed
|
||||
* as we will try to flush the memory through a different alias to that
|
||||
* actually being used (and the flushes are redundant.)
|
||||
*/
|
||||
int arm_dma_get_sgtable(struct device *dev, struct sg_table *sgt,
|
||||
void *cpu_addr, dma_addr_t handle, size_t size,
|
||||
unsigned long attrs)
|
||||
{
|
||||
struct page *page = pfn_to_page(dma_to_pfn(dev, handle));
|
||||
unsigned long pfn = dma_to_pfn(dev, handle);
|
||||
struct page *page;
|
||||
int ret;
|
||||
|
||||
/* If the PFN is not valid, we do not have a struct page */
|
||||
if (!pfn_valid(pfn))
|
||||
return -ENXIO;
|
||||
|
||||
page = pfn_to_page(pfn);
|
||||
|
||||
ret = sg_alloc_table(sgt, 1, GFP_KERNEL);
|
||||
if (unlikely(ret))
|
||||
return ret;
|
||||
|
@ -2390,6 +2408,15 @@ void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size,
|
|||
const struct dma_map_ops *dma_ops;
|
||||
|
||||
dev->archdata.dma_coherent = coherent;
|
||||
|
||||
/*
|
||||
* Don't override the dma_ops if they have already been set. Ideally
|
||||
* this should be the only location where dma_ops are set, remove this
|
||||
* check when all other callers of set_dma_ops will have disappeared.
|
||||
*/
|
||||
if (dev->dma_ops)
|
||||
return;
|
||||
|
||||
if (arm_setup_iommu_dma_ops(dev, dma_base, size, iommu))
|
||||
dma_ops = arm_get_iommu_dma_map_ops(coherent);
|
||||
else
|
||||
|
|
|
@ -303,7 +303,10 @@ static inline void set_vbar(unsigned long val)
|
|||
*/
|
||||
static inline bool security_extensions_enabled(void)
|
||||
{
|
||||
/* Check CPUID Identification Scheme before ID_PFR1 read */
|
||||
if ((read_cpuid_id() & 0x000f0000) == 0x000f0000)
|
||||
return !!cpuid_feature_extract(CPUID_EXT_PFR1, 4);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static unsigned long __init setup_vectors_base(void)
|
||||
|
|
|
@ -468,6 +468,7 @@ void __init orion_ge11_init(struct mv643xx_eth_platform_data *eth_data,
|
|||
eth_data, &orion_ge11);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_ARCH_ORION5X
|
||||
/*****************************************************************************
|
||||
* Ethernet switch
|
||||
****************************************************************************/
|
||||
|
@ -480,6 +481,9 @@ void __init orion_ge00_switch_init(struct dsa_chip_data *d)
|
|||
struct mdio_board_info *bd;
|
||||
unsigned int i;
|
||||
|
||||
if (!IS_BUILTIN(CONFIG_PHYLIB))
|
||||
return;
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(d->port_names); i++)
|
||||
if (!strcmp(d->port_names[i], "cpu"))
|
||||
break;
|
||||
|
@ -493,6 +497,7 @@ void __init orion_ge00_switch_init(struct dsa_chip_data *d)
|
|||
|
||||
mdiobus_register_board_info(&orion_ge00_switch_board_info, 1);
|
||||
}
|
||||
#endif
|
||||
|
||||
/*****************************************************************************
|
||||
* I2C
|
||||
|
|
|
@ -266,11 +266,20 @@ void __kprobes kprobe_handler(struct pt_regs *regs)
|
|||
#endif
|
||||
|
||||
if (p) {
|
||||
if (cur) {
|
||||
if (!p->ainsn.insn_check_cc(regs->ARM_cpsr)) {
|
||||
/*
|
||||
* Probe hit but conditional execution check failed,
|
||||
* so just skip the instruction and continue as if
|
||||
* nothing had happened.
|
||||
* In this case, we can skip recursing check too.
|
||||
*/
|
||||
singlestep_skip(p, regs);
|
||||
} else if (cur) {
|
||||
/* Kprobe is pending, so we're recursing. */
|
||||
switch (kcb->kprobe_status) {
|
||||
case KPROBE_HIT_ACTIVE:
|
||||
case KPROBE_HIT_SSDONE:
|
||||
case KPROBE_HIT_SS:
|
||||
/* A pre- or post-handler probe got us here. */
|
||||
kprobes_inc_nmissed_count(p);
|
||||
save_previous_kprobe(kcb);
|
||||
|
@ -279,11 +288,16 @@ void __kprobes kprobe_handler(struct pt_regs *regs)
|
|||
singlestep(p, regs, kcb);
|
||||
restore_previous_kprobe(kcb);
|
||||
break;
|
||||
case KPROBE_REENTER:
|
||||
/* A nested probe was hit in FIQ, it is a BUG */
|
||||
pr_warn("Unrecoverable kprobe detected at %p.\n",
|
||||
p->addr);
|
||||
/* fall through */
|
||||
default:
|
||||
/* impossible cases */
|
||||
BUG();
|
||||
}
|
||||
} else if (p->ainsn.insn_check_cc(regs->ARM_cpsr)) {
|
||||
} else {
|
||||
/* Probe hit and conditional execution check ok. */
|
||||
set_current_kprobe(p);
|
||||
kcb->kprobe_status = KPROBE_HIT_ACTIVE;
|
||||
|
@ -304,13 +318,6 @@ void __kprobes kprobe_handler(struct pt_regs *regs)
|
|||
}
|
||||
reset_current_kprobe();
|
||||
}
|
||||
} else {
|
||||
/*
|
||||
* Probe hit but conditional execution check failed,
|
||||
* so just skip the instruction and continue as if
|
||||
* nothing had happened.
|
||||
*/
|
||||
singlestep_skip(p, regs);
|
||||
}
|
||||
} else if (cur) {
|
||||
/* We probably hit a jprobe. Call its break handler. */
|
||||
|
@ -434,6 +441,7 @@ static __used __kprobes void *trampoline_handler(struct pt_regs *regs)
|
|||
struct hlist_node *tmp;
|
||||
unsigned long flags, orig_ret_address = 0;
|
||||
unsigned long trampoline_address = (unsigned long)&kretprobe_trampoline;
|
||||
kprobe_opcode_t *correct_ret_addr = NULL;
|
||||
|
||||
INIT_HLIST_HEAD(&empty_rp);
|
||||
kretprobe_hash_lock(current, &head, &flags);
|
||||
|
@ -456,15 +464,7 @@ static __used __kprobes void *trampoline_handler(struct pt_regs *regs)
|
|||
/* another task is sharing our hash bucket */
|
||||
continue;
|
||||
|
||||
if (ri->rp && ri->rp->handler) {
|
||||
__this_cpu_write(current_kprobe, &ri->rp->kp);
|
||||
get_kprobe_ctlblk()->kprobe_status = KPROBE_HIT_ACTIVE;
|
||||
ri->rp->handler(ri, regs);
|
||||
__this_cpu_write(current_kprobe, NULL);
|
||||
}
|
||||
|
||||
orig_ret_address = (unsigned long)ri->ret_addr;
|
||||
recycle_rp_inst(ri, &empty_rp);
|
||||
|
||||
if (orig_ret_address != trampoline_address)
|
||||
/*
|
||||
|
@ -476,6 +476,33 @@ static __used __kprobes void *trampoline_handler(struct pt_regs *regs)
|
|||
}
|
||||
|
||||
kretprobe_assert(ri, orig_ret_address, trampoline_address);
|
||||
|
||||
correct_ret_addr = ri->ret_addr;
|
||||
hlist_for_each_entry_safe(ri, tmp, head, hlist) {
|
||||
if (ri->task != current)
|
||||
/* another task is sharing our hash bucket */
|
||||
continue;
|
||||
|
||||
orig_ret_address = (unsigned long)ri->ret_addr;
|
||||
if (ri->rp && ri->rp->handler) {
|
||||
__this_cpu_write(current_kprobe, &ri->rp->kp);
|
||||
get_kprobe_ctlblk()->kprobe_status = KPROBE_HIT_ACTIVE;
|
||||
ri->ret_addr = correct_ret_addr;
|
||||
ri->rp->handler(ri, regs);
|
||||
__this_cpu_write(current_kprobe, NULL);
|
||||
}
|
||||
|
||||
recycle_rp_inst(ri, &empty_rp);
|
||||
|
||||
if (orig_ret_address != trampoline_address)
|
||||
/*
|
||||
* This is the real return address. Any other
|
||||
* instances associated with this task are for
|
||||
* other calls deeper on the call stack
|
||||
*/
|
||||
break;
|
||||
}
|
||||
|
||||
kretprobe_hash_unlock(current, &flags);
|
||||
|
||||
hlist_for_each_entry_safe(ri, tmp, &empty_rp, hlist) {
|
||||
|
|
|
@ -977,7 +977,10 @@ static void coverage_end(void)
|
|||
void __naked __kprobes_test_case_start(void)
|
||||
{
|
||||
__asm__ __volatile__ (
|
||||
"stmdb sp!, {r4-r11} \n\t"
|
||||
"mov r2, sp \n\t"
|
||||
"bic r3, r2, #7 \n\t"
|
||||
"mov sp, r3 \n\t"
|
||||
"stmdb sp!, {r2-r11} \n\t"
|
||||
"sub sp, sp, #"__stringify(TEST_MEMORY_SIZE)"\n\t"
|
||||
"bic r0, lr, #1 @ r0 = inline data \n\t"
|
||||
"mov r1, sp \n\t"
|
||||
|
@ -997,7 +1000,8 @@ void __naked __kprobes_test_case_end_32(void)
|
|||
"movne pc, r0 \n\t"
|
||||
"mov r0, r4 \n\t"
|
||||
"add sp, sp, #"__stringify(TEST_MEMORY_SIZE)"\n\t"
|
||||
"ldmia sp!, {r4-r11} \n\t"
|
||||
"ldmia sp!, {r2-r11} \n\t"
|
||||
"mov sp, r2 \n\t"
|
||||
"mov pc, r0 \n\t"
|
||||
);
|
||||
}
|
||||
|
@ -1013,7 +1017,8 @@ void __naked __kprobes_test_case_end_16(void)
|
|||
"bxne r0 \n\t"
|
||||
"mov r0, r4 \n\t"
|
||||
"add sp, sp, #"__stringify(TEST_MEMORY_SIZE)"\n\t"
|
||||
"ldmia sp!, {r4-r11} \n\t"
|
||||
"ldmia sp!, {r2-r11} \n\t"
|
||||
"mov sp, r2 \n\t"
|
||||
"bx r0 \n\t"
|
||||
);
|
||||
}
|
||||
|
|
|
@ -179,8 +179,10 @@
|
|||
usbphy: phy@01c19400 {
|
||||
compatible = "allwinner,sun50i-a64-usb-phy";
|
||||
reg = <0x01c19400 0x14>,
|
||||
<0x01c1a800 0x4>,
|
||||
<0x01c1b800 0x4>;
|
||||
reg-names = "phy_ctrl",
|
||||
"pmu0",
|
||||
"pmu1";
|
||||
clocks = <&ccu CLK_USB_PHY0>,
|
||||
<&ccu CLK_USB_PHY1>;
|
||||
|
|
|
@ -114,6 +114,7 @@
|
|||
pcie0: pcie@20020000 {
|
||||
compatible = "brcm,iproc-pcie";
|
||||
reg = <0 0x20020000 0 0x1000>;
|
||||
dma-coherent;
|
||||
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-map-mask = <0 0 0 0>;
|
||||
|
@ -144,6 +145,7 @@
|
|||
pcie4: pcie@50020000 {
|
||||
compatible = "brcm,iproc-pcie";
|
||||
reg = <0 0x50020000 0 0x1000>;
|
||||
dma-coherent;
|
||||
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-map-mask = <0 0 0 0>;
|
||||
|
@ -174,6 +176,7 @@
|
|||
pcie8: pcie@60c00000 {
|
||||
compatible = "brcm,iproc-pcie-paxc";
|
||||
reg = <0 0x60c00000 0 0x1000>;
|
||||
dma-coherent;
|
||||
linux,pci-domain = <8>;
|
||||
|
||||
bus-range = <0x0 0x1>;
|
||||
|
@ -203,6 +206,7 @@
|
|||
<0x61030000 0x100>;
|
||||
reg-names = "amac_base", "idm_base", "nicpm_base";
|
||||
interrupts = <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>;
|
||||
dma-coherent;
|
||||
phy-handle = <&gphy0>;
|
||||
phy-mode = "rgmii";
|
||||
status = "disabled";
|
||||
|
@ -213,6 +217,7 @@
|
|||
reg = <0x612c0000 0x445>; /* PDC FS0 regs */
|
||||
interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#mbox-cells = <1>;
|
||||
dma-coherent;
|
||||
brcm,rx-status-len = <32>;
|
||||
brcm,use-bcm-hdr;
|
||||
};
|
||||
|
@ -222,6 +227,7 @@
|
|||
reg = <0x612e0000 0x445>; /* PDC FS1 regs */
|
||||
interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#mbox-cells = <1>;
|
||||
dma-coherent;
|
||||
brcm,rx-status-len = <32>;
|
||||
brcm,use-bcm-hdr;
|
||||
};
|
||||
|
@ -231,6 +237,7 @@
|
|||
reg = <0x61300000 0x445>; /* PDC FS2 regs */
|
||||
interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#mbox-cells = <1>;
|
||||
dma-coherent;
|
||||
brcm,rx-status-len = <32>;
|
||||
brcm,use-bcm-hdr;
|
||||
};
|
||||
|
@ -240,6 +247,7 @@
|
|||
reg = <0x61320000 0x445>; /* PDC FS3 regs */
|
||||
interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#mbox-cells = <1>;
|
||||
dma-coherent;
|
||||
brcm,rx-status-len = <32>;
|
||||
brcm,use-bcm-hdr;
|
||||
};
|
||||
|
@ -644,6 +652,7 @@
|
|||
sata: ahci@663f2000 {
|
||||
compatible = "brcm,iproc-ahci", "generic-ahci";
|
||||
reg = <0x663f2000 0x1000>;
|
||||
dma-coherent;
|
||||
reg-names = "ahci";
|
||||
interrupts = <GIC_SPI 438 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#address-cells = <1>;
|
||||
|
@ -667,6 +676,7 @@
|
|||
compatible = "brcm,sdhci-iproc-cygnus";
|
||||
reg = <0x66420000 0x100>;
|
||||
interrupts = <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>;
|
||||
dma-coherent;
|
||||
bus-width = <8>;
|
||||
clocks = <&genpll_sw BCM_NS2_GENPLL_SW_SDIO_CLK>;
|
||||
status = "disabled";
|
||||
|
@ -676,6 +686,7 @@
|
|||
compatible = "brcm,sdhci-iproc-cygnus";
|
||||
reg = <0x66430000 0x100>;
|
||||
interrupts = <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>;
|
||||
dma-coherent;
|
||||
bus-width = <8>;
|
||||
clocks = <&genpll_sw BCM_NS2_GENPLL_SW_SDIO_CLK>;
|
||||
status = "disabled";
|
||||
|
|
|
@ -3,8 +3,6 @@
|
|||
|
||||
#include <linux/compiler.h>
|
||||
|
||||
#include <asm/sysreg.h>
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
struct task_struct;
|
||||
|
|
|
@ -44,7 +44,7 @@
|
|||
#define __ARM_NR_compat_cacheflush (__ARM_NR_COMPAT_BASE+2)
|
||||
#define __ARM_NR_compat_set_tls (__ARM_NR_COMPAT_BASE+5)
|
||||
|
||||
#define __NR_compat_syscalls 394
|
||||
#define __NR_compat_syscalls 398
|
||||
#endif
|
||||
|
||||
#define __ARCH_WANT_SYS_CLONE
|
||||
|
|
|
@ -809,6 +809,14 @@ __SYSCALL(__NR_copy_file_range, sys_copy_file_range)
|
|||
__SYSCALL(__NR_preadv2, compat_sys_preadv2)
|
||||
#define __NR_pwritev2 393
|
||||
__SYSCALL(__NR_pwritev2, compat_sys_pwritev2)
|
||||
#define __NR_pkey_mprotect 394
|
||||
__SYSCALL(__NR_pkey_mprotect, sys_pkey_mprotect)
|
||||
#define __NR_pkey_alloc 395
|
||||
__SYSCALL(__NR_pkey_alloc, sys_pkey_alloc)
|
||||
#define __NR_pkey_free 396
|
||||
__SYSCALL(__NR_pkey_free, sys_pkey_free)
|
||||
#define __NR_statx 397
|
||||
__SYSCALL(__NR_statx, sys_statx)
|
||||
|
||||
/*
|
||||
* Please add new compat syscalls above this comment and update
|
||||
|
|
|
@ -131,11 +131,15 @@ u64 __init kaslr_early_init(u64 dt_phys, u64 modulo_offset)
|
|||
/*
|
||||
* The kernel Image should not extend across a 1GB/32MB/512MB alignment
|
||||
* boundary (for 4KB/16KB/64KB granule kernels, respectively). If this
|
||||
* happens, increase the KASLR offset by the size of the kernel image.
|
||||
* happens, increase the KASLR offset by the size of the kernel image
|
||||
* rounded up by SWAPPER_BLOCK_SIZE.
|
||||
*/
|
||||
if ((((u64)_text + offset + modulo_offset) >> SWAPPER_TABLE_SHIFT) !=
|
||||
(((u64)_end + offset + modulo_offset) >> SWAPPER_TABLE_SHIFT))
|
||||
offset = (offset + (u64)(_end - _text)) & mask;
|
||||
(((u64)_end + offset + modulo_offset) >> SWAPPER_TABLE_SHIFT)) {
|
||||
u64 kimg_sz = _end - _text;
|
||||
offset = (offset + round_up(kimg_sz, SWAPPER_BLOCK_SIZE))
|
||||
& mask;
|
||||
}
|
||||
|
||||
if (IS_ENABLED(CONFIG_KASAN))
|
||||
/*
|
||||
|
|
|
@ -944,7 +944,7 @@ static bool have_cpu_die(void)
|
|||
#ifdef CONFIG_HOTPLUG_CPU
|
||||
int any_cpu = raw_smp_processor_id();
|
||||
|
||||
if (cpu_ops[any_cpu]->cpu_die)
|
||||
if (cpu_ops[any_cpu] && cpu_ops[any_cpu]->cpu_die)
|
||||
return true;
|
||||
#endif
|
||||
return false;
|
||||
|
|
|
@ -1,2 +1 @@
|
|||
vdso.lds
|
||||
vdso-offsets.h
|
||||
|
|
|
@ -28,6 +28,7 @@
|
|||
#include <linux/dma-contiguous.h>
|
||||
#include <linux/vmalloc.h>
|
||||
#include <linux/swiotlb.h>
|
||||
#include <linux/pci.h>
|
||||
|
||||
#include <asm/cacheflush.h>
|
||||
|
||||
|
@ -813,34 +814,26 @@ static const struct dma_map_ops iommu_dma_ops = {
|
|||
.mapping_error = iommu_dma_mapping_error,
|
||||
};
|
||||
|
||||
/*
|
||||
* TODO: Right now __iommu_setup_dma_ops() gets called too early to do
|
||||
* everything it needs to - the device is only partially created and the
|
||||
* IOMMU driver hasn't seen it yet, so it can't have a group. Thus we
|
||||
* need this delayed attachment dance. Once IOMMU probe ordering is sorted
|
||||
* to move the arch_setup_dma_ops() call later, all the notifier bits below
|
||||
* become unnecessary, and will go away.
|
||||
*/
|
||||
struct iommu_dma_notifier_data {
|
||||
struct list_head list;
|
||||
struct device *dev;
|
||||
const struct iommu_ops *ops;
|
||||
u64 dma_base;
|
||||
u64 size;
|
||||
};
|
||||
static LIST_HEAD(iommu_dma_masters);
|
||||
static DEFINE_MUTEX(iommu_dma_notifier_lock);
|
||||
|
||||
static bool do_iommu_attach(struct device *dev, const struct iommu_ops *ops,
|
||||
u64 dma_base, u64 size)
|
||||
static int __init __iommu_dma_init(void)
|
||||
{
|
||||
struct iommu_domain *domain = iommu_get_domain_for_dev(dev);
|
||||
return iommu_dma_init();
|
||||
}
|
||||
arch_initcall(__iommu_dma_init);
|
||||
|
||||
static void __iommu_setup_dma_ops(struct device *dev, u64 dma_base, u64 size,
|
||||
const struct iommu_ops *ops)
|
||||
{
|
||||
struct iommu_domain *domain;
|
||||
|
||||
if (!ops)
|
||||
return;
|
||||
|
||||
/*
|
||||
* If the IOMMU driver has the DMA domain support that we require,
|
||||
* then the IOMMU core will have already configured a group for this
|
||||
* device, and allocated the default domain for that group.
|
||||
* The IOMMU core code allocates the default DMA domain, which the
|
||||
* underlying IOMMU driver needs to support via the dma-iommu layer.
|
||||
*/
|
||||
domain = iommu_get_domain_for_dev(dev);
|
||||
|
||||
if (!domain)
|
||||
goto out_err;
|
||||
|
||||
|
@ -851,109 +844,11 @@ static bool do_iommu_attach(struct device *dev, const struct iommu_ops *ops,
|
|||
dev->dma_ops = &iommu_dma_ops;
|
||||
}
|
||||
|
||||
return true;
|
||||
return;
|
||||
|
||||
out_err:
|
||||
pr_warn("Failed to set up IOMMU for device %s; retaining platform DMA ops\n",
|
||||
dev_name(dev));
|
||||
return false;
|
||||
}
|
||||
|
||||
static void queue_iommu_attach(struct device *dev, const struct iommu_ops *ops,
|
||||
u64 dma_base, u64 size)
|
||||
{
|
||||
struct iommu_dma_notifier_data *iommudata;
|
||||
|
||||
iommudata = kzalloc(sizeof(*iommudata), GFP_KERNEL);
|
||||
if (!iommudata)
|
||||
return;
|
||||
|
||||
iommudata->dev = dev;
|
||||
iommudata->ops = ops;
|
||||
iommudata->dma_base = dma_base;
|
||||
iommudata->size = size;
|
||||
|
||||
mutex_lock(&iommu_dma_notifier_lock);
|
||||
list_add(&iommudata->list, &iommu_dma_masters);
|
||||
mutex_unlock(&iommu_dma_notifier_lock);
|
||||
}
|
||||
|
||||
static int __iommu_attach_notifier(struct notifier_block *nb,
|
||||
unsigned long action, void *data)
|
||||
{
|
||||
struct iommu_dma_notifier_data *master, *tmp;
|
||||
|
||||
if (action != BUS_NOTIFY_BIND_DRIVER)
|
||||
return 0;
|
||||
|
||||
mutex_lock(&iommu_dma_notifier_lock);
|
||||
list_for_each_entry_safe(master, tmp, &iommu_dma_masters, list) {
|
||||
if (data == master->dev && do_iommu_attach(master->dev,
|
||||
master->ops, master->dma_base, master->size)) {
|
||||
list_del(&master->list);
|
||||
kfree(master);
|
||||
break;
|
||||
}
|
||||
}
|
||||
mutex_unlock(&iommu_dma_notifier_lock);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int __init register_iommu_dma_ops_notifier(struct bus_type *bus)
|
||||
{
|
||||
struct notifier_block *nb = kzalloc(sizeof(*nb), GFP_KERNEL);
|
||||
int ret;
|
||||
|
||||
if (!nb)
|
||||
return -ENOMEM;
|
||||
|
||||
nb->notifier_call = __iommu_attach_notifier;
|
||||
|
||||
ret = bus_register_notifier(bus, nb);
|
||||
if (ret) {
|
||||
pr_warn("Failed to register DMA domain notifier; IOMMU DMA ops unavailable on bus '%s'\n",
|
||||
bus->name);
|
||||
kfree(nb);
|
||||
}
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int __init __iommu_dma_init(void)
|
||||
{
|
||||
int ret;
|
||||
|
||||
ret = iommu_dma_init();
|
||||
if (!ret)
|
||||
ret = register_iommu_dma_ops_notifier(&platform_bus_type);
|
||||
if (!ret)
|
||||
ret = register_iommu_dma_ops_notifier(&amba_bustype);
|
||||
#ifdef CONFIG_PCI
|
||||
if (!ret)
|
||||
ret = register_iommu_dma_ops_notifier(&pci_bus_type);
|
||||
#endif
|
||||
return ret;
|
||||
}
|
||||
arch_initcall(__iommu_dma_init);
|
||||
|
||||
static void __iommu_setup_dma_ops(struct device *dev, u64 dma_base, u64 size,
|
||||
const struct iommu_ops *ops)
|
||||
{
|
||||
struct iommu_group *group;
|
||||
|
||||
if (!ops)
|
||||
return;
|
||||
/*
|
||||
* TODO: As a concession to the future, we're ready to handle being
|
||||
* called both early and late (i.e. after bus_add_device). Once all
|
||||
* the platform bus code is reworked to call us late and the notifier
|
||||
* junk above goes away, move the body of do_iommu_attach here.
|
||||
*/
|
||||
group = iommu_group_get(dev);
|
||||
if (group) {
|
||||
do_iommu_attach(dev, ops, dma_base, size);
|
||||
iommu_group_put(group);
|
||||
} else {
|
||||
queue_iommu_attach(dev, ops, dma_base, size);
|
||||
}
|
||||
}
|
||||
|
||||
void arch_teardown_dma_ops(struct device *dev)
|
||||
|
|
|
@ -42,7 +42,20 @@
|
|||
#include <asm/pgtable.h>
|
||||
#include <asm/tlbflush.h>
|
||||
|
||||
static const char *fault_name(unsigned int esr);
|
||||
struct fault_info {
|
||||
int (*fn)(unsigned long addr, unsigned int esr,
|
||||
struct pt_regs *regs);
|
||||
int sig;
|
||||
int code;
|
||||
const char *name;
|
||||
};
|
||||
|
||||
static const struct fault_info fault_info[];
|
||||
|
||||
static inline const struct fault_info *esr_to_fault_info(unsigned int esr)
|
||||
{
|
||||
return fault_info + (esr & 63);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_KPROBES
|
||||
static inline int notify_page_fault(struct pt_regs *regs, unsigned int esr)
|
||||
|
@ -197,10 +210,12 @@ static void __do_user_fault(struct task_struct *tsk, unsigned long addr,
|
|||
struct pt_regs *regs)
|
||||
{
|
||||
struct siginfo si;
|
||||
const struct fault_info *inf;
|
||||
|
||||
if (unhandled_signal(tsk, sig) && show_unhandled_signals_ratelimited()) {
|
||||
inf = esr_to_fault_info(esr);
|
||||
pr_info("%s[%d]: unhandled %s (%d) at 0x%08lx, esr 0x%03x\n",
|
||||
tsk->comm, task_pid_nr(tsk), fault_name(esr), sig,
|
||||
tsk->comm, task_pid_nr(tsk), inf->name, sig,
|
||||
addr, esr);
|
||||
show_pte(tsk->mm, addr);
|
||||
show_regs(regs);
|
||||
|
@ -219,14 +234,16 @@ static void do_bad_area(unsigned long addr, unsigned int esr, struct pt_regs *re
|
|||
{
|
||||
struct task_struct *tsk = current;
|
||||
struct mm_struct *mm = tsk->active_mm;
|
||||
const struct fault_info *inf;
|
||||
|
||||
/*
|
||||
* If we are in kernel mode at this point, we have no context to
|
||||
* handle this fault with.
|
||||
*/
|
||||
if (user_mode(regs))
|
||||
__do_user_fault(tsk, addr, esr, SIGSEGV, SEGV_MAPERR, regs);
|
||||
else
|
||||
if (user_mode(regs)) {
|
||||
inf = esr_to_fault_info(esr);
|
||||
__do_user_fault(tsk, addr, esr, inf->sig, inf->code, regs);
|
||||
} else
|
||||
__do_kernel_fault(mm, addr, esr, regs);
|
||||
}
|
||||
|
||||
|
@ -488,12 +505,7 @@ static int do_bad(unsigned long addr, unsigned int esr, struct pt_regs *regs)
|
|||
return 1;
|
||||
}
|
||||
|
||||
static const struct fault_info {
|
||||
int (*fn)(unsigned long addr, unsigned int esr, struct pt_regs *regs);
|
||||
int sig;
|
||||
int code;
|
||||
const char *name;
|
||||
} fault_info[] = {
|
||||
static const struct fault_info fault_info[] = {
|
||||
{ do_bad, SIGBUS, 0, "ttbr address size fault" },
|
||||
{ do_bad, SIGBUS, 0, "level 1 address size fault" },
|
||||
{ do_bad, SIGBUS, 0, "level 2 address size fault" },
|
||||
|
@ -560,19 +572,13 @@ static const struct fault_info {
|
|||
{ do_bad, SIGBUS, 0, "unknown 63" },
|
||||
};
|
||||
|
||||
static const char *fault_name(unsigned int esr)
|
||||
{
|
||||
const struct fault_info *inf = fault_info + (esr & 63);
|
||||
return inf->name;
|
||||
}
|
||||
|
||||
/*
|
||||
* Dispatch a data abort to the relevant handler.
|
||||
*/
|
||||
asmlinkage void __exception do_mem_abort(unsigned long addr, unsigned int esr,
|
||||
struct pt_regs *regs)
|
||||
{
|
||||
const struct fault_info *inf = fault_info + (esr & 63);
|
||||
const struct fault_info *inf = esr_to_fault_info(esr);
|
||||
struct siginfo info;
|
||||
|
||||
if (!inf->fn(addr, esr, regs))
|
||||
|
|
|
@ -294,10 +294,6 @@ static __init int setup_hugepagesz(char *opt)
|
|||
hugetlb_add_hstate(PMD_SHIFT - PAGE_SHIFT);
|
||||
} else if (ps == PUD_SIZE) {
|
||||
hugetlb_add_hstate(PUD_SHIFT - PAGE_SHIFT);
|
||||
} else if (ps == (PAGE_SIZE * CONT_PTES)) {
|
||||
hugetlb_add_hstate(CONT_PTE_SHIFT);
|
||||
} else if (ps == (PMD_SIZE * CONT_PMDS)) {
|
||||
hugetlb_add_hstate((PMD_SHIFT + CONT_PMD_SHIFT) - PAGE_SHIFT);
|
||||
} else {
|
||||
hugetlb_bad_size();
|
||||
pr_err("hugepagesz: Unsupported page size %lu K\n", ps >> 10);
|
||||
|
@ -306,13 +302,3 @@ static __init int setup_hugepagesz(char *opt)
|
|||
return 1;
|
||||
}
|
||||
__setup("hugepagesz=", setup_hugepagesz);
|
||||
|
||||
#ifdef CONFIG_ARM64_64K_PAGES
|
||||
static __init int add_default_hugepagesz(void)
|
||||
{
|
||||
if (size_to_hstate(CONT_PTES * PAGE_SIZE) == NULL)
|
||||
hugetlb_add_hstate(CONT_PTE_SHIFT);
|
||||
return 0;
|
||||
}
|
||||
arch_initcall(add_default_hugepagesz);
|
||||
#endif
|
||||
|
|
|
@ -70,46 +70,6 @@ static int gpr_get(struct task_struct *target,
|
|||
0, sizeof(*regs));
|
||||
}
|
||||
|
||||
static int gpr_set(struct task_struct *target,
|
||||
const struct user_regset *regset,
|
||||
unsigned int pos, unsigned int count,
|
||||
const void *kbuf, const void __user *ubuf)
|
||||
{
|
||||
int ret;
|
||||
struct pt_regs *regs = task_pt_regs(target);
|
||||
|
||||
/* Don't copyin TSR or CSR */
|
||||
ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
|
||||
®s,
|
||||
0, PT_TSR * sizeof(long));
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
ret = user_regset_copyin_ignore(&pos, &count, &kbuf, &ubuf,
|
||||
PT_TSR * sizeof(long),
|
||||
(PT_TSR + 1) * sizeof(long));
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
|
||||
®s,
|
||||
(PT_TSR + 1) * sizeof(long),
|
||||
PT_CSR * sizeof(long));
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
ret = user_regset_copyin_ignore(&pos, &count, &kbuf, &ubuf,
|
||||
PT_CSR * sizeof(long),
|
||||
(PT_CSR + 1) * sizeof(long));
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
|
||||
®s,
|
||||
(PT_CSR + 1) * sizeof(long), -1);
|
||||
return ret;
|
||||
}
|
||||
|
||||
enum c6x_regset {
|
||||
REGSET_GPR,
|
||||
};
|
||||
|
@ -121,7 +81,6 @@ static const struct user_regset c6x_regsets[] = {
|
|||
.size = sizeof(u32),
|
||||
.align = sizeof(u32),
|
||||
.get = gpr_get,
|
||||
.set = gpr_set
|
||||
},
|
||||
};
|
||||
|
||||
|
|
|
@ -95,7 +95,8 @@ static int regs_get(struct task_struct *target,
|
|||
long *reg = (long *)®s;
|
||||
|
||||
/* build user regs in buffer */
|
||||
for (r = 0; r < ARRAY_SIZE(register_offset); r++)
|
||||
BUILD_BUG_ON(sizeof(regs) % sizeof(long) != 0);
|
||||
for (r = 0; r < sizeof(regs) / sizeof(long); r++)
|
||||
*reg++ = h8300_get_reg(target, r);
|
||||
|
||||
return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
|
||||
|
@ -113,7 +114,8 @@ static int regs_set(struct task_struct *target,
|
|||
long *reg;
|
||||
|
||||
/* build user regs in buffer */
|
||||
for (reg = (long *)®s, r = 0; r < ARRAY_SIZE(register_offset); r++)
|
||||
BUILD_BUG_ON(sizeof(regs) % sizeof(long) != 0);
|
||||
for (reg = (long *)®s, r = 0; r < sizeof(regs) / sizeof(long); r++)
|
||||
*reg++ = h8300_get_reg(target, r);
|
||||
|
||||
ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
|
||||
|
@ -122,7 +124,7 @@ static int regs_set(struct task_struct *target,
|
|||
return ret;
|
||||
|
||||
/* write back to pt_regs */
|
||||
for (reg = (long *)®s, r = 0; r < ARRAY_SIZE(register_offset); r++)
|
||||
for (reg = (long *)®s, r = 0; r < sizeof(regs) / sizeof(long); r++)
|
||||
h8300_put_reg(target, r, *reg++);
|
||||
return 0;
|
||||
}
|
||||
|
|
|
@ -0,0 +1,29 @@
|
|||
#ifndef _ASM_IA64_ASM_PROTOTYPES_H
|
||||
#define _ASM_IA64_ASM_PROTOTYPES_H
|
||||
|
||||
#include <asm/cacheflush.h>
|
||||
#include <asm/checksum.h>
|
||||
#include <asm/esi.h>
|
||||
#include <asm/ftrace.h>
|
||||
#include <asm/page.h>
|
||||
#include <asm/pal.h>
|
||||
#include <asm/string.h>
|
||||
#include <asm/uaccess.h>
|
||||
#include <asm/unwind.h>
|
||||
#include <asm/xor.h>
|
||||
|
||||
extern const char ia64_ivt[];
|
||||
|
||||
signed int __divsi3(signed int, unsigned int);
|
||||
signed int __modsi3(signed int, unsigned int);
|
||||
|
||||
signed long long __divdi3(signed long long, unsigned long long);
|
||||
signed long long __moddi3(signed long long, unsigned long long);
|
||||
|
||||
unsigned int __udivsi3(unsigned int, unsigned int);
|
||||
unsigned int __umodsi3(unsigned int, unsigned int);
|
||||
|
||||
unsigned long long __udivdi3(unsigned long long, unsigned long long);
|
||||
unsigned long long __umoddi3(unsigned long long, unsigned long long);
|
||||
|
||||
#endif /* _ASM_IA64_ASM_PROTOTYPES_H */
|
|
@ -24,25 +24,25 @@ AFLAGS___modsi3.o = -DMODULO
|
|||
AFLAGS___umodsi3.o = -DUNSIGNED -DMODULO
|
||||
|
||||
$(obj)/__divdi3.o: $(src)/idiv64.S FORCE
|
||||
$(call if_changed_dep,as_o_S)
|
||||
$(call if_changed_rule,as_o_S)
|
||||
|
||||
$(obj)/__udivdi3.o: $(src)/idiv64.S FORCE
|
||||
$(call if_changed_dep,as_o_S)
|
||||
$(call if_changed_rule,as_o_S)
|
||||
|
||||
$(obj)/__moddi3.o: $(src)/idiv64.S FORCE
|
||||
$(call if_changed_dep,as_o_S)
|
||||
$(call if_changed_rule,as_o_S)
|
||||
|
||||
$(obj)/__umoddi3.o: $(src)/idiv64.S FORCE
|
||||
$(call if_changed_dep,as_o_S)
|
||||
$(call if_changed_rule,as_o_S)
|
||||
|
||||
$(obj)/__divsi3.o: $(src)/idiv32.S FORCE
|
||||
$(call if_changed_dep,as_o_S)
|
||||
$(call if_changed_rule,as_o_S)
|
||||
|
||||
$(obj)/__udivsi3.o: $(src)/idiv32.S FORCE
|
||||
$(call if_changed_dep,as_o_S)
|
||||
$(call if_changed_rule,as_o_S)
|
||||
|
||||
$(obj)/__modsi3.o: $(src)/idiv32.S FORCE
|
||||
$(call if_changed_dep,as_o_S)
|
||||
$(call if_changed_rule,as_o_S)
|
||||
|
||||
$(obj)/__umodsi3.o: $(src)/idiv32.S FORCE
|
||||
$(call if_changed_dep,as_o_S)
|
||||
$(call if_changed_rule,as_o_S)
|
||||
|
|
|
@ -25,6 +25,7 @@ CONFIG_SUN_PARTITION=y
|
|||
# CONFIG_EFI_PARTITION is not set
|
||||
CONFIG_SYSV68_PARTITION=y
|
||||
CONFIG_IOSCHED_DEADLINE=m
|
||||
CONFIG_MQ_IOSCHED_DEADLINE=m
|
||||
CONFIG_KEXEC=y
|
||||
CONFIG_BOOTINFO_PROC=y
|
||||
CONFIG_M68020=y
|
||||
|
@ -60,6 +61,7 @@ CONFIG_NET_IPVTI=m
|
|||
CONFIG_NET_FOU_IP_TUNNELS=y
|
||||
CONFIG_INET_AH=m
|
||||
CONFIG_INET_ESP=m
|
||||
CONFIG_INET_ESP_OFFLOAD=m
|
||||
CONFIG_INET_IPCOMP=m
|
||||
CONFIG_INET_XFRM_MODE_TRANSPORT=m
|
||||
CONFIG_INET_XFRM_MODE_TUNNEL=m
|
||||
|
@ -71,6 +73,7 @@ CONFIG_IPV6=m
|
|||
CONFIG_IPV6_ROUTER_PREF=y
|
||||
CONFIG_INET6_AH=m
|
||||
CONFIG_INET6_ESP=m
|
||||
CONFIG_INET6_ESP_OFFLOAD=m
|
||||
CONFIG_INET6_IPCOMP=m
|
||||
CONFIG_IPV6_ILA=m
|
||||
CONFIG_IPV6_VTI=m
|
||||
|
@ -101,6 +104,7 @@ CONFIG_NFT_NUMGEN=m
|
|||
CONFIG_NFT_CT=m
|
||||
CONFIG_NFT_SET_RBTREE=m
|
||||
CONFIG_NFT_SET_HASH=m
|
||||
CONFIG_NFT_SET_BITMAP=m
|
||||
CONFIG_NFT_COUNTER=m
|
||||
CONFIG_NFT_LOG=m
|
||||
CONFIG_NFT_LIMIT=m
|
||||
|
@ -298,6 +302,8 @@ CONFIG_MPLS_IPTUNNEL=m
|
|||
CONFIG_NET_L3_MASTER_DEV=y
|
||||
CONFIG_AF_KCM=m
|
||||
# CONFIG_WIRELESS is not set
|
||||
CONFIG_PSAMPLE=m
|
||||
CONFIG_NET_IFE=m
|
||||
CONFIG_NET_DEVLINK=m
|
||||
# CONFIG_UEVENT_HELPER is not set
|
||||
CONFIG_DEVTMPFS=y
|
||||
|
@ -371,6 +377,7 @@ CONFIG_NET_TEAM_MODE_LOADBALANCE=m
|
|||
CONFIG_MACVLAN=m
|
||||
CONFIG_MACVTAP=m
|
||||
CONFIG_IPVLAN=m
|
||||
CONFIG_IPVTAP=m
|
||||
CONFIG_VXLAN=m
|
||||
CONFIG_GENEVE=m
|
||||
CONFIG_GTP=m
|
||||
|
@ -383,6 +390,7 @@ CONFIG_VETH=m
|
|||
# CONFIG_NET_VENDOR_AMAZON is not set
|
||||
CONFIG_A2065=y
|
||||
CONFIG_ARIADNE=y
|
||||
# CONFIG_NET_VENDOR_AQUANTIA is not set
|
||||
# CONFIG_NET_VENDOR_ARC is not set
|
||||
# CONFIG_NET_CADENCE is not set
|
||||
# CONFIG_NET_VENDOR_BROADCOM is not set
|
||||
|
@ -404,7 +412,6 @@ CONFIG_ZORRO8390=y
|
|||
# CONFIG_NET_VENDOR_SOLARFLARE is not set
|
||||
# CONFIG_NET_VENDOR_SMSC is not set
|
||||
# CONFIG_NET_VENDOR_STMICRO is not set
|
||||
# CONFIG_NET_VENDOR_SYNOPSYS is not set
|
||||
# CONFIG_NET_VENDOR_VIA is not set
|
||||
# CONFIG_NET_VENDOR_WIZNET is not set
|
||||
CONFIG_PPP=m
|
||||
|
@ -564,6 +571,8 @@ CONFIG_NLS_MAC_TURKISH=m
|
|||
CONFIG_DLM=m
|
||||
# CONFIG_SECTION_MISMATCH_WARN_ONLY is not set
|
||||
CONFIG_MAGIC_SYSRQ=y
|
||||
CONFIG_WW_MUTEX_SELFTEST=m
|
||||
CONFIG_ATOMIC64_SELFTEST=m
|
||||
CONFIG_ASYNC_RAID6_TEST=m
|
||||
CONFIG_TEST_HEXDUMP=m
|
||||
CONFIG_TEST_STRING_HELPERS=m
|
||||
|
@ -594,6 +603,7 @@ CONFIG_CRYPTO_CHACHA20POLY1305=m
|
|||
CONFIG_CRYPTO_LRW=m
|
||||
CONFIG_CRYPTO_PCBC=m
|
||||
CONFIG_CRYPTO_KEYWRAP=m
|
||||
CONFIG_CRYPTO_CMAC=m
|
||||
CONFIG_CRYPTO_XCBC=m
|
||||
CONFIG_CRYPTO_VMAC=m
|
||||
CONFIG_CRYPTO_MICHAEL_MIC=m
|
||||
|
@ -605,6 +615,7 @@ CONFIG_CRYPTO_SHA512=m
|
|||
CONFIG_CRYPTO_SHA3=m
|
||||
CONFIG_CRYPTO_TGR192=m
|
||||
CONFIG_CRYPTO_WP512=m
|
||||
CONFIG_CRYPTO_AES_TI=m
|
||||
CONFIG_CRYPTO_ANUBIS=m
|
||||
CONFIG_CRYPTO_BLOWFISH=m
|
||||
CONFIG_CRYPTO_CAMELLIA=m
|
||||
|
@ -629,4 +640,5 @@ CONFIG_CRYPTO_USER_API_SKCIPHER=m
|
|||
CONFIG_CRYPTO_USER_API_RNG=m
|
||||
CONFIG_CRYPTO_USER_API_AEAD=m
|
||||
# CONFIG_CRYPTO_HW is not set
|
||||
CONFIG_CRC32_SELFTEST=m
|
||||
CONFIG_XZ_DEC_TEST=m
|
||||
|
|
|
@ -26,6 +26,7 @@ CONFIG_SUN_PARTITION=y
|
|||
# CONFIG_EFI_PARTITION is not set
|
||||
CONFIG_SYSV68_PARTITION=y
|
||||
CONFIG_IOSCHED_DEADLINE=m
|
||||
CONFIG_MQ_IOSCHED_DEADLINE=m
|
||||
CONFIG_KEXEC=y
|
||||
CONFIG_BOOTINFO_PROC=y
|
||||
CONFIG_M68020=y
|
||||
|
@ -58,6 +59,7 @@ CONFIG_NET_IPVTI=m
|
|||
CONFIG_NET_FOU_IP_TUNNELS=y
|
||||
CONFIG_INET_AH=m
|
||||
CONFIG_INET_ESP=m
|
||||
CONFIG_INET_ESP_OFFLOAD=m
|
||||
CONFIG_INET_IPCOMP=m
|
||||
CONFIG_INET_XFRM_MODE_TRANSPORT=m
|
||||
CONFIG_INET_XFRM_MODE_TUNNEL=m
|
||||
|
@ -69,6 +71,7 @@ CONFIG_IPV6=m
|
|||
CONFIG_IPV6_ROUTER_PREF=y
|
||||
CONFIG_INET6_AH=m
|
||||
CONFIG_INET6_ESP=m
|
||||
CONFIG_INET6_ESP_OFFLOAD=m
|
||||
CONFIG_INET6_IPCOMP=m
|
||||
CONFIG_IPV6_ILA=m
|
||||
CONFIG_IPV6_VTI=m
|
||||
|
@ -99,6 +102,7 @@ CONFIG_NFT_NUMGEN=m
|
|||
CONFIG_NFT_CT=m
|
||||
CONFIG_NFT_SET_RBTREE=m
|
||||
CONFIG_NFT_SET_HASH=m
|
||||
CONFIG_NFT_SET_BITMAP=m
|
||||
CONFIG_NFT_COUNTER=m
|
||||
CONFIG_NFT_LOG=m
|
||||
CONFIG_NFT_LIMIT=m
|
||||
|
@ -296,6 +300,8 @@ CONFIG_MPLS_IPTUNNEL=m
|
|||
CONFIG_NET_L3_MASTER_DEV=y
|
||||
CONFIG_AF_KCM=m
|
||||
# CONFIG_WIRELESS is not set
|
||||
CONFIG_PSAMPLE=m
|
||||
CONFIG_NET_IFE=m
|
||||
CONFIG_NET_DEVLINK=m
|
||||
# CONFIG_UEVENT_HELPER is not set
|
||||
CONFIG_DEVTMPFS=y
|
||||
|
@ -353,6 +359,7 @@ CONFIG_NET_TEAM_MODE_LOADBALANCE=m
|
|||
CONFIG_MACVLAN=m
|
||||
CONFIG_MACVTAP=m
|
||||
CONFIG_IPVLAN=m
|
||||
CONFIG_IPVTAP=m
|
||||
CONFIG_VXLAN=m
|
||||
CONFIG_GENEVE=m
|
||||
CONFIG_GTP=m
|
||||
|
@ -362,6 +369,7 @@ CONFIG_NETCONSOLE_DYNAMIC=y
|
|||
CONFIG_VETH=m
|
||||
# CONFIG_NET_VENDOR_ALACRITECH is not set
|
||||
# CONFIG_NET_VENDOR_AMAZON is not set
|
||||
# CONFIG_NET_VENDOR_AQUANTIA is not set
|
||||
# CONFIG_NET_VENDOR_ARC is not set
|
||||
# CONFIG_NET_CADENCE is not set
|
||||
# CONFIG_NET_VENDOR_BROADCOM is not set
|
||||
|
@ -378,7 +386,6 @@ CONFIG_VETH=m
|
|||
# CONFIG_NET_VENDOR_SEEQ is not set
|
||||
# CONFIG_NET_VENDOR_SOLARFLARE is not set
|
||||
# CONFIG_NET_VENDOR_STMICRO is not set
|
||||
# CONFIG_NET_VENDOR_SYNOPSYS is not set
|
||||
# CONFIG_NET_VENDOR_VIA is not set
|
||||
# CONFIG_NET_VENDOR_WIZNET is not set
|
||||
CONFIG_PPP=m
|
||||
|
@ -523,6 +530,8 @@ CONFIG_NLS_MAC_TURKISH=m
|
|||
CONFIG_DLM=m
|
||||
# CONFIG_SECTION_MISMATCH_WARN_ONLY is not set
|
||||
CONFIG_MAGIC_SYSRQ=y
|
||||
CONFIG_WW_MUTEX_SELFTEST=m
|
||||
CONFIG_ATOMIC64_SELFTEST=m
|
||||
CONFIG_ASYNC_RAID6_TEST=m
|
||||
CONFIG_TEST_HEXDUMP=m
|
||||
CONFIG_TEST_STRING_HELPERS=m
|
||||
|
@ -553,6 +562,7 @@ CONFIG_CRYPTO_CHACHA20POLY1305=m
|
|||
CONFIG_CRYPTO_LRW=m
|
||||
CONFIG_CRYPTO_PCBC=m
|
||||
CONFIG_CRYPTO_KEYWRAP=m
|
||||
CONFIG_CRYPTO_CMAC=m
|
||||
CONFIG_CRYPTO_XCBC=m
|
||||
CONFIG_CRYPTO_VMAC=m
|
||||
CONFIG_CRYPTO_MICHAEL_MIC=m
|
||||
|
@ -564,6 +574,7 @@ CONFIG_CRYPTO_SHA512=m
|
|||
CONFIG_CRYPTO_SHA3=m
|
||||
CONFIG_CRYPTO_TGR192=m
|
||||
CONFIG_CRYPTO_WP512=m
|
||||
CONFIG_CRYPTO_AES_TI=m
|
||||
CONFIG_CRYPTO_ANUBIS=m
|
||||
CONFIG_CRYPTO_BLOWFISH=m
|
||||
CONFIG_CRYPTO_CAMELLIA=m
|
||||
|
@ -588,4 +599,5 @@ CONFIG_CRYPTO_USER_API_SKCIPHER=m
|
|||
CONFIG_CRYPTO_USER_API_RNG=m
|
||||
CONFIG_CRYPTO_USER_API_AEAD=m
|
||||
# CONFIG_CRYPTO_HW is not set
|
||||
CONFIG_CRC32_SELFTEST=m
|
||||
CONFIG_XZ_DEC_TEST=m
|
||||
|
|
|
@ -25,6 +25,7 @@ CONFIG_SUN_PARTITION=y
|
|||
# CONFIG_EFI_PARTITION is not set
|
||||
CONFIG_SYSV68_PARTITION=y
|
||||
CONFIG_IOSCHED_DEADLINE=m
|
||||
CONFIG_MQ_IOSCHED_DEADLINE=m
|
||||
CONFIG_KEXEC=y
|
||||
CONFIG_BOOTINFO_PROC=y
|
||||
CONFIG_M68020=y
|
||||
|
@ -58,6 +59,7 @@ CONFIG_NET_IPVTI=m
|
|||
CONFIG_NET_FOU_IP_TUNNELS=y
|
||||
CONFIG_INET_AH=m
|
||||
CONFIG_INET_ESP=m
|
||||
CONFIG_INET_ESP_OFFLOAD=m
|
||||
CONFIG_INET_IPCOMP=m
|
||||
CONFIG_INET_XFRM_MODE_TRANSPORT=m
|
||||
CONFIG_INET_XFRM_MODE_TUNNEL=m
|
||||
|
@ -69,6 +71,7 @@ CONFIG_IPV6=m
|
|||
CONFIG_IPV6_ROUTER_PREF=y
|
||||
CONFIG_INET6_AH=m
|
||||
CONFIG_INET6_ESP=m
|
||||
CONFIG_INET6_ESP_OFFLOAD=m
|
||||
CONFIG_INET6_IPCOMP=m
|
||||
CONFIG_IPV6_ILA=m
|
||||
CONFIG_IPV6_VTI=m
|
||||
|
@ -99,6 +102,7 @@ CONFIG_NFT_NUMGEN=m
|
|||
CONFIG_NFT_CT=m
|
||||
CONFIG_NFT_SET_RBTREE=m
|
||||
CONFIG_NFT_SET_HASH=m
|
||||
CONFIG_NFT_SET_BITMAP=m
|
||||
CONFIG_NFT_COUNTER=m
|
||||
CONFIG_NFT_LOG=m
|
||||
CONFIG_NFT_LIMIT=m
|
||||
|
@ -296,6 +300,8 @@ CONFIG_MPLS_IPTUNNEL=m
|
|||
CONFIG_NET_L3_MASTER_DEV=y
|
||||
CONFIG_AF_KCM=m
|
||||
# CONFIG_WIRELESS is not set
|
||||
CONFIG_PSAMPLE=m
|
||||
CONFIG_NET_IFE=m
|
||||
CONFIG_NET_DEVLINK=m
|
||||
# CONFIG_UEVENT_HELPER is not set
|
||||
CONFIG_DEVTMPFS=y
|
||||
|
@ -362,6 +368,7 @@ CONFIG_NET_TEAM_MODE_LOADBALANCE=m
|
|||
CONFIG_MACVLAN=m
|
||||
CONFIG_MACVTAP=m
|
||||
CONFIG_IPVLAN=m
|
||||
CONFIG_IPVTAP=m
|
||||
CONFIG_VXLAN=m
|
||||
CONFIG_GENEVE=m
|
||||
CONFIG_GTP=m
|
||||
|
@ -372,6 +379,7 @@ CONFIG_VETH=m
|
|||
# CONFIG_NET_VENDOR_ALACRITECH is not set
|
||||
# CONFIG_NET_VENDOR_AMAZON is not set
|
||||
CONFIG_ATARILANCE=y
|
||||
# CONFIG_NET_VENDOR_AQUANTIA is not set
|
||||
# CONFIG_NET_VENDOR_ARC is not set
|
||||
# CONFIG_NET_CADENCE is not set
|
||||
# CONFIG_NET_VENDOR_BROADCOM is not set
|
||||
|
@ -389,7 +397,6 @@ CONFIG_NE2000=y
|
|||
# CONFIG_NET_VENDOR_SOLARFLARE is not set
|
||||
CONFIG_SMC91X=y
|
||||
# CONFIG_NET_VENDOR_STMICRO is not set
|
||||
# CONFIG_NET_VENDOR_SYNOPSYS is not set
|
||||
# CONFIG_NET_VENDOR_VIA is not set
|
||||
# CONFIG_NET_VENDOR_WIZNET is not set
|
||||
CONFIG_PPP=m
|
||||
|
@ -544,6 +551,8 @@ CONFIG_NLS_MAC_TURKISH=m
|
|||
CONFIG_DLM=m
|
||||
# CONFIG_SECTION_MISMATCH_WARN_ONLY is not set
|
||||
CONFIG_MAGIC_SYSRQ=y
|
||||
CONFIG_WW_MUTEX_SELFTEST=m
|
||||
CONFIG_ATOMIC64_SELFTEST=m
|
||||
CONFIG_ASYNC_RAID6_TEST=m
|
||||
CONFIG_TEST_HEXDUMP=m
|
||||
CONFIG_TEST_STRING_HELPERS=m
|
||||
|
@ -574,6 +583,7 @@ CONFIG_CRYPTO_CHACHA20POLY1305=m
|
|||
CONFIG_CRYPTO_LRW=m
|
||||
CONFIG_CRYPTO_PCBC=m
|
||||
CONFIG_CRYPTO_KEYWRAP=m
|
||||
CONFIG_CRYPTO_CMAC=m
|
||||
CONFIG_CRYPTO_XCBC=m
|
||||
CONFIG_CRYPTO_VMAC=m
|
||||
CONFIG_CRYPTO_MICHAEL_MIC=m
|
||||
|
@ -585,6 +595,7 @@ CONFIG_CRYPTO_SHA512=m
|
|||
CONFIG_CRYPTO_SHA3=m
|
||||
CONFIG_CRYPTO_TGR192=m
|
||||
CONFIG_CRYPTO_WP512=m
|
||||
CONFIG_CRYPTO_AES_TI=m
|
||||
CONFIG_CRYPTO_ANUBIS=m
|
||||
CONFIG_CRYPTO_BLOWFISH=m
|
||||
CONFIG_CRYPTO_CAMELLIA=m
|
||||
|
@ -609,4 +620,5 @@ CONFIG_CRYPTO_USER_API_SKCIPHER=m
|
|||
CONFIG_CRYPTO_USER_API_RNG=m
|
||||
CONFIG_CRYPTO_USER_API_AEAD=m
|
||||
# CONFIG_CRYPTO_HW is not set
|
||||
CONFIG_CRC32_SELFTEST=m
|
||||
CONFIG_XZ_DEC_TEST=m
|
||||
|
|
|
@ -25,6 +25,7 @@ CONFIG_UNIXWARE_DISKLABEL=y
|
|||
CONFIG_SUN_PARTITION=y
|
||||
# CONFIG_EFI_PARTITION is not set
|
||||
CONFIG_IOSCHED_DEADLINE=m
|
||||
CONFIG_MQ_IOSCHED_DEADLINE=m
|
||||
CONFIG_KEXEC=y
|
||||
CONFIG_BOOTINFO_PROC=y
|
||||
CONFIG_M68040=y
|
||||
|
@ -56,6 +57,7 @@ CONFIG_NET_IPVTI=m
|
|||
CONFIG_NET_FOU_IP_TUNNELS=y
|
||||
CONFIG_INET_AH=m
|
||||
CONFIG_INET_ESP=m
|
||||
CONFIG_INET_ESP_OFFLOAD=m
|
||||
CONFIG_INET_IPCOMP=m
|
||||
CONFIG_INET_XFRM_MODE_TRANSPORT=m
|
||||
CONFIG_INET_XFRM_MODE_TUNNEL=m
|
||||
|
@ -67,6 +69,7 @@ CONFIG_IPV6=m
|
|||
CONFIG_IPV6_ROUTER_PREF=y
|
||||
CONFIG_INET6_AH=m
|
||||
CONFIG_INET6_ESP=m
|
||||
CONFIG_INET6_ESP_OFFLOAD=m
|
||||
CONFIG_INET6_IPCOMP=m
|
||||
CONFIG_IPV6_ILA=m
|
||||
CONFIG_IPV6_VTI=m
|
||||
|
@ -97,6 +100,7 @@ CONFIG_NFT_NUMGEN=m
|
|||
CONFIG_NFT_CT=m
|
||||
CONFIG_NFT_SET_RBTREE=m
|
||||
CONFIG_NFT_SET_HASH=m
|
||||
CONFIG_NFT_SET_BITMAP=m
|
||||
CONFIG_NFT_COUNTER=m
|
||||
CONFIG_NFT_LOG=m
|
||||
CONFIG_NFT_LIMIT=m
|
||||
|
@ -294,6 +298,8 @@ CONFIG_MPLS_IPTUNNEL=m
|
|||
CONFIG_NET_L3_MASTER_DEV=y
|
||||
CONFIG_AF_KCM=m
|
||||
# CONFIG_WIRELESS is not set
|
||||
CONFIG_PSAMPLE=m
|
||||
CONFIG_NET_IFE=m
|
||||
CONFIG_NET_DEVLINK=m
|
||||
# CONFIG_UEVENT_HELPER is not set
|
||||
CONFIG_DEVTMPFS=y
|
||||
|
@ -352,6 +358,7 @@ CONFIG_NET_TEAM_MODE_LOADBALANCE=m
|
|||
CONFIG_MACVLAN=m
|
||||
CONFIG_MACVTAP=m
|
||||
CONFIG_IPVLAN=m
|
||||
CONFIG_IPVTAP=m
|
||||
CONFIG_VXLAN=m
|
||||
CONFIG_GENEVE=m
|
||||
CONFIG_GTP=m
|
||||
|
@ -361,6 +368,7 @@ CONFIG_NETCONSOLE_DYNAMIC=y
|
|||
CONFIG_VETH=m
|
||||
# CONFIG_NET_VENDOR_ALACRITECH is not set
|
||||
# CONFIG_NET_VENDOR_AMAZON is not set
|
||||
# CONFIG_NET_VENDOR_AQUANTIA is not set
|
||||
# CONFIG_NET_VENDOR_ARC is not set
|
||||
# CONFIG_NET_CADENCE is not set
|
||||
# CONFIG_NET_VENDOR_BROADCOM is not set
|
||||
|
@ -377,7 +385,6 @@ CONFIG_BVME6000_NET=y
|
|||
# CONFIG_NET_VENDOR_SEEQ is not set
|
||||
# CONFIG_NET_VENDOR_SOLARFLARE is not set
|
||||
# CONFIG_NET_VENDOR_STMICRO is not set
|
||||
# CONFIG_NET_VENDOR_SYNOPSYS is not set
|
||||
# CONFIG_NET_VENDOR_VIA is not set
|
||||
# CONFIG_NET_VENDOR_WIZNET is not set
|
||||
CONFIG_PPP=m
|
||||
|
@ -515,6 +522,8 @@ CONFIG_NLS_MAC_TURKISH=m
|
|||
CONFIG_DLM=m
|
||||
# CONFIG_SECTION_MISMATCH_WARN_ONLY is not set
|
||||
CONFIG_MAGIC_SYSRQ=y
|
||||
CONFIG_WW_MUTEX_SELFTEST=m
|
||||
CONFIG_ATOMIC64_SELFTEST=m
|
||||
CONFIG_ASYNC_RAID6_TEST=m
|
||||
CONFIG_TEST_HEXDUMP=m
|
||||
CONFIG_TEST_STRING_HELPERS=m
|
||||
|
@ -545,6 +554,7 @@ CONFIG_CRYPTO_CHACHA20POLY1305=m
|
|||
CONFIG_CRYPTO_LRW=m
|
||||
CONFIG_CRYPTO_PCBC=m
|
||||
CONFIG_CRYPTO_KEYWRAP=m
|
||||
CONFIG_CRYPTO_CMAC=m
|
||||
CONFIG_CRYPTO_XCBC=m
|
||||
CONFIG_CRYPTO_VMAC=m
|
||||
CONFIG_CRYPTO_MICHAEL_MIC=m
|
||||
|
@ -556,6 +566,7 @@ CONFIG_CRYPTO_SHA512=m
|
|||
CONFIG_CRYPTO_SHA3=m
|
||||
CONFIG_CRYPTO_TGR192=m
|
||||
CONFIG_CRYPTO_WP512=m
|
||||
CONFIG_CRYPTO_AES_TI=m
|
||||
CONFIG_CRYPTO_ANUBIS=m
|
||||
CONFIG_CRYPTO_BLOWFISH=m
|
||||
CONFIG_CRYPTO_CAMELLIA=m
|
||||
|
@ -580,4 +591,5 @@ CONFIG_CRYPTO_USER_API_SKCIPHER=m
|
|||
CONFIG_CRYPTO_USER_API_RNG=m
|
||||
CONFIG_CRYPTO_USER_API_AEAD=m
|
||||
# CONFIG_CRYPTO_HW is not set
|
||||
CONFIG_CRC32_SELFTEST=m
|
||||
CONFIG_XZ_DEC_TEST=m
|
||||
|
|
|
@ -26,6 +26,7 @@ CONFIG_SUN_PARTITION=y
|
|||
# CONFIG_EFI_PARTITION is not set
|
||||
CONFIG_SYSV68_PARTITION=y
|
||||
CONFIG_IOSCHED_DEADLINE=m
|
||||
CONFIG_MQ_IOSCHED_DEADLINE=m
|
||||
CONFIG_KEXEC=y
|
||||
CONFIG_BOOTINFO_PROC=y
|
||||
CONFIG_M68020=y
|
||||
|
@ -58,6 +59,7 @@ CONFIG_NET_IPVTI=m
|
|||
CONFIG_NET_FOU_IP_TUNNELS=y
|
||||
CONFIG_INET_AH=m
|
||||
CONFIG_INET_ESP=m
|
||||
CONFIG_INET_ESP_OFFLOAD=m
|
||||
CONFIG_INET_IPCOMP=m
|
||||
CONFIG_INET_XFRM_MODE_TRANSPORT=m
|
||||
CONFIG_INET_XFRM_MODE_TUNNEL=m
|
||||
|
@ -69,6 +71,7 @@ CONFIG_IPV6=m
|
|||
CONFIG_IPV6_ROUTER_PREF=y
|
||||
CONFIG_INET6_AH=m
|
||||
CONFIG_INET6_ESP=m
|
||||
CONFIG_INET6_ESP_OFFLOAD=m
|
||||
CONFIG_INET6_IPCOMP=m
|
||||
CONFIG_IPV6_ILA=m
|
||||
CONFIG_IPV6_VTI=m
|
||||
|
@ -99,6 +102,7 @@ CONFIG_NFT_NUMGEN=m
|
|||
CONFIG_NFT_CT=m
|
||||
CONFIG_NFT_SET_RBTREE=m
|
||||
CONFIG_NFT_SET_HASH=m
|
||||
CONFIG_NFT_SET_BITMAP=m
|
||||
CONFIG_NFT_COUNTER=m
|
||||
CONFIG_NFT_LOG=m
|
||||
CONFIG_NFT_LIMIT=m
|
||||
|
@ -296,6 +300,8 @@ CONFIG_MPLS_IPTUNNEL=m
|
|||
CONFIG_NET_L3_MASTER_DEV=y
|
||||
CONFIG_AF_KCM=m
|
||||
# CONFIG_WIRELESS is not set
|
||||
CONFIG_PSAMPLE=m
|
||||
CONFIG_NET_IFE=m
|
||||
CONFIG_NET_DEVLINK=m
|
||||
# CONFIG_UEVENT_HELPER is not set
|
||||
CONFIG_DEVTMPFS=y
|
||||
|
@ -353,6 +359,7 @@ CONFIG_NET_TEAM_MODE_LOADBALANCE=m
|
|||
CONFIG_MACVLAN=m
|
||||
CONFIG_MACVTAP=m
|
||||
CONFIG_IPVLAN=m
|
||||
CONFIG_IPVTAP=m
|
||||
CONFIG_VXLAN=m
|
||||
CONFIG_GENEVE=m
|
||||
CONFIG_GTP=m
|
||||
|
@ -363,6 +370,7 @@ CONFIG_VETH=m
|
|||
# CONFIG_NET_VENDOR_ALACRITECH is not set
|
||||
# CONFIG_NET_VENDOR_AMAZON is not set
|
||||
CONFIG_HPLANCE=y
|
||||
# CONFIG_NET_VENDOR_AQUANTIA is not set
|
||||
# CONFIG_NET_VENDOR_ARC is not set
|
||||
# CONFIG_NET_CADENCE is not set
|
||||
# CONFIG_NET_VENDOR_BROADCOM is not set
|
||||
|
@ -379,7 +387,6 @@ CONFIG_HPLANCE=y
|
|||
# CONFIG_NET_VENDOR_SEEQ is not set
|
||||
# CONFIG_NET_VENDOR_SOLARFLARE is not set
|
||||
# CONFIG_NET_VENDOR_STMICRO is not set
|
||||
# CONFIG_NET_VENDOR_SYNOPSYS is not set
|
||||
# CONFIG_NET_VENDOR_VIA is not set
|
||||
# CONFIG_NET_VENDOR_WIZNET is not set
|
||||
CONFIG_PPP=m
|
||||
|
@ -525,6 +532,8 @@ CONFIG_NLS_MAC_TURKISH=m
|
|||
CONFIG_DLM=m
|
||||
# CONFIG_SECTION_MISMATCH_WARN_ONLY is not set
|
||||
CONFIG_MAGIC_SYSRQ=y
|
||||
CONFIG_WW_MUTEX_SELFTEST=m
|
||||
CONFIG_ATOMIC64_SELFTEST=m
|
||||
CONFIG_ASYNC_RAID6_TEST=m
|
||||
CONFIG_TEST_HEXDUMP=m
|
||||
CONFIG_TEST_STRING_HELPERS=m
|
||||
|
@ -555,6 +564,7 @@ CONFIG_CRYPTO_CHACHA20POLY1305=m
|
|||
CONFIG_CRYPTO_LRW=m
|
||||
CONFIG_CRYPTO_PCBC=m
|
||||
CONFIG_CRYPTO_KEYWRAP=m
|
||||
CONFIG_CRYPTO_CMAC=m
|
||||
CONFIG_CRYPTO_XCBC=m
|
||||
CONFIG_CRYPTO_VMAC=m
|
||||
CONFIG_CRYPTO_MICHAEL_MIC=m
|
||||
|
@ -566,6 +576,7 @@ CONFIG_CRYPTO_SHA512=m
|
|||
CONFIG_CRYPTO_SHA3=m
|
||||
CONFIG_CRYPTO_TGR192=m
|
||||
CONFIG_CRYPTO_WP512=m
|
||||
CONFIG_CRYPTO_AES_TI=m
|
||||
CONFIG_CRYPTO_ANUBIS=m
|
||||
CONFIG_CRYPTO_BLOWFISH=m
|
||||
CONFIG_CRYPTO_CAMELLIA=m
|
||||
|
@ -590,4 +601,5 @@ CONFIG_CRYPTO_USER_API_SKCIPHER=m
|
|||
CONFIG_CRYPTO_USER_API_RNG=m
|
||||
CONFIG_CRYPTO_USER_API_AEAD=m
|
||||
# CONFIG_CRYPTO_HW is not set
|
||||
CONFIG_CRC32_SELFTEST=m
|
||||
CONFIG_XZ_DEC_TEST=m
|
||||
|
|
|
@ -25,6 +25,7 @@ CONFIG_SUN_PARTITION=y
|
|||
# CONFIG_EFI_PARTITION is not set
|
||||
CONFIG_SYSV68_PARTITION=y
|
||||
CONFIG_IOSCHED_DEADLINE=m
|
||||
CONFIG_MQ_IOSCHED_DEADLINE=m
|
||||
CONFIG_KEXEC=y
|
||||
CONFIG_BOOTINFO_PROC=y
|
||||
CONFIG_M68020=y
|
||||
|
@ -57,6 +58,7 @@ CONFIG_NET_IPVTI=m
|
|||
CONFIG_NET_FOU_IP_TUNNELS=y
|
||||
CONFIG_INET_AH=m
|
||||
CONFIG_INET_ESP=m
|
||||
CONFIG_INET_ESP_OFFLOAD=m
|
||||
CONFIG_INET_IPCOMP=m
|
||||
CONFIG_INET_XFRM_MODE_TRANSPORT=m
|
||||
CONFIG_INET_XFRM_MODE_TUNNEL=m
|
||||
|
@ -68,6 +70,7 @@ CONFIG_IPV6=m
|
|||
CONFIG_IPV6_ROUTER_PREF=y
|
||||
CONFIG_INET6_AH=m
|
||||
CONFIG_INET6_ESP=m
|
||||
CONFIG_INET6_ESP_OFFLOAD=m
|
||||
CONFIG_INET6_IPCOMP=m
|
||||
CONFIG_IPV6_ILA=m
|
||||
CONFIG_IPV6_VTI=m
|
||||
|
@ -98,6 +101,7 @@ CONFIG_NFT_NUMGEN=m
|
|||
CONFIG_NFT_CT=m
|
||||
CONFIG_NFT_SET_RBTREE=m
|
||||
CONFIG_NFT_SET_HASH=m
|
||||
CONFIG_NFT_SET_BITMAP=m
|
||||
CONFIG_NFT_COUNTER=m
|
||||
CONFIG_NFT_LOG=m
|
||||
CONFIG_NFT_LIMIT=m
|
||||
|
@ -298,6 +302,8 @@ CONFIG_MPLS_IPTUNNEL=m
|
|||
CONFIG_NET_L3_MASTER_DEV=y
|
||||
CONFIG_AF_KCM=m
|
||||
# CONFIG_WIRELESS is not set
|
||||
CONFIG_PSAMPLE=m
|
||||
CONFIG_NET_IFE=m
|
||||
CONFIG_NET_DEVLINK=m
|
||||
# CONFIG_UEVENT_HELPER is not set
|
||||
CONFIG_DEVTMPFS=y
|
||||
|
@ -369,6 +375,7 @@ CONFIG_NET_TEAM_MODE_LOADBALANCE=m
|
|||
CONFIG_MACVLAN=m
|
||||
CONFIG_MACVTAP=m
|
||||
CONFIG_IPVLAN=m
|
||||
CONFIG_IPVTAP=m
|
||||
CONFIG_VXLAN=m
|
||||
CONFIG_GENEVE=m
|
||||
CONFIG_GTP=m
|
||||
|
@ -379,6 +386,7 @@ CONFIG_VETH=m
|
|||
# CONFIG_NET_VENDOR_ALACRITECH is not set
|
||||
# CONFIG_NET_VENDOR_AMAZON is not set
|
||||
CONFIG_MACMACE=y
|
||||
# CONFIG_NET_VENDOR_AQUANTIA is not set
|
||||
# CONFIG_NET_VENDOR_ARC is not set
|
||||
# CONFIG_NET_CADENCE is not set
|
||||
# CONFIG_NET_VENDOR_BROADCOM is not set
|
||||
|
@ -398,7 +406,6 @@ CONFIG_MAC8390=y
|
|||
# CONFIG_NET_VENDOR_SOLARFLARE is not set
|
||||
# CONFIG_NET_VENDOR_SMSC is not set
|
||||
# CONFIG_NET_VENDOR_STMICRO is not set
|
||||
# CONFIG_NET_VENDOR_SYNOPSYS is not set
|
||||
# CONFIG_NET_VENDOR_VIA is not set
|
||||
# CONFIG_NET_VENDOR_WIZNET is not set
|
||||
CONFIG_PPP=m
|
||||
|
@ -547,6 +554,8 @@ CONFIG_NLS_MAC_TURKISH=m
|
|||
CONFIG_DLM=m
|
||||
# CONFIG_SECTION_MISMATCH_WARN_ONLY is not set
|
||||
CONFIG_MAGIC_SYSRQ=y
|
||||
CONFIG_WW_MUTEX_SELFTEST=m
|
||||
CONFIG_ATOMIC64_SELFTEST=m
|
||||
CONFIG_ASYNC_RAID6_TEST=m
|
||||
CONFIG_TEST_HEXDUMP=m
|
||||
CONFIG_TEST_STRING_HELPERS=m
|
||||
|
@ -577,6 +586,7 @@ CONFIG_CRYPTO_CHACHA20POLY1305=m
|
|||
CONFIG_CRYPTO_LRW=m
|
||||
CONFIG_CRYPTO_PCBC=m
|
||||
CONFIG_CRYPTO_KEYWRAP=m
|
||||
CONFIG_CRYPTO_CMAC=m
|
||||
CONFIG_CRYPTO_XCBC=m
|
||||
CONFIG_CRYPTO_VMAC=m
|
||||
CONFIG_CRYPTO_MICHAEL_MIC=m
|
||||
|
@ -588,6 +598,7 @@ CONFIG_CRYPTO_SHA512=m
|
|||
CONFIG_CRYPTO_SHA3=m
|
||||
CONFIG_CRYPTO_TGR192=m
|
||||
CONFIG_CRYPTO_WP512=m
|
||||
CONFIG_CRYPTO_AES_TI=m
|
||||
CONFIG_CRYPTO_ANUBIS=m
|
||||
CONFIG_CRYPTO_BLOWFISH=m
|
||||
CONFIG_CRYPTO_CAMELLIA=m
|
||||
|
@ -612,4 +623,5 @@ CONFIG_CRYPTO_USER_API_SKCIPHER=m
|
|||
CONFIG_CRYPTO_USER_API_RNG=m
|
||||
CONFIG_CRYPTO_USER_API_AEAD=m
|
||||
# CONFIG_CRYPTO_HW is not set
|
||||
CONFIG_CRC32_SELFTEST=m
|
||||
CONFIG_XZ_DEC_TEST=m
|
||||
|
|
|
@ -21,6 +21,7 @@ CONFIG_SOLARIS_X86_PARTITION=y
|
|||
CONFIG_UNIXWARE_DISKLABEL=y
|
||||
# CONFIG_EFI_PARTITION is not set
|
||||
CONFIG_IOSCHED_DEADLINE=m
|
||||
CONFIG_MQ_IOSCHED_DEADLINE=m
|
||||
CONFIG_KEXEC=y
|
||||
CONFIG_BOOTINFO_PROC=y
|
||||
CONFIG_M68020=y
|
||||
|
@ -67,6 +68,7 @@ CONFIG_NET_IPVTI=m
|
|||
CONFIG_NET_FOU_IP_TUNNELS=y
|
||||
CONFIG_INET_AH=m
|
||||
CONFIG_INET_ESP=m
|
||||
CONFIG_INET_ESP_OFFLOAD=m
|
||||
CONFIG_INET_IPCOMP=m
|
||||
CONFIG_INET_XFRM_MODE_TRANSPORT=m
|
||||
CONFIG_INET_XFRM_MODE_TUNNEL=m
|
||||
|
@ -78,6 +80,7 @@ CONFIG_IPV6=m
|
|||
CONFIG_IPV6_ROUTER_PREF=y
|
||||
CONFIG_INET6_AH=m
|
||||
CONFIG_INET6_ESP=m
|
||||
CONFIG_INET6_ESP_OFFLOAD=m
|
||||
CONFIG_INET6_IPCOMP=m
|
||||
CONFIG_IPV6_ILA=m
|
||||
CONFIG_IPV6_VTI=m
|
||||
|
@ -108,6 +111,7 @@ CONFIG_NFT_NUMGEN=m
|
|||
CONFIG_NFT_CT=m
|
||||
CONFIG_NFT_SET_RBTREE=m
|
||||
CONFIG_NFT_SET_HASH=m
|
||||
CONFIG_NFT_SET_BITMAP=m
|
||||
CONFIG_NFT_COUNTER=m
|
||||
CONFIG_NFT_LOG=m
|
||||
CONFIG_NFT_LIMIT=m
|
||||
|
@ -308,6 +312,8 @@ CONFIG_MPLS_IPTUNNEL=m
|
|||
CONFIG_NET_L3_MASTER_DEV=y
|
||||
CONFIG_AF_KCM=m
|
||||
# CONFIG_WIRELESS is not set
|
||||
CONFIG_PSAMPLE=m
|
||||
CONFIG_NET_IFE=m
|
||||
CONFIG_NET_DEVLINK=m
|
||||
# CONFIG_UEVENT_HELPER is not set
|
||||
CONFIG_DEVTMPFS=y
|
||||
|
@ -402,6 +408,7 @@ CONFIG_NET_TEAM_MODE_LOADBALANCE=m
|
|||
CONFIG_MACVLAN=m
|
||||
CONFIG_MACVTAP=m
|
||||
CONFIG_IPVLAN=m
|
||||
CONFIG_IPVTAP=m
|
||||
CONFIG_VXLAN=m
|
||||
CONFIG_GENEVE=m
|
||||
CONFIG_GTP=m
|
||||
|
@ -419,6 +426,7 @@ CONFIG_HPLANCE=y
|
|||
CONFIG_MVME147_NET=y
|
||||
CONFIG_SUN3LANCE=y
|
||||
CONFIG_MACMACE=y
|
||||
# CONFIG_NET_VENDOR_AQUANTIA is not set
|
||||
# CONFIG_NET_VENDOR_ARC is not set
|
||||
# CONFIG_NET_CADENCE is not set
|
||||
# CONFIG_NET_VENDOR_BROADCOM is not set
|
||||
|
@ -444,7 +452,6 @@ CONFIG_ZORRO8390=y
|
|||
# CONFIG_NET_VENDOR_SOLARFLARE is not set
|
||||
CONFIG_SMC91X=y
|
||||
# CONFIG_NET_VENDOR_STMICRO is not set
|
||||
# CONFIG_NET_VENDOR_SYNOPSYS is not set
|
||||
# CONFIG_NET_VENDOR_VIA is not set
|
||||
# CONFIG_NET_VENDOR_WIZNET is not set
|
||||
CONFIG_PLIP=m
|
||||
|
@ -627,6 +634,8 @@ CONFIG_NLS_MAC_TURKISH=m
|
|||
CONFIG_DLM=m
|
||||
# CONFIG_SECTION_MISMATCH_WARN_ONLY is not set
|
||||
CONFIG_MAGIC_SYSRQ=y
|
||||
CONFIG_WW_MUTEX_SELFTEST=m
|
||||
CONFIG_ATOMIC64_SELFTEST=m
|
||||
CONFIG_ASYNC_RAID6_TEST=m
|
||||
CONFIG_TEST_HEXDUMP=m
|
||||
CONFIG_TEST_STRING_HELPERS=m
|
||||
|
@ -657,6 +666,7 @@ CONFIG_CRYPTO_CHACHA20POLY1305=m
|
|||
CONFIG_CRYPTO_LRW=m
|
||||
CONFIG_CRYPTO_PCBC=m
|
||||
CONFIG_CRYPTO_KEYWRAP=m
|
||||
CONFIG_CRYPTO_CMAC=m
|
||||
CONFIG_CRYPTO_XCBC=m
|
||||
CONFIG_CRYPTO_VMAC=m
|
||||
CONFIG_CRYPTO_MICHAEL_MIC=m
|
||||
|
@ -668,6 +678,7 @@ CONFIG_CRYPTO_SHA512=m
|
|||
CONFIG_CRYPTO_SHA3=m
|
||||
CONFIG_CRYPTO_TGR192=m
|
||||
CONFIG_CRYPTO_WP512=m
|
||||
CONFIG_CRYPTO_AES_TI=m
|
||||
CONFIG_CRYPTO_ANUBIS=m
|
||||
CONFIG_CRYPTO_BLOWFISH=m
|
||||
CONFIG_CRYPTO_CAMELLIA=m
|
||||
|
@ -692,4 +703,5 @@ CONFIG_CRYPTO_USER_API_SKCIPHER=m
|
|||
CONFIG_CRYPTO_USER_API_RNG=m
|
||||
CONFIG_CRYPTO_USER_API_AEAD=m
|
||||
# CONFIG_CRYPTO_HW is not set
|
||||
CONFIG_CRC32_SELFTEST=m
|
||||
CONFIG_XZ_DEC_TEST=m
|
||||
|
|
|
@ -25,6 +25,7 @@ CONFIG_UNIXWARE_DISKLABEL=y
|
|||
CONFIG_SUN_PARTITION=y
|
||||
# CONFIG_EFI_PARTITION is not set
|
||||
CONFIG_IOSCHED_DEADLINE=m
|
||||
CONFIG_MQ_IOSCHED_DEADLINE=m
|
||||
CONFIG_KEXEC=y
|
||||
CONFIG_BOOTINFO_PROC=y
|
||||
CONFIG_M68030=y
|
||||
|
@ -55,6 +56,7 @@ CONFIG_NET_IPVTI=m
|
|||
CONFIG_NET_FOU_IP_TUNNELS=y
|
||||
CONFIG_INET_AH=m
|
||||
CONFIG_INET_ESP=m
|
||||
CONFIG_INET_ESP_OFFLOAD=m
|
||||
CONFIG_INET_IPCOMP=m
|
||||
CONFIG_INET_XFRM_MODE_TRANSPORT=m
|
||||
CONFIG_INET_XFRM_MODE_TUNNEL=m
|
||||
|
@ -66,6 +68,7 @@ CONFIG_IPV6=m
|
|||
CONFIG_IPV6_ROUTER_PREF=y
|
||||
CONFIG_INET6_AH=m
|
||||
CONFIG_INET6_ESP=m
|
||||
CONFIG_INET6_ESP_OFFLOAD=m
|
||||
CONFIG_INET6_IPCOMP=m
|
||||
CONFIG_IPV6_ILA=m
|
||||
CONFIG_IPV6_VTI=m
|
||||
|
@ -96,6 +99,7 @@ CONFIG_NFT_NUMGEN=m
|
|||
CONFIG_NFT_CT=m
|
||||
CONFIG_NFT_SET_RBTREE=m
|
||||
CONFIG_NFT_SET_HASH=m
|
||||
CONFIG_NFT_SET_BITMAP=m
|
||||
CONFIG_NFT_COUNTER=m
|
||||
CONFIG_NFT_LOG=m
|
||||
CONFIG_NFT_LIMIT=m
|
||||
|
@ -293,6 +297,8 @@ CONFIG_MPLS_IPTUNNEL=m
|
|||
CONFIG_NET_L3_MASTER_DEV=y
|
||||
CONFIG_AF_KCM=m
|
||||
# CONFIG_WIRELESS is not set
|
||||
CONFIG_PSAMPLE=m
|
||||
CONFIG_NET_IFE=m
|
||||
CONFIG_NET_DEVLINK=m
|
||||
# CONFIG_UEVENT_HELPER is not set
|
||||
CONFIG_DEVTMPFS=y
|
||||
|
@ -351,6 +357,7 @@ CONFIG_NET_TEAM_MODE_LOADBALANCE=m
|
|||
CONFIG_MACVLAN=m
|
||||
CONFIG_MACVTAP=m
|
||||
CONFIG_IPVLAN=m
|
||||
CONFIG_IPVTAP=m
|
||||
CONFIG_VXLAN=m
|
||||
CONFIG_GENEVE=m
|
||||
CONFIG_GTP=m
|
||||
|
@ -361,6 +368,7 @@ CONFIG_VETH=m
|
|||
# CONFIG_NET_VENDOR_ALACRITECH is not set
|
||||
# CONFIG_NET_VENDOR_AMAZON is not set
|
||||
CONFIG_MVME147_NET=y
|
||||
# CONFIG_NET_VENDOR_AQUANTIA is not set
|
||||
# CONFIG_NET_VENDOR_ARC is not set
|
||||
# CONFIG_NET_CADENCE is not set
|
||||
# CONFIG_NET_VENDOR_BROADCOM is not set
|
||||
|
@ -377,7 +385,6 @@ CONFIG_MVME147_NET=y
|
|||
# CONFIG_NET_VENDOR_SEEQ is not set
|
||||
# CONFIG_NET_VENDOR_SOLARFLARE is not set
|
||||
# CONFIG_NET_VENDOR_STMICRO is not set
|
||||
# CONFIG_NET_VENDOR_SYNOPSYS is not set
|
||||
# CONFIG_NET_VENDOR_VIA is not set
|
||||
# CONFIG_NET_VENDOR_WIZNET is not set
|
||||
CONFIG_PPP=m
|
||||
|
@ -515,6 +522,8 @@ CONFIG_NLS_MAC_TURKISH=m
|
|||
CONFIG_DLM=m
|
||||
# CONFIG_SECTION_MISMATCH_WARN_ONLY is not set
|
||||
CONFIG_MAGIC_SYSRQ=y
|
||||
CONFIG_WW_MUTEX_SELFTEST=m
|
||||
CONFIG_ATOMIC64_SELFTEST=m
|
||||
CONFIG_ASYNC_RAID6_TEST=m
|
||||
CONFIG_TEST_HEXDUMP=m
|
||||
CONFIG_TEST_STRING_HELPERS=m
|
||||
|
@ -545,6 +554,7 @@ CONFIG_CRYPTO_CHACHA20POLY1305=m
|
|||
CONFIG_CRYPTO_LRW=m
|
||||
CONFIG_CRYPTO_PCBC=m
|
||||
CONFIG_CRYPTO_KEYWRAP=m
|
||||
CONFIG_CRYPTO_CMAC=m
|
||||
CONFIG_CRYPTO_XCBC=m
|
||||
CONFIG_CRYPTO_VMAC=m
|
||||
CONFIG_CRYPTO_MICHAEL_MIC=m
|
||||
|
@ -556,6 +566,7 @@ CONFIG_CRYPTO_SHA512=m
|
|||
CONFIG_CRYPTO_SHA3=m
|
||||
CONFIG_CRYPTO_TGR192=m
|
||||
CONFIG_CRYPTO_WP512=m
|
||||
CONFIG_CRYPTO_AES_TI=m
|
||||
CONFIG_CRYPTO_ANUBIS=m
|
||||
CONFIG_CRYPTO_BLOWFISH=m
|
||||
CONFIG_CRYPTO_CAMELLIA=m
|
||||
|
@ -580,4 +591,5 @@ CONFIG_CRYPTO_USER_API_SKCIPHER=m
|
|||
CONFIG_CRYPTO_USER_API_RNG=m
|
||||
CONFIG_CRYPTO_USER_API_AEAD=m
|
||||
# CONFIG_CRYPTO_HW is not set
|
||||
CONFIG_CRC32_SELFTEST=m
|
||||
CONFIG_XZ_DEC_TEST=m
|
||||
|
|
|
@ -25,6 +25,7 @@ CONFIG_UNIXWARE_DISKLABEL=y
|
|||
CONFIG_SUN_PARTITION=y
|
||||
# CONFIG_EFI_PARTITION is not set
|
||||
CONFIG_IOSCHED_DEADLINE=m
|
||||
CONFIG_MQ_IOSCHED_DEADLINE=m
|
||||
CONFIG_KEXEC=y
|
||||
CONFIG_BOOTINFO_PROC=y
|
||||
CONFIG_M68040=y
|
||||
|
@ -56,6 +57,7 @@ CONFIG_NET_IPVTI=m
|
|||
CONFIG_NET_FOU_IP_TUNNELS=y
|
||||
CONFIG_INET_AH=m
|
||||
CONFIG_INET_ESP=m
|
||||
CONFIG_INET_ESP_OFFLOAD=m
|
||||
CONFIG_INET_IPCOMP=m
|
||||
CONFIG_INET_XFRM_MODE_TRANSPORT=m
|
||||
CONFIG_INET_XFRM_MODE_TUNNEL=m
|
||||
|
@ -67,6 +69,7 @@ CONFIG_IPV6=m
|
|||
CONFIG_IPV6_ROUTER_PREF=y
|
||||
CONFIG_INET6_AH=m
|
||||
CONFIG_INET6_ESP=m
|
||||
CONFIG_INET6_ESP_OFFLOAD=m
|
||||
CONFIG_INET6_IPCOMP=m
|
||||
CONFIG_IPV6_ILA=m
|
||||
CONFIG_IPV6_VTI=m
|
||||
|
@ -97,6 +100,7 @@ CONFIG_NFT_NUMGEN=m
|
|||
CONFIG_NFT_CT=m
|
||||
CONFIG_NFT_SET_RBTREE=m
|
||||
CONFIG_NFT_SET_HASH=m
|
||||
CONFIG_NFT_SET_BITMAP=m
|
||||
CONFIG_NFT_COUNTER=m
|
||||
CONFIG_NFT_LOG=m
|
||||
CONFIG_NFT_LIMIT=m
|
||||
|
@ -294,6 +298,8 @@ CONFIG_MPLS_IPTUNNEL=m
|
|||
CONFIG_NET_L3_MASTER_DEV=y
|
||||
CONFIG_AF_KCM=m
|
||||
# CONFIG_WIRELESS is not set
|
||||
CONFIG_PSAMPLE=m
|
||||
CONFIG_NET_IFE=m
|
||||
CONFIG_NET_DEVLINK=m
|
||||
# CONFIG_UEVENT_HELPER is not set
|
||||
CONFIG_DEVTMPFS=y
|
||||
|
@ -352,6 +358,7 @@ CONFIG_NET_TEAM_MODE_LOADBALANCE=m
|
|||
CONFIG_MACVLAN=m
|
||||
CONFIG_MACVTAP=m
|
||||
CONFIG_IPVLAN=m
|
||||
CONFIG_IPVTAP=m
|
||||
CONFIG_VXLAN=m
|
||||
CONFIG_GENEVE=m
|
||||
CONFIG_GTP=m
|
||||
|
@ -361,6 +368,7 @@ CONFIG_NETCONSOLE_DYNAMIC=y
|
|||
CONFIG_VETH=m
|
||||
# CONFIG_NET_VENDOR_ALACRITECH is not set
|
||||
# CONFIG_NET_VENDOR_AMAZON is not set
|
||||
# CONFIG_NET_VENDOR_AQUANTIA is not set
|
||||
# CONFIG_NET_VENDOR_ARC is not set
|
||||
# CONFIG_NET_CADENCE is not set
|
||||
# CONFIG_NET_VENDOR_BROADCOM is not set
|
||||
|
@ -377,7 +385,6 @@ CONFIG_MVME16x_NET=y
|
|||
# CONFIG_NET_VENDOR_SEEQ is not set
|
||||
# CONFIG_NET_VENDOR_SOLARFLARE is not set
|
||||
# CONFIG_NET_VENDOR_STMICRO is not set
|
||||
# CONFIG_NET_VENDOR_SYNOPSYS is not set
|
||||
# CONFIG_NET_VENDOR_VIA is not set
|
||||
# CONFIG_NET_VENDOR_WIZNET is not set
|
||||
CONFIG_PPP=m
|
||||
|
@ -515,6 +522,8 @@ CONFIG_NLS_MAC_TURKISH=m
|
|||
CONFIG_DLM=m
|
||||
# CONFIG_SECTION_MISMATCH_WARN_ONLY is not set
|
||||
CONFIG_MAGIC_SYSRQ=y
|
||||
CONFIG_WW_MUTEX_SELFTEST=m
|
||||
CONFIG_ATOMIC64_SELFTEST=m
|
||||
CONFIG_ASYNC_RAID6_TEST=m
|
||||
CONFIG_TEST_HEXDUMP=m
|
||||
CONFIG_TEST_STRING_HELPERS=m
|
||||
|
@ -545,6 +554,7 @@ CONFIG_CRYPTO_CHACHA20POLY1305=m
|
|||
CONFIG_CRYPTO_LRW=m
|
||||
CONFIG_CRYPTO_PCBC=m
|
||||
CONFIG_CRYPTO_KEYWRAP=m
|
||||
CONFIG_CRYPTO_CMAC=m
|
||||
CONFIG_CRYPTO_XCBC=m
|
||||
CONFIG_CRYPTO_VMAC=m
|
||||
CONFIG_CRYPTO_MICHAEL_MIC=m
|
||||
|
@ -556,6 +566,7 @@ CONFIG_CRYPTO_SHA512=m
|
|||
CONFIG_CRYPTO_SHA3=m
|
||||
CONFIG_CRYPTO_TGR192=m
|
||||
CONFIG_CRYPTO_WP512=m
|
||||
CONFIG_CRYPTO_AES_TI=m
|
||||
CONFIG_CRYPTO_ANUBIS=m
|
||||
CONFIG_CRYPTO_BLOWFISH=m
|
||||
CONFIG_CRYPTO_CAMELLIA=m
|
||||
|
@ -580,4 +591,5 @@ CONFIG_CRYPTO_USER_API_SKCIPHER=m
|
|||
CONFIG_CRYPTO_USER_API_RNG=m
|
||||
CONFIG_CRYPTO_USER_API_AEAD=m
|
||||
# CONFIG_CRYPTO_HW is not set
|
||||
CONFIG_CRC32_SELFTEST=m
|
||||
CONFIG_XZ_DEC_TEST=m
|
||||
|
|
|
@ -26,6 +26,7 @@ CONFIG_SUN_PARTITION=y
|
|||
# CONFIG_EFI_PARTITION is not set
|
||||
CONFIG_SYSV68_PARTITION=y
|
||||
CONFIG_IOSCHED_DEADLINE=m
|
||||
CONFIG_MQ_IOSCHED_DEADLINE=m
|
||||
CONFIG_KEXEC=y
|
||||
CONFIG_BOOTINFO_PROC=y
|
||||
CONFIG_M68040=y
|
||||
|
@ -56,6 +57,7 @@ CONFIG_NET_IPVTI=m
|
|||
CONFIG_NET_FOU_IP_TUNNELS=y
|
||||
CONFIG_INET_AH=m
|
||||
CONFIG_INET_ESP=m
|
||||
CONFIG_INET_ESP_OFFLOAD=m
|
||||
CONFIG_INET_IPCOMP=m
|
||||
CONFIG_INET_XFRM_MODE_TRANSPORT=m
|
||||
CONFIG_INET_XFRM_MODE_TUNNEL=m
|
||||
|
@ -67,6 +69,7 @@ CONFIG_IPV6=m
|
|||
CONFIG_IPV6_ROUTER_PREF=y
|
||||
CONFIG_INET6_AH=m
|
||||
CONFIG_INET6_ESP=m
|
||||
CONFIG_INET6_ESP_OFFLOAD=m
|
||||
CONFIG_INET6_IPCOMP=m
|
||||
CONFIG_IPV6_ILA=m
|
||||
CONFIG_IPV6_VTI=m
|
||||
|
@ -97,6 +100,7 @@ CONFIG_NFT_NUMGEN=m
|
|||
CONFIG_NFT_CT=m
|
||||
CONFIG_NFT_SET_RBTREE=m
|
||||
CONFIG_NFT_SET_HASH=m
|
||||
CONFIG_NFT_SET_BITMAP=m
|
||||
CONFIG_NFT_COUNTER=m
|
||||
CONFIG_NFT_LOG=m
|
||||
CONFIG_NFT_LIMIT=m
|
||||
|
@ -294,6 +298,8 @@ CONFIG_MPLS_IPTUNNEL=m
|
|||
CONFIG_NET_L3_MASTER_DEV=y
|
||||
CONFIG_AF_KCM=m
|
||||
# CONFIG_WIRELESS is not set
|
||||
CONFIG_PSAMPLE=m
|
||||
CONFIG_NET_IFE=m
|
||||
CONFIG_NET_DEVLINK=m
|
||||
# CONFIG_UEVENT_HELPER is not set
|
||||
CONFIG_DEVTMPFS=y
|
||||
|
@ -358,6 +364,7 @@ CONFIG_NET_TEAM_MODE_LOADBALANCE=m
|
|||
CONFIG_MACVLAN=m
|
||||
CONFIG_MACVTAP=m
|
||||
CONFIG_IPVLAN=m
|
||||
CONFIG_IPVTAP=m
|
||||
CONFIG_VXLAN=m
|
||||
CONFIG_GENEVE=m
|
||||
CONFIG_GTP=m
|
||||
|
@ -369,6 +376,7 @@ CONFIG_VETH=m
|
|||
# CONFIG_NET_VENDOR_ALACRITECH is not set
|
||||
# CONFIG_NET_VENDOR_AMAZON is not set
|
||||
# CONFIG_NET_VENDOR_AMD is not set
|
||||
# CONFIG_NET_VENDOR_AQUANTIA is not set
|
||||
# CONFIG_NET_VENDOR_ARC is not set
|
||||
# CONFIG_NET_CADENCE is not set
|
||||
# CONFIG_NET_VENDOR_BROADCOM is not set
|
||||
|
@ -388,7 +396,6 @@ CONFIG_NE2000=y
|
|||
# CONFIG_NET_VENDOR_SOLARFLARE is not set
|
||||
# CONFIG_NET_VENDOR_SMSC is not set
|
||||
# CONFIG_NET_VENDOR_STMICRO is not set
|
||||
# CONFIG_NET_VENDOR_SYNOPSYS is not set
|
||||
# CONFIG_NET_VENDOR_VIA is not set
|
||||
# CONFIG_NET_VENDOR_WIZNET is not set
|
||||
CONFIG_PLIP=m
|
||||
|
@ -538,6 +545,8 @@ CONFIG_NLS_MAC_TURKISH=m
|
|||
CONFIG_DLM=m
|
||||
# CONFIG_SECTION_MISMATCH_WARN_ONLY is not set
|
||||
CONFIG_MAGIC_SYSRQ=y
|
||||
CONFIG_WW_MUTEX_SELFTEST=m
|
||||
CONFIG_ATOMIC64_SELFTEST=m
|
||||
CONFIG_ASYNC_RAID6_TEST=m
|
||||
CONFIG_TEST_HEXDUMP=m
|
||||
CONFIG_TEST_STRING_HELPERS=m
|
||||
|
@ -568,6 +577,7 @@ CONFIG_CRYPTO_CHACHA20POLY1305=m
|
|||
CONFIG_CRYPTO_LRW=m
|
||||
CONFIG_CRYPTO_PCBC=m
|
||||
CONFIG_CRYPTO_KEYWRAP=m
|
||||
CONFIG_CRYPTO_CMAC=m
|
||||
CONFIG_CRYPTO_XCBC=m
|
||||
CONFIG_CRYPTO_VMAC=m
|
||||
CONFIG_CRYPTO_MICHAEL_MIC=m
|
||||
|
@ -579,6 +589,7 @@ CONFIG_CRYPTO_SHA512=m
|
|||
CONFIG_CRYPTO_SHA3=m
|
||||
CONFIG_CRYPTO_TGR192=m
|
||||
CONFIG_CRYPTO_WP512=m
|
||||
CONFIG_CRYPTO_AES_TI=m
|
||||
CONFIG_CRYPTO_ANUBIS=m
|
||||
CONFIG_CRYPTO_BLOWFISH=m
|
||||
CONFIG_CRYPTO_CAMELLIA=m
|
||||
|
@ -603,4 +614,5 @@ CONFIG_CRYPTO_USER_API_SKCIPHER=m
|
|||
CONFIG_CRYPTO_USER_API_RNG=m
|
||||
CONFIG_CRYPTO_USER_API_AEAD=m
|
||||
# CONFIG_CRYPTO_HW is not set
|
||||
CONFIG_CRC32_SELFTEST=m
|
||||
CONFIG_XZ_DEC_TEST=m
|
||||
|
|
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue