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drm/amdgpu: expose VCE 4.0 powergate interface 

SMU will use this interface to power down the VCE engine.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Evan Quan 2019-04-25 15:35:17 +08:00 committed by Alex Deucher
parent 09aef2c48e
commit 2c7e78355b
1 changed files with 6 additions and 9 deletions
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15
drivers/gpu/drm/amd/amdgpu/vce_v4_0.c
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@ -382,6 +382,7 @@ static int vce_v4_0_start(struct amdgpu_device *adev)
static int vce_v4_0_stop(struct amdgpu_device *adev) static int vce_v4_0_stop(struct amdgpu_device *adev)
{ {
/* Disable VCPU */
WREG32_P(SOC15_REG_OFFSET(VCE, 0, mmVCE_VCPU_CNTL), 0, ~0x200001); WREG32_P(SOC15_REG_OFFSET(VCE, 0, mmVCE_VCPU_CNTL), 0, ~0x200001);
/* hold on ECPU */ /* hold on ECPU */
@ -389,8 +390,8 @@ static int vce_v4_0_stop(struct amdgpu_device *adev)
VCE_SOFT_RESET__ECPU_SOFT_RESET_MASK, VCE_SOFT_RESET__ECPU_SOFT_RESET_MASK,
~VCE_SOFT_RESET__ECPU_SOFT_RESET_MASK); ~VCE_SOFT_RESET__ECPU_SOFT_RESET_MASK);
/* clear BUSY flag */ /* clear VCE_STATUS */
WREG32_P(SOC15_REG_OFFSET(VCE, 0, mmVCE_STATUS), 0, ~VCE_STATUS__JOB_BUSY_MASK); WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_STATUS), 0);
/* Set Clock-Gating off */ /* Set Clock-Gating off */
/* if (adev->cg_flags & AMD_CG_SUPPORT_VCE_MGCG) /* if (adev->cg_flags & AMD_CG_SUPPORT_VCE_MGCG)
@ -922,6 +923,7 @@ static int vce_v4_0_set_clockgating_state(void *handle,
return 0; return 0;
} }
#endif
static int vce_v4_0_set_powergating_state(void *handle, static int vce_v4_0_set_powergating_state(void *handle,
enum amd_powergating_state state) enum amd_powergating_state state)
@ -935,16 +937,11 @@ static int vce_v4_0_set_powergating_state(void *handle,
*/ */
struct amdgpu_device *adev = (struct amdgpu_device *)handle; struct amdgpu_device *adev = (struct amdgpu_device *)handle;
if (!(adev->pg_flags & AMD_PG_SUPPORT_VCE))
return 0;
if (state == AMD_PG_STATE_GATE) if (state == AMD_PG_STATE_GATE)
/* XXX do we need a vce_v4_0_stop()? */ return vce_v4_0_stop(adev);
return 0;
else else
return vce_v4_0_start(adev); return vce_v4_0_start(adev);
} }
#endif
static void vce_v4_0_ring_emit_ib(struct amdgpu_ring *ring, struct amdgpu_job *job, static void vce_v4_0_ring_emit_ib(struct amdgpu_ring *ring, struct amdgpu_job *job,
struct amdgpu_ib *ib, uint32_t flags) struct amdgpu_ib *ib, uint32_t flags)
@ -1059,7 +1056,7 @@ const struct amd_ip_funcs vce_v4_0_ip_funcs = {
.soft_reset = NULL /* vce_v4_0_soft_reset */, .soft_reset = NULL /* vce_v4_0_soft_reset */,
.post_soft_reset = NULL /* vce_v4_0_post_soft_reset */, .post_soft_reset = NULL /* vce_v4_0_post_soft_reset */,
.set_clockgating_state = vce_v4_0_set_clockgating_state, .set_clockgating_state = vce_v4_0_set_clockgating_state,
.set_powergating_state = NULL /* vce_v4_0_set_powergating_state */, .set_powergating_state = vce_v4_0_set_powergating_state,
}; };
static const struct amdgpu_ring_funcs vce_v4_0_ring_vm_funcs = { static const struct amdgpu_ring_funcs vce_v4_0_ring_vm_funcs = {