From 2d60093f8eec9e1f1ddca915e231772f33cee8d5 Mon Sep 17 00:00:00 2001 From: Sergio Paracuellos Date: Fri, 10 Apr 2020 11:18:35 +0200 Subject: [PATCH] staging: mt7621-pci-phy: dt: bindings: add mediatek, mt7621-pci-phy.yaml Add bindings to describe Mediatek MT7621 PCIe PHY. Signed-off-by: Sergio Paracuellos Link: https://lore.kernel.org/r/20200410091836.13068-2-sergio.paracuellos@gmail.com Signed-off-by: Greg Kroah-Hartman --- .../mediatek,mt7621-pci-phy.yaml | 36 +++++++++++++++++++ 1 file changed, 36 insertions(+) create mode 100644 drivers/staging/mt7621-pci-phy/mediatek,mt7621-pci-phy.yaml diff --git a/drivers/staging/mt7621-pci-phy/mediatek,mt7621-pci-phy.yaml b/drivers/staging/mt7621-pci-phy/mediatek,mt7621-pci-phy.yaml new file mode 100644 index 000000000000..cf32bbc45b5d --- /dev/null +++ b/drivers/staging/mt7621-pci-phy/mediatek,mt7621-pci-phy.yaml @@ -0,0 +1,36 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/phy/mediatek,mt7621-pci-phy.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Mediatek Mt7621 PCIe PHY Device Tree Bindings + +maintainers: + - Sergio Paracuellos + +properties: + compatible: + const: mediatek,mt7621-pci-phy + + reg: + maxItems: 1 + + "#phy-cells": + const: 1 + description: selects if the phy is dual-ported + +required: + - compatible + - reg + - "#phy-cells" + +additionalProperties: false + +examples: + - | + pcie0_phy: pcie-phy@1e149000 { + compatible = "mediatek,mt7621-pci-phy"; + reg = <0x1e149000 0x0700>; + #phy-cells = <1>; + };