net: dsa: mv88e6xxx: assign default FDB to ports
Restore per-port FDB. Assign them on setup, allow adding and deleting addresses into them, and dump them. Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -1458,14 +1458,82 @@ loadpurge:
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return _mv88e6xxx_vtu_cmd(ds, GLOBAL_VTU_OP_STU_LOAD_PURGE);
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}
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static int _mv88e6xxx_port_fid(struct dsa_switch *ds, int port, u16 *new,
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u16 *old)
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{
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u16 fid;
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int ret;
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/* Port's default FID bits 3:0 are located in reg 0x06, offset 12 */
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ret = _mv88e6xxx_reg_read(ds, REG_PORT(port), PORT_BASE_VLAN);
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if (ret < 0)
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return ret;
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fid = (ret & PORT_BASE_VLAN_FID_3_0_MASK) >> 12;
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if (new) {
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ret &= ~PORT_BASE_VLAN_FID_3_0_MASK;
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ret |= (*new << 12) & PORT_BASE_VLAN_FID_3_0_MASK;
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ret = _mv88e6xxx_reg_write(ds, REG_PORT(port), PORT_BASE_VLAN,
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ret);
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if (ret < 0)
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return ret;
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}
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/* Port's default FID bits 11:4 are located in reg 0x05, offset 0 */
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ret = _mv88e6xxx_reg_read(ds, REG_PORT(port), PORT_CONTROL_1);
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if (ret < 0)
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return ret;
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fid |= (ret & PORT_CONTROL_1_FID_11_4_MASK) << 4;
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if (new) {
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ret &= ~PORT_CONTROL_1_FID_11_4_MASK;
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ret |= (*new >> 4) & PORT_CONTROL_1_FID_11_4_MASK;
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ret = _mv88e6xxx_reg_write(ds, REG_PORT(port), PORT_CONTROL_1,
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ret);
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if (ret < 0)
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return ret;
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netdev_dbg(ds->ports[port], "FID %d (was %d)\n", *new, fid);
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}
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if (old)
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*old = fid;
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return 0;
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}
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static int _mv88e6xxx_port_fid_get(struct dsa_switch *ds, int port, u16 *fid)
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{
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return _mv88e6xxx_port_fid(ds, port, NULL, fid);
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}
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static int _mv88e6xxx_port_fid_set(struct dsa_switch *ds, int port, u16 fid)
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{
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return _mv88e6xxx_port_fid(ds, port, &fid, NULL);
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}
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static int _mv88e6xxx_fid_new(struct dsa_switch *ds, u16 *fid)
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{
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struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
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DECLARE_BITMAP(fid_bitmap, MV88E6XXX_N_FID);
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struct mv88e6xxx_vtu_stu_entry vlan;
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int err;
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int i, err;
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bitmap_zero(fid_bitmap, MV88E6XXX_N_FID);
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/* Set every FID bit used by the (un)bridged ports */
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for (i = 0; i < ps->num_ports; ++i) {
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err = _mv88e6xxx_port_fid_get(ds, i, fid);
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if (err)
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return err;
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set_bit(*fid, fid_bitmap);
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}
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/* Set every FID bit used by the VLAN entries */
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err = _mv88e6xxx_vtu_vid_write(ds, GLOBAL_VTU_VID_MASK);
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if (err)
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@ -1824,7 +1892,11 @@ static int _mv88e6xxx_port_fdb_load(struct dsa_switch *ds, int port,
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struct mv88e6xxx_vtu_stu_entry vlan;
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int err;
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err = _mv88e6xxx_vtu_get(ds, vid, &vlan, false);
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/* Null VLAN ID corresponds to the port private database */
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if (vid == 0)
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err = _mv88e6xxx_port_fid_get(ds, port, &vlan.fid);
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else
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err = _mv88e6xxx_vtu_get(ds, vid, &vlan, false);
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if (err)
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return err;
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@ -1843,10 +1915,6 @@ int mv88e6xxx_port_fdb_prepare(struct dsa_switch *ds, int port,
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const struct switchdev_obj_port_fdb *fdb,
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struct switchdev_trans *trans)
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{
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/* We don't use per-port FDB */
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if (fdb->vid == 0)
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return -EOPNOTSUPP;
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/* We don't need any dynamic resource from the kernel (yet),
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* so skip the prepare phase.
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*/
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@ -1982,10 +2050,20 @@ int mv88e6xxx_port_fdb_dump(struct dsa_switch *ds, int port,
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struct mv88e6xxx_vtu_stu_entry vlan = {
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.vid = GLOBAL_VTU_VID_MASK, /* all ones */
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};
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u16 fid;
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int err;
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mutex_lock(&ps->smi_mutex);
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/* Dump port's default Filtering Information Database (VLAN ID 0) */
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err = _mv88e6xxx_port_fid_get(ds, port, &fid);
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if (err)
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goto unlock;
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err = _mv88e6xxx_port_fdb_dump_one(ds, fid, 0, port, fdb, cb);
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if (err)
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goto unlock;
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/* Dump VLANs' Filtering Information Databases */
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err = _mv88e6xxx_vtu_vid_write(ds, vlan.vid);
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if (err)
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@ -2286,9 +2364,13 @@ static int mv88e6xxx_setup_port(struct dsa_switch *ds, int port)
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if (ret)
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goto abort;
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/* Port based VLAN map: do not give each port its own address
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/* Port based VLAN map: give each port its own address
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* database, and allow every port to egress frames on all other ports.
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*/
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ret = _mv88e6xxx_port_fid_set(ds, port, port + 1);
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if (ret)
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goto abort;
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reg = BIT(ps->num_ports) - 1; /* all ports */
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reg &= ~BIT(port); /* except itself */
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ret = _mv88e6xxx_port_vlan_map_set(ds, port, reg);
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@ -133,7 +133,9 @@
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#define PORT_CONTROL_STATE_LEARNING 0x02
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#define PORT_CONTROL_STATE_FORWARDING 0x03
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#define PORT_CONTROL_1 0x05
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#define PORT_CONTROL_1_FID_11_4_MASK (0xff << 0)
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#define PORT_BASE_VLAN 0x06
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#define PORT_BASE_VLAN_FID_3_0_MASK (0xf << 12)
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#define PORT_DEFAULT_VLAN 0x07
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#define PORT_DEFAULT_VLAN_MASK 0xfff
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#define PORT_CONTROL_2 0x08
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