pinctrl: single: support gpio request and free
Marvell's PXA/MMP silicon also match the behavior of pinctrl-single. Each pin binds to one register. A lot of pins could be configured as gpio. GPIO range is defined as a child node of pinmux in .dtsi file. If those pins are with the same gpio function configuration in the pinmux register, they could be defined in the same GPIO range. For this new child node, two properties are used. reg = <the start of pinmux register in range, size of range> pinctrl-single,gpio: <gpio base in range, the gpio function of the range in the pinmux register> Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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@ -30,6 +30,7 @@
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#define PCS_MUX_BITS_NAME "pinctrl-single,bits"
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#define PCS_REG_NAME_LEN ((sizeof(unsigned long) * 2) + 1)
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#define PCS_OFF_DISABLED ~0U
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#define PCS_MAX_GPIO_VALUES 2
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/**
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* struct pcs_pingroup - pingroups for a function
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@ -76,6 +77,16 @@ struct pcs_function {
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struct list_head node;
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};
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/**
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* struct pcs_gpio_range - pinctrl gpio range
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* @range: subrange of the GPIO number space
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* @gpio_func: gpio function value in the pinmux register
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*/
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struct pcs_gpio_range {
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struct pinctrl_gpio_range range;
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int gpio_func;
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};
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/**
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* struct pcs_data - wrapper for data needed by pinctrl framework
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* @pa: pindesc array
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@ -403,9 +414,26 @@ static void pcs_disable(struct pinctrl_dev *pctldev, unsigned fselector,
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}
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static int pcs_request_gpio(struct pinctrl_dev *pctldev,
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struct pinctrl_gpio_range *range, unsigned offset)
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struct pinctrl_gpio_range *range, unsigned pin)
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{
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return -ENOTSUPP;
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struct pcs_device *pcs = pinctrl_dev_get_drvdata(pctldev);
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struct pcs_gpio_range *gpio = NULL;
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int end, mux_bytes;
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unsigned data;
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gpio = container_of(range, struct pcs_gpio_range, range);
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end = range->pin_base + range->npins - 1;
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if (pin < range->pin_base || pin > end) {
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dev_err(pctldev->dev,
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"pin %d isn't in the range of %d to %d\n",
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pin, range->pin_base, end);
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return -EINVAL;
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}
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mux_bytes = pcs->width / BITS_PER_BYTE;
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data = pcs->read(pcs->base + pin * mux_bytes) & ~pcs->fmask;
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data |= gpio->gpio_func;
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pcs->write(data, pcs->base + pin * mux_bytes);
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return 0;
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}
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static struct pinmux_ops pcs_pinmux_ops = {
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@ -879,6 +907,50 @@ static void pcs_free_resources(struct pcs_device *pcs)
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static struct of_device_id pcs_of_match[];
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static int __devinit pcs_add_gpio_range(struct device_node *node,
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struct pcs_device *pcs)
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{
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struct pcs_gpio_range *gpio;
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struct device_node *child;
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struct resource r;
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const char name[] = "pinctrl-single";
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u32 gpiores[PCS_MAX_GPIO_VALUES];
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int ret, i = 0, mux_bytes = 0;
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for_each_child_of_node(node, child) {
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ret = of_address_to_resource(child, 0, &r);
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if (ret < 0)
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continue;
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memset(gpiores, 0, sizeof(u32) * PCS_MAX_GPIO_VALUES);
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ret = of_property_read_u32_array(child, "pinctrl-single,gpio",
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gpiores, PCS_MAX_GPIO_VALUES);
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if (ret < 0)
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continue;
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gpio = devm_kzalloc(pcs->dev, sizeof(*gpio), GFP_KERNEL);
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if (!gpio) {
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dev_err(pcs->dev, "failed to allocate pcs gpio\n");
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return -ENOMEM;
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}
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gpio->range.name = devm_kzalloc(pcs->dev, sizeof(name),
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GFP_KERNEL);
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if (!gpio->range.name) {
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dev_err(pcs->dev, "failed to allocate range name\n");
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return -ENOMEM;
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}
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memcpy((char *)gpio->range.name, name, sizeof(name));
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gpio->range.id = i++;
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gpio->range.base = gpiores[0];
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gpio->gpio_func = gpiores[1];
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mux_bytes = pcs->width / BITS_PER_BYTE;
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gpio->range.pin_base = (r.start - pcs->res->start) / mux_bytes;
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gpio->range.npins = (r.end - r.start) / mux_bytes + 1;
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pinctrl_add_gpio_range(pcs->pctl, &gpio->range);
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}
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return 0;
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}
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static int __devinit pcs_probe(struct platform_device *pdev)
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{
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struct device_node *np = pdev->dev.of_node;
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@ -975,6 +1047,10 @@ static int __devinit pcs_probe(struct platform_device *pdev)
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goto free;
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}
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ret = pcs_add_gpio_range(np, pcs);
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if (ret < 0)
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goto free;
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dev_info(pcs->dev, "%i pins at pa %p size %u\n",
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pcs->desc.npins, pcs->base, pcs->size);
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