ASoC: Intel: Skylake: Update DSP stall bits
The stall bits needs to comprehend the number of DSP cores running, so update the stall and unstall register writes to comprehend SKL_DSP_CORES_MASK values as well. Signed-off-by: Jayachandran B <jayachandran.b@intel.com> Signed-off-by: Ramesh Babu <ramesh.babu@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -106,8 +106,8 @@ static bool is_skl_dsp_core_enable(struct sst_dsp *ctx)
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static int skl_dsp_reset_core(struct sst_dsp *ctx)
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{
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/* stall core */
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sst_dsp_shim_write_unlocked(ctx, SKL_ADSP_REG_ADSPCS,
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sst_dsp_shim_read_unlocked(ctx, SKL_ADSP_REG_ADSPCS) &
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sst_dsp_shim_update_bits_unlocked(ctx, SKL_ADSP_REG_ADSPCS,
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SKL_ADSPCS_CSTALL_MASK,
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SKL_ADSPCS_CSTALL(SKL_DSP_CORES_MASK));
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/* set reset state */
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@ -127,9 +127,8 @@ int skl_dsp_start_core(struct sst_dsp *ctx)
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/* run core */
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dev_dbg(ctx->dev, "run core...\n");
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sst_dsp_shim_write_unlocked(ctx, SKL_ADSP_REG_ADSPCS,
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sst_dsp_shim_read_unlocked(ctx, SKL_ADSP_REG_ADSPCS) &
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~SKL_ADSPCS_CSTALL(SKL_DSP_CORES_MASK));
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sst_dsp_shim_update_bits_unlocked(ctx, SKL_ADSP_REG_ADSPCS,
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SKL_ADSPCS_CSTALL_MASK, 0);
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if (!is_skl_dsp_core_enable(ctx)) {
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skl_dsp_reset_core(ctx);
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